Lines Matching +full:rx +full:- +full:burst +full:- +full:length
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* drivers/atm/uPD98401.h - NEC uPD98401 (SAR) declarations */
25 #define uPD98401_CHAN_RT 0x02000000 /* RX/TX (0 TX, 1 RX) */
42 #define uPD98401_IA_TGT_CM 0 /* - Control Memory */
43 #define uPD98401_IA_TGT_SAR 1 /* - uPD98401 registers */
44 #define uPD98401_IA_TGT_PHY 3 /* - PHY device */
59 #define uPD98401_AAL5_UINFO 0xffff0000 /* user-supplied information */
72 #define uPD98401_AAL5_ES_TOOBIG 3 /* Maximum length violation */
75 #define uPD98401_AAL5_ES_LENGTH 6 /* Length violation */
102 #define uPD98401_ADDR 0x05 /* Last Burst Address */
123 #define uPD98401_GMR_SZ 0x00000f00 /* Burst Size Enable */
124 #define uPD98401_BURST16 0x00000800 /* 16-word burst */
125 #define uPD98401_BURST8 0x00000400 /* 8-word burst */
126 #define uPD98401_BURST4 0x00000200 /* 4-word burst */
127 #define uPD98401_BURST2 0x00000100 /* 2-word burst */
128 #define uPD98401_GMR_AD 0x00000080 /* Address (burst resolution) Disable */
184 #define uPD98401_PS_S 0x08 /* Scan - must be 0 (internal) */
194 #define uPD98401_TSR 0x40302 /* Time-Stamp Register */
220 #define uPD98401_TXPD_C10 0x00040000 /* insert CRC-10 */
223 #define uPD98401_TXPD_UU 0x0000ff00 /* CPCS-UU */
249 * RX free buffer pools descriptor
261 * RX VC table
266 #define uPD98401_RXVC_MB 0x00200000 /* RX mailbox number */
269 #define uPD98401_RXVC_UINFO 0x0000ffff /* user-supplied information */
288 * RX lookup table