Lines Matching +full:kona +full:- +full:i2c
18 #include <linux/i2c.h>
127 uint8_t time_div; /* Post-prescale divider */
130 /* Internal divider settings for high-speed mode */
141 uint8_t time_div; /* Post-prescale divider */
172 dev_dbg(dev->device, "%s, %d\n", __func__, cmd); in bcm_kona_i2c_send_cmd_to_ctrl()
178 dev->base + CS_OFFSET); in bcm_kona_i2c_send_cmd_to_ctrl()
185 dev->base + CS_OFFSET); in bcm_kona_i2c_send_cmd_to_ctrl()
192 dev->base + CS_OFFSET); in bcm_kona_i2c_send_cmd_to_ctrl()
198 dev->base + CS_OFFSET); in bcm_kona_i2c_send_cmd_to_ctrl()
202 dev_err(dev->device, "Unknown command %d\n", cmd); in bcm_kona_i2c_send_cmd_to_ctrl()
208 writel(readl(dev->base + CLKEN_OFFSET) | CLKEN_CLKEN_MASK, in bcm_kona_i2c_enable_clock()
209 dev->base + CLKEN_OFFSET); in bcm_kona_i2c_enable_clock()
214 writel(readl(dev->base + CLKEN_OFFSET) & ~CLKEN_CLKEN_MASK, in bcm_kona_i2c_disable_clock()
215 dev->base + CLKEN_OFFSET); in bcm_kona_i2c_disable_clock()
221 uint32_t status = readl(dev->base + ISR_OFFSET); in bcm_kona_i2c_isr()
229 dev->base + TXFCR_OFFSET); in bcm_kona_i2c_isr()
231 writel(status & ~ISR_RESERVED_MASK, dev->base + ISR_OFFSET); in bcm_kona_i2c_isr()
232 complete(&dev->done); in bcm_kona_i2c_isr()
242 while (readl(dev->base + ISR_OFFSET) & ISR_CMDBUSY_MASK) in bcm_kona_i2c_wait_if_busy()
244 dev_err(dev->device, "CMDBUSY timeout\n"); in bcm_kona_i2c_wait_if_busy()
245 return -ETIMEDOUT; in bcm_kona_i2c_wait_if_busy()
251 /* Send command to I2C bus */
264 writel(IER_I2C_INT_EN_MASK, dev->base + IER_OFFSET); in bcm_kona_send_i2c_cmd()
267 reinit_completion(&dev->done); in bcm_kona_send_i2c_cmd()
273 time_left = wait_for_completion_timeout(&dev->done, time_left); in bcm_kona_send_i2c_cmd()
276 writel(0, dev->base + IER_OFFSET); in bcm_kona_send_i2c_cmd()
279 dev_err(dev->device, "controller timed out\n"); in bcm_kona_send_i2c_cmd()
280 rc = -ETIMEDOUT; in bcm_kona_send_i2c_cmd()
289 /* Read a single RX FIFO worth of data from the i2c bus */
297 reinit_completion(&dev->done); in bcm_kona_i2c_read_fifo_single()
300 writel(IER_READ_COMPLETE_INT_MASK, dev->base + IER_OFFSET); in bcm_kona_i2c_read_fifo_single()
305 dev->base + RXFCR_OFFSET); in bcm_kona_i2c_read_fifo_single()
308 time_left = wait_for_completion_timeout(&dev->done, time_left); in bcm_kona_i2c_read_fifo_single()
311 writel(0, dev->base + IER_OFFSET); in bcm_kona_i2c_read_fifo_single()
314 dev_err(dev->device, "RX FIFO time out\n"); in bcm_kona_i2c_read_fifo_single()
315 return -EREMOTEIO; in bcm_kona_i2c_read_fifo_single()
319 for (; len > 0; len--, buf++) in bcm_kona_i2c_read_fifo_single()
320 *buf = readl(dev->base + RXFIFORDOUT_OFFSET); in bcm_kona_i2c_read_fifo_single()
325 /* Read any amount of data using the RX FIFO from the i2c bus */
334 uint8_t *tmp_buf = msg->buf; in bcm_kona_i2c_read_fifo()
336 while (bytes_read < msg->len) { in bcm_kona_i2c_read_fifo()
337 if (msg->len - bytes_read <= MAX_RX_FIFO_SIZE) { in bcm_kona_i2c_read_fifo()
339 bytes_to_read = msg->len - bytes_read; in bcm_kona_i2c_read_fifo()
345 return -EREMOTEIO; in bcm_kona_i2c_read_fifo()
354 /* Write a single byte of data to the i2c bus */
368 writel(ISR_SES_DONE_MASK, dev->base + ISR_OFFSET); in bcm_kona_i2c_write_byte()
371 writel(IER_I2C_INT_EN_MASK, dev->base + IER_OFFSET); in bcm_kona_i2c_write_byte()
374 reinit_completion(&dev->done); in bcm_kona_i2c_write_byte()
377 writel(data, dev->base + DAT_OFFSET); in bcm_kona_i2c_write_byte()
380 time_left = wait_for_completion_timeout(&dev->done, time_left); in bcm_kona_i2c_write_byte()
383 writel(0, dev->base + IER_OFFSET); in bcm_kona_i2c_write_byte()
386 dev_dbg(dev->device, "controller timed out\n"); in bcm_kona_i2c_write_byte()
387 return -ETIMEDOUT; in bcm_kona_i2c_write_byte()
390 nak_received = readl(dev->base + CS_OFFSET) & CS_ACK_MASK ? 1 : 0; in bcm_kona_i2c_write_byte()
393 dev_dbg(dev->device, "unexpected NAK/ACK\n"); in bcm_kona_i2c_write_byte()
394 return -EREMOTEIO; in bcm_kona_i2c_write_byte()
400 /* Write a single TX FIFO worth of data to the i2c bus */
409 reinit_completion(&dev->done); in bcm_kona_i2c_write_fifo_single()
413 dev->base + IER_OFFSET); in bcm_kona_i2c_write_fifo_single()
416 disable_irq(dev->irq); in bcm_kona_i2c_write_fifo_single()
420 writel(buf[k], (dev->base + DAT_OFFSET)); in bcm_kona_i2c_write_fifo_single()
423 enable_irq(dev->irq); in bcm_kona_i2c_write_fifo_single()
427 time_left = wait_for_completion_timeout(&dev->done, time_left); in bcm_kona_i2c_write_fifo_single()
428 fifo_status = readl(dev->base + FIFO_STATUS_OFFSET); in bcm_kona_i2c_write_fifo_single()
432 writel(0, dev->base + IER_OFFSET); in bcm_kona_i2c_write_fifo_single()
435 if (readl(dev->base + CS_OFFSET) & CS_ACK_MASK) { in bcm_kona_i2c_write_fifo_single()
436 dev_err(dev->device, "unexpected NAK\n"); in bcm_kona_i2c_write_fifo_single()
437 return -EREMOTEIO; in bcm_kona_i2c_write_fifo_single()
442 dev_err(dev->device, "completion timed out\n"); in bcm_kona_i2c_write_fifo_single()
443 return -EREMOTEIO; in bcm_kona_i2c_write_fifo_single()
450 /* Write any amount of data using TX FIFO to the i2c bus */
458 uint8_t *tmp_buf = msg->buf; in bcm_kona_i2c_write_fifo()
460 while (bytes_written < msg->len) { in bcm_kona_i2c_write_fifo()
461 if (msg->len - bytes_written <= MAX_TX_FIFO_SIZE) in bcm_kona_i2c_write_fifo()
462 bytes_to_write = msg->len - bytes_written; in bcm_kona_i2c_write_fifo()
467 return -EREMOTEIO; in bcm_kona_i2c_write_fifo()
476 /* Send i2c address */
482 if (msg->flags & I2C_M_TEN) { in bcm_kona_i2c_do_addr()
484 addr = 0xF0 | ((msg->addr & 0x300) >> 7); in bcm_kona_i2c_do_addr()
486 return -EREMOTEIO; in bcm_kona_i2c_do_addr()
489 addr = msg->addr & 0xFF; in bcm_kona_i2c_do_addr()
491 return -EREMOTEIO; in bcm_kona_i2c_do_addr()
493 if (msg->flags & I2C_M_RD) { in bcm_kona_i2c_do_addr()
496 return -EREMOTEIO; in bcm_kona_i2c_do_addr()
498 /* Then re-send the first byte with the read bit set */ in bcm_kona_i2c_do_addr()
499 addr = 0xF0 | ((msg->addr & 0x300) >> 7) | 0x01; in bcm_kona_i2c_do_addr()
501 return -EREMOTEIO; in bcm_kona_i2c_do_addr()
507 return -EREMOTEIO; in bcm_kona_i2c_do_addr()
515 writel(readl(dev->base + CLKEN_OFFSET) & ~CLKEN_AUTOSENSE_OFF_MASK, in bcm_kona_i2c_enable_autosense()
516 dev->base + CLKEN_OFFSET); in bcm_kona_i2c_enable_autosense()
521 writel(readl(dev->base + HSTIM_OFFSET) & ~HSTIM_HS_MODE_MASK, in bcm_kona_i2c_config_timing()
522 dev->base + HSTIM_OFFSET); in bcm_kona_i2c_config_timing()
524 writel((dev->std_cfg->prescale << TIM_PRESCALE_SHIFT) | in bcm_kona_i2c_config_timing()
525 (dev->std_cfg->time_p << TIM_P_SHIFT) | in bcm_kona_i2c_config_timing()
526 (dev->std_cfg->no_div << TIM_NO_DIV_SHIFT) | in bcm_kona_i2c_config_timing()
527 (dev->std_cfg->time_div << TIM_DIV_SHIFT), in bcm_kona_i2c_config_timing()
528 dev->base + TIM_OFFSET); in bcm_kona_i2c_config_timing()
530 writel((dev->std_cfg->time_m << CLKEN_M_SHIFT) | in bcm_kona_i2c_config_timing()
531 (dev->std_cfg->time_n << CLKEN_N_SHIFT) | in bcm_kona_i2c_config_timing()
533 dev->base + CLKEN_OFFSET); in bcm_kona_i2c_config_timing()
538 writel((dev->hs_cfg->prescale << TIM_PRESCALE_SHIFT) | in bcm_kona_i2c_config_timing_hs()
539 (dev->hs_cfg->time_p << TIM_P_SHIFT) | in bcm_kona_i2c_config_timing_hs()
540 (dev->hs_cfg->no_div << TIM_NO_DIV_SHIFT) | in bcm_kona_i2c_config_timing_hs()
541 (dev->hs_cfg->time_div << TIM_DIV_SHIFT), in bcm_kona_i2c_config_timing_hs()
542 dev->base + TIM_OFFSET); in bcm_kona_i2c_config_timing_hs()
544 writel((dev->hs_cfg->hs_hold << HSTIM_HS_HOLD_SHIFT) | in bcm_kona_i2c_config_timing_hs()
545 (dev->hs_cfg->hs_high_phase << HSTIM_HS_HIGH_PHASE_SHIFT) | in bcm_kona_i2c_config_timing_hs()
546 (dev->hs_cfg->hs_setup << HSTIM_HS_SETUP_SHIFT), in bcm_kona_i2c_config_timing_hs()
547 dev->base + HSTIM_OFFSET); in bcm_kona_i2c_config_timing_hs()
549 writel(readl(dev->base + HSTIM_OFFSET) | HSTIM_HS_MODE_MASK, in bcm_kona_i2c_config_timing_hs()
550 dev->base + HSTIM_OFFSET); in bcm_kona_i2c_config_timing_hs()
565 rc = clk_set_rate(dev->external_clk, HS_EXT_CLK_FREQ); in bcm_kona_i2c_switch_to_hs()
567 dev_err(dev->device, "%s: clk_set_rate returned %d\n", in bcm_kona_i2c_switch_to_hs()
578 dev_err(dev->device, "High speed restart command failed\n"); in bcm_kona_i2c_switch_to_hs()
591 rc = clk_set_rate(dev->external_clk, STD_EXT_CLK_FREQ); in bcm_kona_i2c_switch_to_std()
593 dev_err(dev->device, "%s: clk_set_rate returned %d\n", in bcm_kona_i2c_switch_to_std()
609 rc = clk_prepare_enable(dev->external_clk); in bcm_kona_i2c_xfer()
611 dev_err(dev->device, "%s: peri clock enable failed. err %d\n", in bcm_kona_i2c_xfer()
617 writel(0, dev->base + PADCTL_OFFSET); in bcm_kona_i2c_xfer()
625 dev_err(dev->device, "Start command failed rc = %d\n", rc); in bcm_kona_i2c_xfer()
630 if (dev->hs_cfg) { in bcm_kona_i2c_xfer()
641 if ((i != 0) && ((pmsg->flags & I2C_M_NOSTART) == 0)) { in bcm_kona_i2c_xfer()
644 dev_err(dev->device, in bcm_kona_i2c_xfer()
651 if (!(pmsg->flags & I2C_M_NOSTART)) { in bcm_kona_i2c_xfer()
654 dev_err(dev->device, in bcm_kona_i2c_xfer()
656 pmsg->addr, i, rc); in bcm_kona_i2c_xfer()
662 if (pmsg->flags & I2C_M_RD) { in bcm_kona_i2c_xfer()
665 dev_err(dev->device, "read failure\n"); in bcm_kona_i2c_xfer()
671 dev_err(dev->device, "write failure"); in bcm_kona_i2c_xfer()
684 if (dev->hs_cfg) { in bcm_kona_i2c_xfer()
693 writel(PADCTL_PAD_OUT_EN_MASK, dev->base + PADCTL_OFFSET); in bcm_kona_i2c_xfer()
698 clk_disable_unprepare(dev->external_clk); in bcm_kona_i2c_xfer()
717 int ret = of_property_read_u32(dev->device->of_node, "clock-frequency", in bcm_kona_i2c_assign_bus_speed()
720 dev_err(dev->device, "missing clock-frequency property\n"); in bcm_kona_i2c_assign_bus_speed()
721 return -ENODEV; in bcm_kona_i2c_assign_bus_speed()
726 dev->std_cfg = &std_cfg_table[BCM_SPD_100K]; in bcm_kona_i2c_assign_bus_speed()
729 dev->std_cfg = &std_cfg_table[BCM_SPD_400K]; in bcm_kona_i2c_assign_bus_speed()
732 dev->std_cfg = &std_cfg_table[BCM_SPD_1MHZ]; in bcm_kona_i2c_assign_bus_speed()
736 dev->std_cfg = &std_cfg_table[BCM_SPD_100K]; in bcm_kona_i2c_assign_bus_speed()
737 dev->hs_cfg = &hs_cfg_table[BCM_SPD_3P4MHZ]; in bcm_kona_i2c_assign_bus_speed()
742 return -EINVAL; in bcm_kona_i2c_assign_bus_speed()
755 dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL); in bcm_kona_i2c_probe()
757 return -ENOMEM; in bcm_kona_i2c_probe()
760 dev->device = &pdev->dev; in bcm_kona_i2c_probe()
761 init_completion(&dev->done); in bcm_kona_i2c_probe()
764 dev->base = devm_platform_ioremap_resource(pdev, 0); in bcm_kona_i2c_probe()
765 if (IS_ERR(dev->base)) in bcm_kona_i2c_probe()
766 return -ENOMEM; in bcm_kona_i2c_probe()
769 dev->external_clk = devm_clk_get(dev->device, NULL); in bcm_kona_i2c_probe()
770 if (IS_ERR(dev->external_clk)) { in bcm_kona_i2c_probe()
771 dev_err(dev->device, "couldn't get clock\n"); in bcm_kona_i2c_probe()
772 return -ENODEV; in bcm_kona_i2c_probe()
775 rc = clk_set_rate(dev->external_clk, STD_EXT_CLK_FREQ); in bcm_kona_i2c_probe()
777 dev_err(dev->device, "%s: clk_set_rate returned %d\n", in bcm_kona_i2c_probe()
782 rc = clk_prepare_enable(dev->external_clk); in bcm_kona_i2c_probe()
784 dev_err(dev->device, "couldn't enable clock\n"); in bcm_kona_i2c_probe()
800 writel(0, dev->base + TOUT_OFFSET); in bcm_kona_i2c_probe()
807 dev->base + TXFCR_OFFSET); in bcm_kona_i2c_probe()
810 writel(0, dev->base + IER_OFFSET); in bcm_kona_i2c_probe()
819 dev->base + ISR_OFFSET); in bcm_kona_i2c_probe()
822 dev->irq = platform_get_irq(pdev, 0); in bcm_kona_i2c_probe()
823 if (dev->irq < 0) { in bcm_kona_i2c_probe()
824 rc = dev->irq; in bcm_kona_i2c_probe()
829 rc = devm_request_irq(&pdev->dev, dev->irq, bcm_kona_i2c_isr, in bcm_kona_i2c_probe()
830 IRQF_SHARED, pdev->name, dev); in bcm_kona_i2c_probe()
832 dev_err(dev->device, "failed to request irq %i\n", dev->irq); in bcm_kona_i2c_probe()
840 writel(PADCTL_PAD_OUT_EN_MASK, dev->base + PADCTL_OFFSET); in bcm_kona_i2c_probe()
846 clk_disable_unprepare(dev->external_clk); in bcm_kona_i2c_probe()
848 /* Add the i2c adapter */ in bcm_kona_i2c_probe()
849 adap = &dev->adapter; in bcm_kona_i2c_probe()
851 adap->owner = THIS_MODULE; in bcm_kona_i2c_probe()
852 strlcpy(adap->name, "Broadcom I2C adapter", sizeof(adap->name)); in bcm_kona_i2c_probe()
853 adap->algo = &bcm_algo; in bcm_kona_i2c_probe()
854 adap->dev.parent = &pdev->dev; in bcm_kona_i2c_probe()
855 adap->dev.of_node = pdev->dev.of_node; in bcm_kona_i2c_probe()
861 dev_info(dev->device, "device registered successfully\n"); in bcm_kona_i2c_probe()
867 clk_disable_unprepare(dev->external_clk); in bcm_kona_i2c_probe()
876 i2c_del_adapter(&dev->adapter); in bcm_kona_i2c_remove()
882 {.compatible = "brcm,kona-i2c",},
889 .name = "bcm-kona-i2c",
898 MODULE_DESCRIPTION("Broadcom Kona I2C Driver");