Lines Matching +full:i2c +full:- +full:lt +full:- +full:enable
1 // SPDX-License-Identifier: GPL-2.0
3 * Nuvoton NPCM7xx I2C Controller driver
11 #include <linux/i2c.h>
29 * External I2C Interface driver xfer indication values, which indicate status
58 /* I2C Bank (module had 2 banks of registers) */
64 /* Internal I2C states values (for the I2C module state machine). */
92 /* init register and default value required to enable module */
142 #define NPCM_I2CTXF_CTL 0x12 /* Tx-FIFO Control */
145 #define NPCM_I2CTXF_STS 0x1A /* Tx-FIFO Status */
146 #define NPCM_I2CRXF_STS 0x1C /* Rx-FIFO Status */
147 #define NPCM_I2CRXF_CTL 0x1E /* Rx-FIFO Control */
271 /* Status of one I2C module */
322 u8 i2cctl3 = ioread8(bus->reg + NPCM_I2CCTL3); in npcm_i2c_select_bank()
328 iowrite8(i2cctl3, bus->reg + NPCM_I2CCTL3); in npcm_i2c_select_bank()
333 bus->stop_ind = I2C_NO_STATUS_IND; in npcm_i2c_init_params()
334 bus->rd_size = 0; in npcm_i2c_init_params()
335 bus->wr_size = 0; in npcm_i2c_init_params()
336 bus->rd_ind = 0; in npcm_i2c_init_params()
337 bus->wr_ind = 0; in npcm_i2c_init_params()
338 bus->read_block_use = false; in npcm_i2c_init_params()
339 bus->int_time_stamp = 0; in npcm_i2c_init_params()
340 bus->PEC_use = false; in npcm_i2c_init_params()
341 bus->PEC_mask = 0; in npcm_i2c_init_params()
343 if (bus->slave) in npcm_i2c_init_params()
344 bus->master_or_slave = I2C_SLAVE; in npcm_i2c_init_params()
350 iowrite8(data, bus->reg + NPCM_I2CSDA); in npcm_i2c_wr_byte()
355 return ioread8(bus->reg + NPCM_I2CSDA); in npcm_i2c_rd_byte()
362 return !!(I2CCTL3_SCL_LVL & ioread8(bus->reg + NPCM_I2CCTL3)); in npcm_i2c_get_SCL()
369 return !!(I2CCTL3_SDA_LVL & ioread8(bus->reg + NPCM_I2CCTL3)); in npcm_i2c_get_SDA()
374 if (bus->operation == I2C_READ_OPER) in npcm_i2c_get_index()
375 return bus->rd_ind; in npcm_i2c_get_index()
376 if (bus->operation == I2C_WRITE_OPER) in npcm_i2c_get_index()
377 return bus->wr_ind; in npcm_i2c_get_index()
384 return bus->wr_size == 0 && bus->rd_size == 0; in npcm_i2c_is_quick()
396 iowrite8(0, bus->reg + npcm_i2caddr[i]); in npcm_i2c_disable()
400 i2cctl2 = ioread8(bus->reg + NPCM_I2CCTL2); in npcm_i2c_disable()
402 iowrite8(i2cctl2, bus->reg + NPCM_I2CCTL2); in npcm_i2c_disable()
404 bus->state = I2C_DISABLE; in npcm_i2c_disable()
409 u8 i2cctl2 = ioread8(bus->reg + NPCM_I2CCTL2); in npcm_i2c_enable()
412 iowrite8(i2cctl2, bus->reg + NPCM_I2CCTL2); in npcm_i2c_enable()
413 bus->state = I2C_IDLE; in npcm_i2c_enable()
416 /* enable\disable end of busy (EOB) interrupts */
417 static inline void npcm_i2c_eob_int(struct npcm_i2c *bus, bool enable) in npcm_i2c_eob_int() argument
422 val = ioread8(bus->reg + NPCM_I2CCST3); in npcm_i2c_eob_int()
424 iowrite8(val, bus->reg + NPCM_I2CCST3); in npcm_i2c_eob_int()
426 val = ioread8(bus->reg + NPCM_I2CCTL1); in npcm_i2c_eob_int()
428 if (enable) in npcm_i2c_eob_int()
432 iowrite8(val, bus->reg + NPCM_I2CCTL1); in npcm_i2c_eob_int()
439 tx_fifo_sts = ioread8(bus->reg + NPCM_I2CTXF_STS); in npcm_i2c_tx_fifo_empty()
452 rx_fifo_sts = ioread8(bus->reg + NPCM_I2CRXF_STS); in npcm_i2c_rx_fifo_full()
465 val = ioread8(bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_clear_fifo_int()
467 iowrite8(val, bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_clear_fifo_int()
474 val = ioread8(bus->reg + NPCM_I2CTXF_STS); in npcm_i2c_clear_tx_fifo()
476 iowrite8(val, bus->reg + NPCM_I2CTXF_STS); in npcm_i2c_clear_tx_fifo()
483 val = ioread8(bus->reg + NPCM_I2CRXF_STS); in npcm_i2c_clear_rx_fifo()
485 iowrite8(val, bus->reg + NPCM_I2CRXF_STS); in npcm_i2c_clear_rx_fifo()
488 static void npcm_i2c_int_enable(struct npcm_i2c *bus, bool enable) in npcm_i2c_int_enable() argument
492 val = ioread8(bus->reg + NPCM_I2CCTL1); in npcm_i2c_int_enable()
494 if (enable) in npcm_i2c_int_enable()
498 iowrite8(val, bus->reg + NPCM_I2CCTL1); in npcm_i2c_int_enable()
505 val = ioread8(bus->reg + NPCM_I2CCTL1); in npcm_i2c_master_start()
508 iowrite8(val, bus->reg + NPCM_I2CCTL1); in npcm_i2c_master_start()
516 * override HW issue: I2C may fail to supply stop condition in Master in npcm_i2c_master_stop()
521 val = ioread8(bus->reg + NPCM_I2CCTL1); in npcm_i2c_master_stop()
524 iowrite8(val, bus->reg + NPCM_I2CCTL1); in npcm_i2c_master_stop()
526 if (!bus->fifo_use) in npcm_i2c_master_stop()
531 if (bus->operation == I2C_READ_OPER) in npcm_i2c_master_stop()
536 iowrite8(0, bus->reg + NPCM_I2CTXF_CTL); in npcm_i2c_master_stop()
543 val = ioread8(bus->reg + NPCM_I2CCTL1); in npcm_i2c_stall_after_start()
549 iowrite8(val, bus->reg + NPCM_I2CCTL1); in npcm_i2c_stall_after_start()
556 val = ioread8(bus->reg + NPCM_I2CCTL1); in npcm_i2c_nack()
559 iowrite8(val, bus->reg + NPCM_I2CCTL1); in npcm_i2c_nack()
568 iowrite8(val, bus->reg + NPCM_I2CST); in npcm_i2c_clear_master_status()
572 static void npcm_i2c_slave_int_enable(struct npcm_i2c *bus, bool enable) in npcm_i2c_slave_int_enable() argument
576 /* enable interrupt on slave match: */ in npcm_i2c_slave_int_enable()
577 i2cctl1 = ioread8(bus->reg + NPCM_I2CCTL1); in npcm_i2c_slave_int_enable()
579 if (enable) in npcm_i2c_slave_int_enable()
583 iowrite8(i2cctl1, bus->reg + NPCM_I2CCTL1); in npcm_i2c_slave_int_enable()
587 u8 addr, bool enable) in npcm_i2c_slave_enable() argument
593 sa_reg = (addr & 0x7F) | FIELD_PREP(NPCM_I2CADDR_SAEN, enable); in npcm_i2c_slave_enable()
595 i2cctl1 = ioread8(bus->reg + NPCM_I2CCTL1); in npcm_i2c_slave_enable()
596 if (enable) in npcm_i2c_slave_enable()
600 iowrite8(i2cctl1, bus->reg + NPCM_I2CCTL1); in npcm_i2c_slave_enable()
603 i2cctl3 = ioread8(bus->reg + NPCM_I2CCTL3); in npcm_i2c_slave_enable()
604 if (enable) in npcm_i2c_slave_enable()
608 iowrite8(i2cctl3, bus->reg + NPCM_I2CCTL3); in npcm_i2c_slave_enable()
612 dev_err(bus->dev, "try to enable more than 2 SA not supported\n"); in npcm_i2c_slave_enable()
615 return -EFAULT; in npcm_i2c_slave_enable()
617 /* Set and enable the address */ in npcm_i2c_slave_enable()
618 iowrite8(sa_reg, bus->reg + npcm_i2caddr[addr_type]); in npcm_i2c_slave_enable()
619 npcm_i2c_slave_int_enable(bus, enable); in npcm_i2c_slave_enable()
636 i2cctl1 = ioread8(bus->reg + NPCM_I2CCTL1); in npcm_i2c_reset()
643 iowrite8(i2cctl1, bus->reg + NPCM_I2CCTL1); in npcm_i2c_reset()
646 iowrite8(NPCM_I2CCST_BB, bus->reg + NPCM_I2CCST); in npcm_i2c_reset()
647 iowrite8(0xFF, bus->reg + NPCM_I2CST); in npcm_i2c_reset()
653 iowrite8(NPCM_I2CFIF_CTS_CLR_FIFO, bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_reset()
656 if (bus->slave) { in npcm_i2c_reset()
657 addr = bus->slave->addr; in npcm_i2c_reset()
665 bus->state = I2C_IDLE; in npcm_i2c_reset()
670 return !!FIELD_GET(NPCM_I2CST_MASTER, ioread8(bus->reg + NPCM_I2CST)); in npcm_i2c_is_master()
680 msgs = bus->msgs; in npcm_i2c_callback()
681 msgs_num = bus->msgs_num; in npcm_i2c_callback()
683 * check that transaction was not timed-out, and msgs still in npcm_i2c_callback()
689 if (completion_done(&bus->cmd_complete)) in npcm_i2c_callback()
694 bus->cmd_err = bus->msgs_num; in npcm_i2c_callback()
698 if (bus->msgs) { in npcm_i2c_callback()
709 bus->cmd_err = -ENXIO; in npcm_i2c_callback()
714 bus->cmd_err = -EAGAIN; in npcm_i2c_callback()
718 /* I2C wake up */ in npcm_i2c_callback()
724 bus->operation = I2C_NO_OPER; in npcm_i2c_callback()
726 if (bus->slave) in npcm_i2c_callback()
727 bus->master_or_slave = I2C_SLAVE; in npcm_i2c_callback()
730 complete(&bus->cmd_complete); in npcm_i2c_callback()
735 if (bus->operation == I2C_WRITE_OPER) in npcm_i2c_fifo_usage()
737 ioread8(bus->reg + NPCM_I2CTXF_STS)); in npcm_i2c_fifo_usage()
738 if (bus->operation == I2C_READ_OPER) in npcm_i2c_fifo_usage()
740 ioread8(bus->reg + NPCM_I2CRXF_STS)); in npcm_i2c_fifo_usage()
752 size_free_fifo = I2C_HW_FIFO_SIZE - npcm_i2c_fifo_usage(bus); in npcm_i2c_write_to_fifo_master()
753 while (max_bytes-- && size_free_fifo) { in npcm_i2c_write_to_fifo_master()
754 if (bus->wr_ind < bus->wr_size) in npcm_i2c_write_to_fifo_master()
755 npcm_i2c_wr_byte(bus, bus->wr_buf[bus->wr_ind++]); in npcm_i2c_write_to_fifo_master()
758 size_free_fifo = I2C_HW_FIFO_SIZE - npcm_i2c_fifo_usage(bus); in npcm_i2c_write_to_fifo_master()
764 * configure the FIFO before using it. If nread is -1 RX FIFO will not be
771 if (!bus->fifo_use) in npcm_i2c_set_fifo()
790 if (bus->rd_ind == 0 && bus->read_block_use) { in npcm_i2c_set_fifo()
796 iowrite8(rxf_ctl, bus->reg + NPCM_I2CRXF_CTL); in npcm_i2c_set_fifo()
803 iowrite8(I2C_HW_FIFO_SIZE, bus->reg + NPCM_I2CTXF_CTL); in npcm_i2c_set_fifo()
805 iowrite8(nwrite, bus->reg + NPCM_I2CTXF_CTL); in npcm_i2c_set_fifo()
815 while (bytes_in_fifo--) { in npcm_i2c_read_fifo()
817 if (bus->rd_ind < bus->rd_size) in npcm_i2c_read_fifo()
818 bus->rd_buf[bus->rd_ind++] = data; in npcm_i2c_read_fifo()
839 dev_err(bus->dev, "get slave: try to use more than 2 SA not supported\n"); in npcm_i2c_get_slave_addr()
841 slave_add = ioread8(bus->reg + npcm_i2caddr[(int)addr_type]); in npcm_i2c_get_slave_addr()
850 /* Set the enable bit */ in npcm_i2c_remove_slave_addr()
854 if (ioread8(bus->reg + npcm_i2caddr[i]) == slave_add) in npcm_i2c_remove_slave_addr()
855 iowrite8(0, bus->reg + npcm_i2caddr[i]); in npcm_i2c_remove_slave_addr()
869 iowrite8(0, bus->reg + NPCM_I2CTXF_CTL); in npcm_i2c_write_fifo_slave()
870 while (max_bytes-- && I2C_HW_FIFO_SIZE != npcm_i2c_fifo_usage(bus)) { in npcm_i2c_write_fifo_slave()
871 if (bus->slv_wr_size <= 0) in npcm_i2c_write_fifo_slave()
873 bus->slv_wr_ind = bus->slv_wr_ind % I2C_HW_FIFO_SIZE; in npcm_i2c_write_fifo_slave()
874 npcm_i2c_wr_byte(bus, bus->slv_wr_buf[bus->slv_wr_ind]); in npcm_i2c_write_fifo_slave()
875 bus->slv_wr_ind++; in npcm_i2c_write_fifo_slave()
876 bus->slv_wr_ind = bus->slv_wr_ind % I2C_HW_FIFO_SIZE; in npcm_i2c_write_fifo_slave()
877 bus->slv_wr_size--; in npcm_i2c_write_fifo_slave()
885 if (!bus->slave) in npcm_i2c_read_fifo_slave()
888 while (bytes_in_fifo--) { in npcm_i2c_read_fifo_slave()
891 bus->slv_rd_ind = bus->slv_rd_ind % I2C_HW_FIFO_SIZE; in npcm_i2c_read_fifo_slave()
892 bus->slv_rd_buf[bus->slv_rd_ind] = data; in npcm_i2c_read_fifo_slave()
893 bus->slv_rd_ind++; in npcm_i2c_read_fifo_slave()
896 if (bus->slv_rd_ind == 1 && bus->read_block_use) in npcm_i2c_read_fifo_slave()
897 bus->slv_rd_size = data + bus->PEC_use + 1; in npcm_i2c_read_fifo_slave()
906 int ret = bus->slv_wr_ind; in npcm_i2c_slave_get_wr_buf()
910 if (bus->slv_wr_size >= I2C_HW_FIFO_SIZE) in npcm_i2c_slave_get_wr_buf()
912 if (bus->state == I2C_SLAVE_MATCH) { in npcm_i2c_slave_get_wr_buf()
913 i2c_slave_event(bus->slave, I2C_SLAVE_READ_REQUESTED, &value); in npcm_i2c_slave_get_wr_buf()
914 bus->state = I2C_OPER_STARTED; in npcm_i2c_slave_get_wr_buf()
916 i2c_slave_event(bus->slave, I2C_SLAVE_READ_PROCESSED, &value); in npcm_i2c_slave_get_wr_buf()
918 ind = (bus->slv_wr_ind + bus->slv_wr_size) % I2C_HW_FIFO_SIZE; in npcm_i2c_slave_get_wr_buf()
919 bus->slv_wr_buf[ind] = value; in npcm_i2c_slave_get_wr_buf()
920 bus->slv_wr_size++; in npcm_i2c_slave_get_wr_buf()
922 return I2C_HW_FIFO_SIZE - ret; in npcm_i2c_slave_get_wr_buf()
929 for (i = 0; i < bus->slv_rd_ind; i++) in npcm_i2c_slave_send_rd_buf()
930 i2c_slave_event(bus->slave, I2C_SLAVE_WRITE_RECEIVED, in npcm_i2c_slave_send_rd_buf()
931 &bus->slv_rd_buf[i]); in npcm_i2c_slave_send_rd_buf()
936 if (bus->slv_rd_ind) { in npcm_i2c_slave_send_rd_buf()
937 bus->slv_wr_size = 0; in npcm_i2c_slave_send_rd_buf()
938 bus->slv_wr_ind = 0; in npcm_i2c_slave_send_rd_buf()
941 bus->slv_rd_ind = 0; in npcm_i2c_slave_send_rd_buf()
942 bus->slv_rd_size = bus->adap.quirks->max_read_len; in npcm_i2c_slave_send_rd_buf()
951 bus->state = I2C_OPER_STARTED; in npcm_i2c_slave_receive()
952 bus->operation = I2C_READ_OPER; in npcm_i2c_slave_receive()
953 bus->slv_rd_size = nread; in npcm_i2c_slave_receive()
954 bus->slv_rd_ind = 0; in npcm_i2c_slave_receive()
956 iowrite8(0, bus->reg + NPCM_I2CTXF_CTL); in npcm_i2c_slave_receive()
957 iowrite8(I2C_HW_FIFO_SIZE, bus->reg + NPCM_I2CRXF_CTL); in npcm_i2c_slave_receive()
968 bus->operation = I2C_WRITE_OPER; in npcm_i2c_slave_xmit()
981 * NACK on read will be once reached to bus->adap->quirks->max_read_len.
991 ioread8(bus->reg + NPCM_I2CTXF_STS)); in npcm_i2c_slave_wr_buf_sync()
995 bus->slv_wr_size >= I2C_HW_FIFO_SIZE) in npcm_i2c_slave_wr_buf_sync()
999 bus->slv_wr_ind = bus->slv_wr_ind - left_in_fifo; in npcm_i2c_slave_wr_buf_sync()
1000 bus->slv_wr_size = bus->slv_wr_size + left_in_fifo; in npcm_i2c_slave_wr_buf_sync()
1002 if (bus->slv_wr_ind < 0) in npcm_i2c_slave_wr_buf_sync()
1003 bus->slv_wr_ind += I2C_HW_FIFO_SIZE; in npcm_i2c_slave_wr_buf_sync()
1008 if (NPCM_I2CST_XMIT & ioread8(bus->reg + NPCM_I2CST)) { in npcm_i2c_slave_rd_wr()
1013 bus->operation = I2C_WRITE_OPER; in npcm_i2c_slave_rd_wr()
1014 npcm_i2c_slave_xmit(bus, bus->adap.quirks->max_write_len, in npcm_i2c_slave_rd_wr()
1015 bus->slv_wr_buf); in npcm_i2c_slave_rd_wr()
1023 bus->operation = I2C_READ_OPER; in npcm_i2c_slave_rd_wr()
1025 bus->stop_ind = I2C_SLAVE_RCV_IND; in npcm_i2c_slave_rd_wr()
1027 npcm_i2c_slave_receive(bus, bus->adap.quirks->max_read_len, in npcm_i2c_slave_rd_wr()
1028 bus->slv_rd_buf); in npcm_i2c_slave_rd_wr()
1036 u8 i2cst = ioread8(bus->reg + NPCM_I2CST); in npcm_i2c_int_slave_handler()
1040 bus->stop_ind = I2C_NACK_IND; in npcm_i2c_int_slave_handler()
1042 if (bus->fifo_use) in npcm_i2c_int_slave_handler()
1045 bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_int_slave_handler()
1048 bus->stop_ind = I2C_NO_STATUS_IND; in npcm_i2c_int_slave_handler()
1049 bus->operation = I2C_NO_OPER; in npcm_i2c_int_slave_handler()
1050 bus->own_slave_addr = 0xFF; in npcm_i2c_int_slave_handler()
1056 iowrite8(NPCM_I2CST_NEGACK, bus->reg + NPCM_I2CST); in npcm_i2c_int_slave_handler()
1067 bus->stop_ind = I2C_BUS_ERR_IND; in npcm_i2c_int_slave_handler()
1070 iowrite8(NPCM_I2CFIF_CTS_CLR_FIFO, bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_int_slave_handler()
1072 bus->state = I2C_IDLE; in npcm_i2c_int_slave_handler()
1078 if (completion_done(&bus->cmd_complete) == false) { in npcm_i2c_int_slave_handler()
1079 bus->cmd_err = -EIO; in npcm_i2c_int_slave_handler()
1080 complete(&bus->cmd_complete); in npcm_i2c_int_slave_handler()
1082 bus->own_slave_addr = 0xFF; in npcm_i2c_int_slave_handler()
1083 iowrite8(NPCM_I2CST_BER, bus->reg + NPCM_I2CST); in npcm_i2c_int_slave_handler()
1091 bus->stop_ind = I2C_SLAVE_DONE_IND; in npcm_i2c_int_slave_handler()
1093 if (bus->operation == I2C_READ_OPER) in npcm_i2c_int_slave_handler()
1100 bus->stop_ind = I2C_NO_STATUS_IND; in npcm_i2c_int_slave_handler()
1107 bus->operation = I2C_NO_OPER; in npcm_i2c_int_slave_handler()
1108 bus->own_slave_addr = 0xFF; in npcm_i2c_int_slave_handler()
1109 i2c_slave_event(bus->slave, I2C_SLAVE_STOP, 0); in npcm_i2c_int_slave_handler()
1110 iowrite8(NPCM_I2CST_SLVSTP, bus->reg + NPCM_I2CST); in npcm_i2c_int_slave_handler()
1111 if (bus->fifo_use) { in npcm_i2c_int_slave_handler()
1117 bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_int_slave_handler()
1119 bus->state = I2C_IDLE; in npcm_i2c_int_slave_handler()
1123 /* restart condition occurred and Rx-FIFO was not empty */ in npcm_i2c_int_slave_handler()
1124 if (bus->fifo_use && FIELD_GET(NPCM_I2CFIF_CTS_SLVRSTR, in npcm_i2c_int_slave_handler()
1125 ioread8(bus->reg + NPCM_I2CFIF_CTS))) { in npcm_i2c_int_slave_handler()
1126 bus->stop_ind = I2C_SLAVE_RESTART_IND; in npcm_i2c_int_slave_handler()
1127 bus->master_or_slave = I2C_SLAVE; in npcm_i2c_int_slave_handler()
1128 if (bus->operation == I2C_READ_OPER) in npcm_i2c_int_slave_handler()
1130 bus->operation = I2C_WRITE_OPER; in npcm_i2c_int_slave_handler()
1131 iowrite8(0, bus->reg + NPCM_I2CRXF_CTL); in npcm_i2c_int_slave_handler()
1134 iowrite8(val, bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_int_slave_handler()
1144 bus->master_or_slave = I2C_SLAVE; in npcm_i2c_int_slave_handler()
1148 iowrite8(0, bus->reg + NPCM_I2CTXF_CTL); in npcm_i2c_int_slave_handler()
1149 iowrite8(I2C_HW_FIFO_SIZE, bus->reg + NPCM_I2CRXF_CTL); in npcm_i2c_int_slave_handler()
1151 bus->operation = I2C_WRITE_OPER; in npcm_i2c_int_slave_handler()
1153 i2c_slave_event(bus->slave, I2C_SLAVE_WRITE_REQUESTED, in npcm_i2c_int_slave_handler()
1155 bus->operation = I2C_READ_OPER; in npcm_i2c_int_slave_handler()
1157 if (bus->own_slave_addr == 0xFF) { in npcm_i2c_int_slave_handler()
1159 val = ioread8(bus->reg + NPCM_I2CCST); in npcm_i2c_int_slave_handler()
1166 i2ccst3 = ioread8(bus->reg + NPCM_I2CCST3); in npcm_i2c_int_slave_handler()
1167 i2ccst2 = ioread8(bus->reg + NPCM_I2CCST2); in npcm_i2c_int_slave_handler()
1170 * the i2c module can response to 10 own SA. in npcm_i2c_int_slave_handler()
1180 bus->own_slave_addr = addr; in npcm_i2c_int_slave_handler()
1181 if (bus->PEC_mask & BIT(info)) in npcm_i2c_int_slave_handler()
1182 bus->PEC_use = true; in npcm_i2c_int_slave_handler()
1184 bus->PEC_use = false; in npcm_i2c_int_slave_handler()
1187 bus->own_slave_addr = 0; in npcm_i2c_int_slave_handler()
1189 bus->own_slave_addr = 0x61; in npcm_i2c_int_slave_handler()
1198 * (regular write-read mode) in npcm_i2c_int_slave_handler()
1200 if ((bus->state == I2C_OPER_STARTED && in npcm_i2c_int_slave_handler()
1201 bus->operation == I2C_READ_OPER && in npcm_i2c_int_slave_handler()
1202 bus->stop_ind == I2C_SLAVE_XMIT_IND) || in npcm_i2c_int_slave_handler()
1203 bus->stop_ind == I2C_SLAVE_RCV_IND) { in npcm_i2c_int_slave_handler()
1205 bus->stop_ind = I2C_SLAVE_RESTART_IND; in npcm_i2c_int_slave_handler()
1210 bus->stop_ind = I2C_SLAVE_XMIT_IND; in npcm_i2c_int_slave_handler()
1212 bus->stop_ind = I2C_SLAVE_RCV_IND; in npcm_i2c_int_slave_handler()
1213 bus->state = I2C_SLAVE_MATCH; in npcm_i2c_int_slave_handler()
1215 iowrite8(NPCM_I2CST_NMATCH, bus->reg + NPCM_I2CST); in npcm_i2c_int_slave_handler()
1219 /* Slave SDA status is set - tx or rx */ in npcm_i2c_int_slave_handler()
1221 (bus->fifo_use && in npcm_i2c_int_slave_handler()
1224 iowrite8(NPCM_I2CST_SDAST, bus->reg + NPCM_I2CST); in npcm_i2c_int_slave_handler()
1243 struct npcm_i2c *bus = i2c_get_adapdata(client->adapter); in npcm_i2c_reg_slave()
1245 bus->slave = client; in npcm_i2c_reg_slave()
1247 if (!bus->slave) in npcm_i2c_reg_slave()
1248 return -EINVAL; in npcm_i2c_reg_slave()
1250 if (client->flags & I2C_CLIENT_TEN) in npcm_i2c_reg_slave()
1251 return -EAFNOSUPPORT; in npcm_i2c_reg_slave()
1253 spin_lock_irqsave(&bus->lock, lock_flags); in npcm_i2c_reg_slave()
1256 bus->slv_rd_size = 0; in npcm_i2c_reg_slave()
1257 bus->slv_wr_size = 0; in npcm_i2c_reg_slave()
1258 bus->slv_rd_ind = 0; in npcm_i2c_reg_slave()
1259 bus->slv_wr_ind = 0; in npcm_i2c_reg_slave()
1260 if (client->flags & I2C_CLIENT_PEC) in npcm_i2c_reg_slave()
1261 bus->PEC_use = true; in npcm_i2c_reg_slave()
1263 dev_info(bus->dev, "i2c%d register slave SA=0x%x, PEC=%d\n", bus->num, in npcm_i2c_reg_slave()
1264 client->addr, bus->PEC_use); in npcm_i2c_reg_slave()
1266 npcm_i2c_slave_enable(bus, I2C_SLAVE_ADDR1, client->addr, true); in npcm_i2c_reg_slave()
1272 spin_unlock_irqrestore(&bus->lock, lock_flags); in npcm_i2c_reg_slave()
1278 struct npcm_i2c *bus = client->adapter->algo_data; in npcm_i2c_unreg_slave()
1281 spin_lock_irqsave(&bus->lock, lock_flags); in npcm_i2c_unreg_slave()
1282 if (!bus->slave) { in npcm_i2c_unreg_slave()
1283 spin_unlock_irqrestore(&bus->lock, lock_flags); in npcm_i2c_unreg_slave()
1284 return -EINVAL; in npcm_i2c_unreg_slave()
1287 npcm_i2c_remove_slave_addr(bus, client->addr); in npcm_i2c_unreg_slave()
1288 bus->slave = NULL; in npcm_i2c_unreg_slave()
1289 spin_unlock_irqrestore(&bus->lock, lock_flags); in npcm_i2c_unreg_slave()
1301 rcount = bus->rd_size - bus->rd_ind; in npcm_i2c_master_fifo_read()
1311 fifo_bytes = rcount - I2C_HW_FIFO_SIZE; in npcm_i2c_master_fifo_read()
1314 /* last bytes are about to be read - end of tx */ in npcm_i2c_master_fifo_read()
1315 bus->state = I2C_STOP_PENDING; in npcm_i2c_master_fifo_read()
1316 bus->stop_ind = ind; in npcm_i2c_master_fifo_read()
1323 rcount = bus->rd_size - bus->rd_ind; in npcm_i2c_master_fifo_read()
1324 npcm_i2c_set_fifo(bus, rcount, -1); in npcm_i2c_master_fifo_read()
1332 if (bus->fifo_use) in npcm_i2c_irq_master_handler_write()
1335 /* Master write operation - last byte handling */ in npcm_i2c_irq_master_handler_write()
1336 if (bus->wr_ind == bus->wr_size) { in npcm_i2c_irq_master_handler_write()
1337 if (bus->fifo_use && npcm_i2c_fifo_usage(bus) > 0) in npcm_i2c_irq_master_handler_write()
1347 if (bus->rd_size == 0) { in npcm_i2c_irq_master_handler_write()
1350 bus->state = I2C_STOP_PENDING; in npcm_i2c_irq_master_handler_write()
1351 bus->stop_ind = I2C_MASTER_DONE_IND; in npcm_i2c_irq_master_handler_write()
1357 /* last write-byte written on previous int - restart */ in npcm_i2c_irq_master_handler_write()
1358 npcm_i2c_set_fifo(bus, bus->rd_size, -1); in npcm_i2c_irq_master_handler_write()
1363 * Receiving one byte only - stall after successful in npcm_i2c_irq_master_handler_write()
1366 * unintentionally NACK the next multi-byte read. in npcm_i2c_irq_master_handler_write()
1368 if (bus->rd_size == 1) in npcm_i2c_irq_master_handler_write()
1372 bus->operation = I2C_READ_OPER; in npcm_i2c_irq_master_handler_write()
1374 npcm_i2c_wr_byte(bus, bus->dest_addr | 0x1); in npcm_i2c_irq_master_handler_write()
1378 if (!bus->fifo_use || bus->wr_size == 1) { in npcm_i2c_irq_master_handler_write()
1379 npcm_i2c_wr_byte(bus, bus->wr_buf[bus->wr_ind++]); in npcm_i2c_irq_master_handler_write()
1381 wcount = bus->wr_size - bus->wr_ind; in npcm_i2c_irq_master_handler_write()
1382 npcm_i2c_set_fifo(bus, -1, wcount); in npcm_i2c_irq_master_handler_write()
1395 block_extra_bytes_size = bus->read_block_use + bus->PEC_use; in npcm_i2c_irq_master_handler_read()
1401 if (bus->rd_ind == 0) { /* first byte handling: */ in npcm_i2c_irq_master_handler_read()
1402 if (bus->read_block_use) { in npcm_i2c_irq_master_handler_read()
1406 bus->rd_size = data + block_extra_bytes_size; in npcm_i2c_irq_master_handler_read()
1407 bus->rd_buf[bus->rd_ind++] = data; in npcm_i2c_irq_master_handler_read()
1410 if (bus->fifo_use) { in npcm_i2c_irq_master_handler_read()
1411 data = ioread8(bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_irq_master_handler_read()
1413 iowrite8(data, bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_irq_master_handler_read()
1416 npcm_i2c_set_fifo(bus, bus->rd_size - 1, -1); in npcm_i2c_irq_master_handler_read()
1423 if (bus->rd_size == block_extra_bytes_size && in npcm_i2c_irq_master_handler_read()
1424 bus->read_block_use) { in npcm_i2c_irq_master_handler_read()
1425 bus->state = I2C_STOP_PENDING; in npcm_i2c_irq_master_handler_read()
1426 bus->stop_ind = I2C_BLOCK_BYTES_ERR_IND; in npcm_i2c_irq_master_handler_read()
1427 bus->cmd_err = -EIO; in npcm_i2c_irq_master_handler_read()
1439 iowrite8(NPCM_I2CST_NMATCH, bus->reg + NPCM_I2CST); in npcm_i2c_irq_handle_nmatch()
1441 bus->stop_ind = I2C_BUS_ERR_IND; in npcm_i2c_irq_handle_nmatch()
1442 npcm_i2c_callback(bus, bus->stop_ind, npcm_i2c_get_index(bus)); in npcm_i2c_irq_handle_nmatch()
1450 if (bus->nack_cnt < ULLONG_MAX) in npcm_i2c_irq_handle_nack()
1451 bus->nack_cnt++; in npcm_i2c_irq_handle_nack()
1453 if (bus->fifo_use) { in npcm_i2c_irq_handle_nack()
1458 if (bus->operation == I2C_WRITE_OPER) in npcm_i2c_irq_handle_nack()
1459 bus->wr_ind -= npcm_i2c_fifo_usage(bus); in npcm_i2c_irq_handle_nack()
1462 iowrite8(NPCM_I2CFIF_CTS_CLR_FIFO, bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_irq_handle_nack()
1466 bus->stop_ind = I2C_NACK_IND; in npcm_i2c_irq_handle_nack()
1481 readx_poll_timeout_atomic(ioread8, bus->reg + NPCM_I2CCST, val, in npcm_i2c_irq_handle_nack()
1486 bus->state = I2C_IDLE; in npcm_i2c_irq_handle_nack()
1493 npcm_i2c_callback(bus, bus->stop_ind, bus->wr_ind); in npcm_i2c_irq_handle_nack()
1499 if (bus->ber_cnt < ULLONG_MAX) in npcm_i2c_irq_handle_ber()
1500 bus->ber_cnt++; in npcm_i2c_irq_handle_ber()
1501 bus->stop_ind = I2C_BUS_ERR_IND; in npcm_i2c_irq_handle_ber()
1508 iowrite8(NPCM_I2CCST_BB, bus->reg + NPCM_I2CCST); in npcm_i2c_irq_handle_ber()
1510 bus->cmd_err = -EAGAIN; in npcm_i2c_irq_handle_ber()
1511 npcm_i2c_callback(bus, bus->stop_ind, npcm_i2c_get_index(bus)); in npcm_i2c_irq_handle_ber()
1513 bus->state = I2C_IDLE; in npcm_i2c_irq_handle_ber()
1520 bus->state = I2C_IDLE; in npcm_i2c_irq_handle_eob()
1521 npcm_i2c_callback(bus, bus->stop_ind, bus->rd_ind); in npcm_i2c_irq_handle_eob()
1528 bus->state = I2C_STOP_PENDING; in npcm_i2c_irq_handle_stall_after_start()
1529 bus->stop_ind = I2C_MASTER_DONE_IND; in npcm_i2c_irq_handle_stall_after_start()
1532 } else if ((bus->rd_size == 1) && !bus->read_block_use) { in npcm_i2c_irq_handle_stall_after_start()
1534 * Receiving one byte only - set NACK after ensuring in npcm_i2c_irq_handle_stall_after_start()
1540 /* Reset stall-after-address-byte */ in npcm_i2c_irq_handle_stall_after_start()
1544 iowrite8(NPCM_I2CST_STASTR, bus->reg + NPCM_I2CST); in npcm_i2c_irq_handle_stall_after_start()
1547 /* SDA status is set - TX or RX, master */
1555 if (bus->state == I2C_IDLE) { in npcm_i2c_irq_handle_sda()
1556 bus->stop_ind = I2C_WAKE_UP_IND; in npcm_i2c_irq_handle_sda()
1558 if (npcm_i2c_is_quick(bus) || bus->read_block_use) in npcm_i2c_irq_handle_sda()
1568 * Receiving one byte only - stall after successful completion in npcm_i2c_irq_handle_sda()
1571 * multi-byte read in npcm_i2c_irq_handle_sda()
1573 if (bus->wr_size == 0 && bus->rd_size == 1) in npcm_i2c_irq_handle_sda()
1576 /* Initiate I2C master tx */ in npcm_i2c_irq_handle_sda()
1581 fif_cts = ioread8(bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_irq_handle_sda()
1586 iowrite8(fif_cts, bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_irq_handle_sda()
1588 /* re-enable */ in npcm_i2c_irq_handle_sda()
1590 iowrite8(fif_cts, bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_irq_handle_sda()
1599 if (bus->wr_size) in npcm_i2c_irq_handle_sda()
1600 npcm_i2c_set_fifo(bus, -1, bus->wr_size); in npcm_i2c_irq_handle_sda()
1602 npcm_i2c_set_fifo(bus, bus->rd_size, -1); in npcm_i2c_irq_handle_sda()
1604 bus->state = I2C_OPER_STARTED; in npcm_i2c_irq_handle_sda()
1606 if (npcm_i2c_is_quick(bus) || bus->wr_size) in npcm_i2c_irq_handle_sda()
1607 npcm_i2c_wr_byte(bus, bus->dest_addr); in npcm_i2c_irq_handle_sda()
1609 npcm_i2c_wr_byte(bus, bus->dest_addr | BIT(0)); in npcm_i2c_irq_handle_sda()
1613 bus->operation = I2C_WRITE_OPER; in npcm_i2c_irq_handle_sda()
1616 bus->operation = I2C_READ_OPER; in npcm_i2c_irq_handle_sda()
1625 int ret = -EIO; in npcm_i2c_int_master_handler()
1627 i2cst = ioread8(bus->reg + NPCM_I2CST); in npcm_i2c_int_master_handler()
1647 ioread8(bus->reg + NPCM_I2CCTL1)) == 1) && in npcm_i2c_int_master_handler()
1649 ioread8(bus->reg + NPCM_I2CCST3)))) { in npcm_i2c_int_master_handler()
1660 /* SDA status is set - TX or RX, master */ in npcm_i2c_int_master_handler()
1662 (bus->fifo_use && in npcm_i2c_int_master_handler()
1677 int status = -ENOTRECOVERABLE; in npcm_i2c_recovery_tgclk()
1683 dev_dbg(bus->dev, "bus%d-0x%x recovery skipped, bus not stuck", in npcm_i2c_recovery_tgclk()
1684 bus->num, bus->dest_addr); in npcm_i2c_recovery_tgclk()
1692 iowrite8(NPCM_I2CCST_BB, bus->reg + NPCM_I2CCST); in npcm_i2c_recovery_tgclk()
1695 iowrite8(0, bus->reg + NPCM_I2CRXF_CTL); in npcm_i2c_recovery_tgclk()
1696 iowrite8(0, bus->reg + NPCM_I2CTXF_CTL); in npcm_i2c_recovery_tgclk()
1703 fif_cts = ioread8(bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_recovery_tgclk()
1706 iowrite8(fif_cts, bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_recovery_tgclk()
1707 npcm_i2c_set_fifo(bus, -1, 0); in npcm_i2c_recovery_tgclk()
1712 iowrite8(NPCM_I2CCST_TGSCL, bus->reg + NPCM_I2CCST); in npcm_i2c_recovery_tgclk()
1719 } while (!done && iter--); in npcm_i2c_recovery_tgclk()
1721 /* If SDA line is released: send start-addr-stop, to re-sync. */ in npcm_i2c_recovery_tgclk()
1724 npcm_i2c_wr_byte(bus, bus->dest_addr); in npcm_i2c_recovery_tgclk()
1742 status = -ENOTRECOVERABLE; in npcm_i2c_recovery_tgclk()
1744 if (bus->rec_fail_cnt < ULLONG_MAX) in npcm_i2c_recovery_tgclk()
1745 bus->rec_fail_cnt++; in npcm_i2c_recovery_tgclk()
1747 if (bus->rec_succ_cnt < ULLONG_MAX) in npcm_i2c_recovery_tgclk()
1748 bus->rec_succ_cnt++; in npcm_i2c_recovery_tgclk()
1757 struct i2c_bus_recovery_info *rinfo = &bus->rinfo; in npcm_i2c_recovery_init()
1759 rinfo->recover_bus = npcm_i2c_recovery_tgclk; in npcm_i2c_recovery_init()
1762 * npcm i2c HW allows direct reading of SCL and SDA. in npcm_i2c_recovery_init()
1767 rinfo->get_scl = npcm_i2c_get_SCL; in npcm_i2c_recovery_init()
1768 rinfo->get_sda = npcm_i2c_get_SDA; in npcm_i2c_recovery_init()
1769 _adap->bus_recovery_info = rinfo; in npcm_i2c_recovery_init()
1779 * NPCM7XX i2c module timing parameters are depenent on module core clk (APB)
1781 * 100kHz bus requires tSCL = 4 * SCLFRQ * tCLK. LT and HT are simetric.
1782 * 400kHz bus requires assymetric HT and LT. A different equation is recomended
1797 src_clk_khz = bus->apb_clk / 1000; in npcm_i2c_init_clk()
1799 bus->bus_freq = bus_freq_hz; in npcm_i2c_init_clk()
1806 return -EDOM; in npcm_i2c_init_clk()
1823 return -EDOM; in npcm_i2c_init_clk()
1847 return -EDOM; in npcm_i2c_init_clk()
1856 * SDA hold time: (HLDT-7) * T(CLK) >= 120 in npcm_i2c_init_clk()
1868 return -EINVAL; in npcm_i2c_init_clk()
1875 return -EDOM; in npcm_i2c_init_clk()
1880 bus->reg + NPCM_I2CCTL2); in npcm_i2c_init_clk()
1884 bus->reg + NPCM_I2CCTL3); in npcm_i2c_init_clk()
1892 * k1 = 2 * SCLLT7-0 -> Low Time = k1 / 2 in npcm_i2c_init_clk()
1893 * k2 = 2 * SCLLT7-0 -> High Time = k2 / 2 in npcm_i2c_init_clk()
1895 iowrite8(k1 / 2, bus->reg + NPCM_I2CSCLLT); in npcm_i2c_init_clk()
1896 iowrite8(k2 / 2, bus->reg + NPCM_I2CSCLHT); in npcm_i2c_init_clk()
1898 iowrite8(dbnct, bus->reg + NPCM_I2CCTL5); in npcm_i2c_init_clk()
1901 iowrite8(hldt, bus->reg + NPCM_I2CCTL4); in npcm_i2c_init_clk()
1916 if ((bus->state != I2C_DISABLE && bus->state != I2C_IDLE) || in npcm_i2c_init_module()
1918 return -EINVAL; in npcm_i2c_init_module()
1924 if (FIELD_GET(I2C_VER_FIFO_EN, ioread8(bus->reg + I2C_VER))) { in npcm_i2c_init_module()
1925 bus->fifo_use = true; in npcm_i2c_init_module()
1927 val = ioread8(bus->reg + NPCM_I2CFIF_CTL); in npcm_i2c_init_module()
1929 iowrite8(val, bus->reg + NPCM_I2CFIF_CTL); in npcm_i2c_init_module()
1932 bus->fifo_use = false; in npcm_i2c_init_module()
1935 /* Configure I2C module clock frequency */ in npcm_i2c_init_module()
1938 dev_err(bus->dev, "npcm_i2c_init_clk failed\n"); in npcm_i2c_init_module()
1942 /* Enable module (before configuring CTL1) */ in npcm_i2c_init_module()
1944 bus->state = I2C_IDLE; in npcm_i2c_init_module()
1945 val = ioread8(bus->reg + NPCM_I2CCTL1); in npcm_i2c_init_module()
1947 iowrite8(val, bus->reg + NPCM_I2CCTL1); in npcm_i2c_init_module()
1952 if ((npcm_i2c_get_SDA(&bus->adap) == 0) || (npcm_i2c_get_SCL(&bus->adap) == 0)) { in npcm_i2c_init_module()
1953 dev_err(bus->dev, "I2C%d init fail: lines are low\n", bus->num); in npcm_i2c_init_module()
1954 dev_err(bus->dev, "SDA=%d SCL=%d\n", npcm_i2c_get_SDA(&bus->adap), in npcm_i2c_init_module()
1955 npcm_i2c_get_SCL(&bus->adap)); in npcm_i2c_init_module()
1956 return -ENXIO; in npcm_i2c_init_module()
1969 bus->state = I2C_DISABLE; in __npcm_i2c_init()
1970 bus->master_or_slave = I2C_SLAVE; in __npcm_i2c_init()
1971 bus->int_time_stamp = 0; in __npcm_i2c_init()
1973 bus->slave = NULL; in __npcm_i2c_init()
1976 ret = device_property_read_u32(&pdev->dev, "clock-frequency", in __npcm_i2c_init()
1979 dev_info(&pdev->dev, "Could not read clock-frequency property"); in __npcm_i2c_init()
1985 dev_err(&pdev->dev, "npcm_i2c_init_module failed\n"); in __npcm_i2c_init()
1997 bus->master_or_slave = I2C_MASTER; in npcm_i2c_bus_irq()
1999 if (bus->master_or_slave == I2C_MASTER) { in npcm_i2c_bus_irq()
2000 bus->int_time_stamp = jiffies; in npcm_i2c_bus_irq()
2005 if (bus->slave) { in npcm_i2c_bus_irq()
2006 bus->master_or_slave = I2C_SLAVE; in npcm_i2c_bus_irq()
2022 if (bus->state != I2C_IDLE) { in npcm_i2c_master_start_xmit()
2023 bus->cmd_err = -EBUSY; in npcm_i2c_master_start_xmit()
2026 bus->dest_addr = slave_addr << 1; in npcm_i2c_master_start_xmit()
2027 bus->wr_buf = write_data; in npcm_i2c_master_start_xmit()
2028 bus->wr_size = nwrite; in npcm_i2c_master_start_xmit()
2029 bus->wr_ind = 0; in npcm_i2c_master_start_xmit()
2030 bus->rd_buf = read_data; in npcm_i2c_master_start_xmit()
2031 bus->rd_size = nread; in npcm_i2c_master_start_xmit()
2032 bus->rd_ind = 0; in npcm_i2c_master_start_xmit()
2033 bus->PEC_use = 0; in npcm_i2c_master_start_xmit()
2035 /* for tx PEC is appended to buffer from i2c IF. PEC flag is ignored */ in npcm_i2c_master_start_xmit()
2037 bus->PEC_use = use_PEC; in npcm_i2c_master_start_xmit()
2039 bus->read_block_use = use_read_block; in npcm_i2c_master_start_xmit()
2041 bus->operation = I2C_READ_OPER; in npcm_i2c_master_start_xmit()
2043 bus->operation = I2C_WRITE_OPER; in npcm_i2c_master_start_xmit()
2044 if (bus->fifo_use) { in npcm_i2c_master_start_xmit()
2049 i2cfif_cts = ioread8(bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_master_start_xmit()
2052 iowrite8(i2cfif_cts, bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_master_start_xmit()
2055 bus->state = I2C_IDLE; in npcm_i2c_master_start_xmit()
2076 if (bus->state == I2C_DISABLE) { in npcm_i2c_master_xfer()
2077 dev_err(bus->dev, "I2C%d module is disabled", bus->num); in npcm_i2c_master_xfer()
2078 return -EINVAL; in npcm_i2c_master_xfer()
2082 slave_addr = msg0->addr; in npcm_i2c_master_xfer()
2083 if (msg0->flags & I2C_M_RD) { /* read */ in npcm_i2c_master_xfer()
2086 read_data = msg0->buf; in npcm_i2c_master_xfer()
2087 if (msg0->flags & I2C_M_RECV_LEN) { in npcm_i2c_master_xfer()
2090 if (msg0->flags & I2C_CLIENT_PEC) in npcm_i2c_master_xfer()
2093 nread = msg0->len; in npcm_i2c_master_xfer()
2096 nwrite = msg0->len; in npcm_i2c_master_xfer()
2097 write_data = msg0->buf; in npcm_i2c_master_xfer()
2102 read_data = msg1->buf; in npcm_i2c_master_xfer()
2103 if (msg1->flags & I2C_M_RECV_LEN) { in npcm_i2c_master_xfer()
2106 if (msg1->flags & I2C_CLIENT_PEC) in npcm_i2c_master_xfer()
2109 nread = msg1->len; in npcm_i2c_master_xfer()
2120 timeout_usec = (2 * 9 * USEC_PER_SEC / bus->bus_freq) * (2 + nread + nwrite); in npcm_i2c_master_xfer()
2121 timeout = max_t(unsigned long, bus->adap.timeout, usecs_to_jiffies(timeout_usec)); in npcm_i2c_master_xfer()
2123 dev_err(bus->dev, "i2c%d buffer too big\n", bus->num); in npcm_i2c_master_xfer()
2124 return -EINVAL; in npcm_i2c_master_xfer()
2134 spin_lock_irqsave(&bus->lock, flags); in npcm_i2c_master_xfer()
2135 bus_busy = ioread8(bus->reg + NPCM_I2CCST) & NPCM_I2CCST_BB; in npcm_i2c_master_xfer()
2137 if (!bus_busy && bus->slave) in npcm_i2c_master_xfer()
2138 iowrite8((bus->slave->addr & 0x7F), in npcm_i2c_master_xfer()
2139 bus->reg + NPCM_I2CADDR1); in npcm_i2c_master_xfer()
2141 spin_unlock_irqrestore(&bus->lock, flags); in npcm_i2c_master_xfer()
2146 iowrite8(NPCM_I2CCST_BB, bus->reg + NPCM_I2CCST); in npcm_i2c_master_xfer()
2149 return -EAGAIN; in npcm_i2c_master_xfer()
2153 bus->dest_addr = slave_addr; in npcm_i2c_master_xfer()
2154 bus->msgs = msgs; in npcm_i2c_master_xfer()
2155 bus->msgs_num = num; in npcm_i2c_master_xfer()
2156 bus->cmd_err = 0; in npcm_i2c_master_xfer()
2157 bus->read_block_use = read_block; in npcm_i2c_master_xfer()
2159 reinit_completion(&bus->cmd_complete); in npcm_i2c_master_xfer()
2166 time_left = wait_for_completion_timeout(&bus->cmd_complete, in npcm_i2c_master_xfer()
2170 if (bus->timeout_cnt < ULLONG_MAX) in npcm_i2c_master_xfer()
2171 bus->timeout_cnt++; in npcm_i2c_master_xfer()
2172 if (bus->master_or_slave == I2C_MASTER) { in npcm_i2c_master_xfer()
2174 bus->cmd_err = -EIO; in npcm_i2c_master_xfer()
2175 bus->state = I2C_IDLE; in npcm_i2c_master_xfer()
2181 if (bus->cmd_err == -EAGAIN) in npcm_i2c_master_xfer()
2182 bus->cmd_err = i2c_recover_bus(adap); in npcm_i2c_master_xfer()
2189 else if (bus->cmd_err && in npcm_i2c_master_xfer()
2190 (NPCM_I2CRXF_CTL_LAST_PEC & ioread8(bus->reg + NPCM_I2CRXF_CTL))) in npcm_i2c_master_xfer()
2199 if (bus->slave) in npcm_i2c_master_xfer()
2200 iowrite8((bus->slave->addr & 0x7F) | NPCM_I2CADDR_SAEN, in npcm_i2c_master_xfer()
2201 bus->reg + NPCM_I2CADDR1); in npcm_i2c_master_xfer()
2205 return bus->cmd_err; in npcm_i2c_master_xfer()
2232 /* i2c debugfs directory: used to keep health monitor of i2c devices */
2242 d = debugfs_create_dir(dev_name(&pdev->dev), npcm_i2c_debugfs_dir); in npcm_i2c_init_debugfs()
2245 debugfs_create_u64("ber_cnt", 0444, d, &bus->ber_cnt); in npcm_i2c_init_debugfs()
2246 debugfs_create_u64("nack_cnt", 0444, d, &bus->nack_cnt); in npcm_i2c_init_debugfs()
2247 debugfs_create_u64("rec_succ_cnt", 0444, d, &bus->rec_succ_cnt); in npcm_i2c_init_debugfs()
2248 debugfs_create_u64("rec_fail_cnt", 0444, d, &bus->rec_fail_cnt); in npcm_i2c_init_debugfs()
2249 debugfs_create_u64("timeout_cnt", 0444, d, &bus->timeout_cnt); in npcm_i2c_init_debugfs()
2251 bus->debugfs = d; in npcm_i2c_init_debugfs()
2264 bus = devm_kzalloc(&pdev->dev, sizeof(*bus), GFP_KERNEL); in npcm_i2c_probe_bus()
2266 return -ENOMEM; in npcm_i2c_probe_bus()
2268 bus->dev = &pdev->dev; in npcm_i2c_probe_bus()
2270 bus->num = of_alias_get_id(pdev->dev.of_node, "i2c"); in npcm_i2c_probe_bus()
2272 i2c_clk = devm_clk_get(&pdev->dev, NULL); in npcm_i2c_probe_bus()
2275 bus->apb_clk = clk_get_rate(i2c_clk); in npcm_i2c_probe_bus()
2277 gcr_regmap = syscon_regmap_lookup_by_compatible("nuvoton,npcm750-gcr"); in npcm_i2c_probe_bus()
2282 clk_regmap = syscon_regmap_lookup_by_compatible("nuvoton,npcm750-clk"); in npcm_i2c_probe_bus()
2286 bus->reg = devm_platform_ioremap_resource(pdev, 0); in npcm_i2c_probe_bus()
2287 if (IS_ERR(bus->reg)) in npcm_i2c_probe_bus()
2288 return PTR_ERR(bus->reg); in npcm_i2c_probe_bus()
2290 spin_lock_init(&bus->lock); in npcm_i2c_probe_bus()
2291 init_completion(&bus->cmd_complete); in npcm_i2c_probe_bus()
2293 adap = &bus->adap; in npcm_i2c_probe_bus()
2294 adap->owner = THIS_MODULE; in npcm_i2c_probe_bus()
2295 adap->retries = 3; in npcm_i2c_probe_bus()
2296 adap->timeout = msecs_to_jiffies(35); in npcm_i2c_probe_bus()
2297 adap->algo = &npcm_i2c_algo; in npcm_i2c_probe_bus()
2298 adap->quirks = &npcm_i2c_quirks; in npcm_i2c_probe_bus()
2299 adap->algo_data = bus; in npcm_i2c_probe_bus()
2300 adap->dev.parent = &pdev->dev; in npcm_i2c_probe_bus()
2301 adap->dev.of_node = pdev->dev.of_node; in npcm_i2c_probe_bus()
2302 adap->nr = pdev->id; in npcm_i2c_probe_bus()
2308 ret = devm_request_irq(bus->dev, irq, npcm_i2c_bus_irq, 0, in npcm_i2c_probe_bus()
2309 dev_name(bus->dev), bus); in npcm_i2c_probe_bus()
2321 snprintf(bus->adap.name, sizeof(bus->adap.name), "npcm_i2c_%d", in npcm_i2c_probe_bus()
2322 bus->num); in npcm_i2c_probe_bus()
2323 ret = i2c_add_numbered_adapter(&bus->adap); in npcm_i2c_probe_bus()
2337 debugfs_remove_recursive(bus->debugfs); in npcm_i2c_remove_bus()
2338 spin_lock_irqsave(&bus->lock, lock_flags); in npcm_i2c_remove_bus()
2340 spin_unlock_irqrestore(&bus->lock, lock_flags); in npcm_i2c_remove_bus()
2341 i2c_del_adapter(&bus->adap); in npcm_i2c_remove_bus()
2346 { .compatible = "nuvoton,npcm750-i2c", },
2355 .name = "nuvoton-i2c",
2386 MODULE_DESCRIPTION("Nuvoton I2C Bus Driver");