Lines Matching full:isr
138 u32 isr; member
160 .isr = 0x18,
169 .isr = 0x0c,
178 .isr = 0x04,
187 .isr = 0x18,
198 .isr = 0x0c,
323 decode_bits(KERN_DEBUG "ISR", isr_bits, ARRAY_SIZE(isr_bits), val); in decode_ISR()
355 dev_dbg(&i2c->adap.dev, "state:%s:%d: ISR=%08x, ICR=%08x, IBMR=%02x\n", fname, lno, in i2c_pxa_show_state()
370 dev_err(dev, "IBMR: %08x IDBR: %08x ICR: %08x ISR: %08x\n", in i2c_pxa_scream_blue_murder()
427 u32 isr; in i2c_pxa_wait_bus_not_busy() local
430 isr = readl(_ISR(i2c)); in i2c_pxa_wait_bus_not_busy()
431 if (!(isr & (ISR_IBB | ISR_UB))) in i2c_pxa_wait_bus_not_busy()
434 if (isr & ISR_SAD) in i2c_pxa_wait_bus_not_busy()
455 dev_dbg(&i2c->adap.dev, "%s: %ld: ISR=%08x, ICR=%08x, IBMR=%02x\n", in i2c_pxa_wait_master()
512 dev_dbg(&i2c->adap.dev, "%s: %ld: ISR=%08x, ICR=%08x, IBMR=%02x\n", in i2c_pxa_wait_slave()
561 dev_dbg(&i2c->adap.dev, "ICR now %08x, ISR %08x\n", readl(_ICR(i2c)), readl(_ISR(i2c))); in i2c_pxa_set_slave()
614 static void i2c_pxa_slave_txempty(struct pxa_i2c *i2c, u32 isr) in i2c_pxa_slave_txempty() argument
616 if (isr & ISR_BED) { in i2c_pxa_slave_txempty()
630 static void i2c_pxa_slave_rxfull(struct pxa_i2c *i2c, u32 isr) in i2c_pxa_slave_rxfull() argument
640 static void i2c_pxa_slave_start(struct pxa_i2c *i2c, u32 isr) in i2c_pxa_slave_start() argument
646 (isr & ISR_RWM) ? 'r' : 't'); in i2c_pxa_slave_start()
649 if (isr & ISR_RWM) { in i2c_pxa_slave_start()
689 dev_dbg(&i2c->adap.dev, "ISR: SSD (Slave Stop)\n"); in i2c_pxa_slave_stop()
695 dev_dbg(&i2c->adap.dev, "ISR: SSD (Slave Stop) acked\n"); in i2c_pxa_slave_stop()
737 static void i2c_pxa_slave_txempty(struct pxa_i2c *i2c, u32 isr) in i2c_pxa_slave_txempty() argument
739 if (isr & ISR_BED) { in i2c_pxa_slave_txempty()
747 static void i2c_pxa_slave_rxfull(struct pxa_i2c *i2c, u32 isr) in i2c_pxa_slave_rxfull() argument
752 static void i2c_pxa_slave_start(struct pxa_i2c *i2c, u32 isr) in i2c_pxa_slave_start() argument
862 static void i2c_pxa_irq_txempty(struct pxa_i2c *i2c, u32 isr) in i2c_pxa_irq_txempty() argument
870 if (isr & ISR_ALD) { in i2c_pxa_irq_txempty()
886 if ((isr & ISR_BED) && in i2c_pxa_irq_txempty()
888 (isr & ISR_ACKNAK)))) { in i2c_pxa_irq_txempty()
896 if (isr & ISR_ACKNAK) { in i2c_pxa_irq_txempty()
903 } else if (isr & ISR_RWM) { in i2c_pxa_irq_txempty()
969 static void i2c_pxa_irq_rxfull(struct pxa_i2c *i2c, u32 isr) in i2c_pxa_irq_rxfull() argument
1001 u32 isr = readl(_ISR(i2c)); in i2c_pxa_handler() local
1003 if (!(isr & VALID_INT_SOURCE)) in i2c_pxa_handler()
1007 dev_dbg(&i2c->adap.dev, "%s: ISR=%08x, ICR=%08x, IBMR=%02x\n", in i2c_pxa_handler()
1008 __func__, isr, readl(_ICR(i2c)), readl(_IBMR(i2c))); in i2c_pxa_handler()
1009 decode_ISR(isr); in i2c_pxa_handler()
1013 i2c->isrlog[i2c->irqlogidx++] = isr; in i2c_pxa_handler()
1020 writel(isr & VALID_INT_SOURCE, _ISR(i2c)); in i2c_pxa_handler()
1022 if (isr & ISR_SAD) in i2c_pxa_handler()
1023 i2c_pxa_slave_start(i2c, isr); in i2c_pxa_handler()
1024 if (isr & ISR_SSD) in i2c_pxa_handler()
1028 if (isr & ISR_ITE) in i2c_pxa_handler()
1029 i2c_pxa_slave_txempty(i2c, isr); in i2c_pxa_handler()
1030 if (isr & ISR_IRF) in i2c_pxa_handler()
1031 i2c_pxa_slave_rxfull(i2c, isr); in i2c_pxa_handler()
1033 if (isr & ISR_ITE) in i2c_pxa_handler()
1034 i2c_pxa_irq_txempty(i2c, isr); in i2c_pxa_handler()
1035 if (isr & ISR_IRF) in i2c_pxa_handler()
1036 i2c_pxa_irq_rxfull(i2c, isr); in i2c_pxa_handler()
1037 } else if ((isr & ISR_ITE) && i2c->highmode_enter) { in i2c_pxa_handler()
1315 u32 isr; in i2c_pxa_unprepare_recovery() local
1321 isr = readl(_ISR(i2c)); in i2c_pxa_unprepare_recovery()
1322 if (isr & (ISR_UB | ISR_IBB)) { in i2c_pxa_unprepare_recovery()
1324 "recovery: resetting controller, ISR=0x%08x\n", isr); in i2c_pxa_unprepare_recovery()
1330 dev_dbg(&i2c->adap.dev, "recovery: IBMR 0x%08x ISR 0x%08x\n", in i2c_pxa_unprepare_recovery()
1477 i2c->reg_isr = i2c->reg_base + pxa_reg_layout[i2c_type].isr; in i2c_pxa_probe()