121 #define VID		0x00
122 #define DID		0x02
123 #define PCMD		0x04
124 #define   PCMD_ENA	0x01
125 #define PSTTS		0x06
126 #define REVID		0x08
127 #define PROGIF		0x09
128 #define SUBCL		0x0a
129 #define BASCL		0x0b
130 #define BaseA0		0x10
131 #define BaseA1		0x14
132 #define BaseA2		0x18
133 #define BaseA3		0x1c
134 #define INTLINE		0x3c
135 #define INPINE		0x3d
137 #define	CFR		0x50
138 #define   CFR_DEVREV		0x03
139 #define   CFR_IDE01INTR		0x04
140 #define	  CFR_DEVID		0x18
141 #define	  CFR_AT_VESA_078h	0x20
142 #define	  CFR_DSA1		0x40
143 #define	  CFR_DSA0		0x80
145 #define CNTRL		0x51
146 #define	  CNTRL_DIS_RA0		0x40
147 #define   CNTRL_DIS_RA1		0x80
148 #define	  CNTRL_ENA_2ND		0x08
150 #define	CMDTIM		0x52
151 #define	ARTTIM0		0x53
152 #define	DRWTIM0		0x54
153 #define ARTTIM1 	0x55
154 #define DRWTIM1		0x56
155 #define ARTTIM23	0x57
156 #define   ARTTIM23_DIS_RA2	0x04
157 #define   ARTTIM23_DIS_RA3	0x08
158 #define   ARTTIM23_IDE23INTR	0x10
159 #define DRWTIM23	0x58
160 #define BRST		0x59
207 	outl_p((reg & 0xfc) | cmd640_key, 0xcf8);  in put_cmd640_reg_pci1()
208 	outb_p(val, (reg & 3) | 0xcfc);  in put_cmd640_reg_pci1()
213 	outl_p((reg & 0xfc) | cmd640_key, 0xcf8);  in get_cmd640_reg_pci1()
214 	return inb_p((reg & 3) | 0xcfc);  in get_cmd640_reg_pci1()
221 	outb_p(0x10, 0xcf8);  in put_cmd640_reg_pci2()
223 	outb_p(0, 0xcf8);  in put_cmd640_reg_pci2()
230 	outb_p(0x10, 0xcf8);  in get_cmd640_reg_pci2()
232 	outb_p(0, 0xcf8);  in get_cmd640_reg_pci2()
272 	const u8 ven_dev[4] = {0x95, 0x10, 0x40, 0x06};  in match_pci_cmd640_device()
274 	for (i = 0; i < 4; i++) {  in match_pci_cmd640_device()
276 			return 0;  in match_pci_cmd640_device()
279 	if ((get_cmd640_reg(PCMD) & PCMD_ENA) == 0) {  in match_pci_cmd640_device()
281 		return 0;  in match_pci_cmd640_device()
294 	for (cmd640_key = 0x80000000;  in probe_for_cmd640_pci1()
295 	     cmd640_key <= 0x8000f800;  in probe_for_cmd640_pci1()
296 	     cmd640_key += 0x800) {  in probe_for_cmd640_pci1()
300 	return 0;  in probe_for_cmd640_pci1()
310 	for (cmd640_key = 0xc000; cmd640_key <= 0xcf00; cmd640_key += 0x100) {  in probe_for_cmd640_pci2()
314 	return 0;  in probe_for_cmd640_pci2()
326 	cmd640_key = 0x178;  in probe_for_cmd640_vlb()
328 	if (b == 0xff || b == 0x00 || (b & CFR_AT_VESA_078h)) {  in probe_for_cmd640_vlb()
329 		cmd640_key = 0x78;  in probe_for_cmd640_vlb()
331 		if (b == 0xff || b == 0x00 || !(b & CFR_AT_VESA_078h))  in probe_for_cmd640_vlb()
332 			return 0;  in probe_for_cmd640_vlb()
338  *  Returns 1 if an IDE interface/drive exists at 0x170,
339  *  Returns 0 otherwise.
347 	outb_p(0x0a, 0x176);	/* select drive0 */  in secondary_port_responding()
349 	if ((inb_p(0x176) & 0x1f) != 0x0a) {  in secondary_port_responding()
350 		outb_p(0x1a, 0x176); /* select drive1 */  in secondary_port_responding()
352 		if ((inb_p(0x176) & 0x1f) != 0x1a) {  in secondary_port_responding()
354 			return 0; /* nothing responded */  in secondary_port_responding()
367 	unsigned int reg = cmd640_vlb ? 0x50 : 0x00;  in cmd640_dump_regs()
371 	for (; reg <= 0x59; reg++) {  in cmd640_dump_regs()
372 		if (!(reg & 0x0f))  in cmd640_dump_regs()
391 		drive->io_32bit = 0;  in __set_prefetch_mode()
404 	__set_prefetch_mode(drive, (b & prefetch_masks[index]) ? 0 : 1);  in check_prefetch()
452 	return ((upper & 0x0f) << 4) | (lower & 0x0f);  in pack_nibbles()
490 	case 4:	 setup_count = 0x00; break;  in program_drive_counts()
491 	case 3:	 setup_count = 0x80; break;  in program_drive_counts()
493 	case 2:	 setup_count = 0x40; break;  in program_drive_counts()
494 	default: setup_count = 0xc0; /* case 5 */  in program_drive_counts()
506 	setup_count |= __get_cmd640_reg(arttim_regs[index]) & 0x3f;  in program_drive_counts()
579 	unsigned int index = 0, cycle_time;  in cmd640_set_pio_mode()
586 		b = get_cmd640_reg(CNTRL) & ~0x27;  in cmd640_set_pio_mode()
588 			b |= 0x27;  in cmd640_set_pio_mode()
624 	set_prefetch_mode(drive, i, 0);  in cmd640_init_dev()
643 	return (irq_stat & irq_mask) ? 1 : 0;  in cmd640_test_irq()
660 	outb(0x01, 0xCFB);  in pci_conf1()
661 	tmp = inl(0xCF8);  in pci_conf1()
662 	outl(0x80000000, 0xCF8);  in pci_conf1()
663 	if (inl(0xCF8) == 0x80000000) {  in pci_conf1()
664 		outl(tmp, 0xCF8);  in pci_conf1()
668 	outl(tmp, 0xCF8);  in pci_conf1()
670 	return 0;  in pci_conf1()
678 	outb(0x00, 0xCFB);  in pci_conf2()
679 	outb(0x00, 0xCF8);  in pci_conf2()
680 	outb(0x00, 0xCFA);  in pci_conf2()
681 	if (inb(0xCF8) == 0x00 && inb(0xCF8) == 0x00) {  in pci_conf2()
686 	return 0;  in pci_conf2()
702 		printk(KERN_ERR "%s: I/O resource 0x%lX-0x%lX not free.\n",  in cmd640x_init_one()
708 		printk(KERN_ERR "%s: I/O resource 0x%lX not free.\n",  in cmd640x_init_one()
714 	return 0;  in cmd640x_init_one()
722 	int second_port_cmd640 = 0, rc;  in cmd640x_init()
730 		cmd640_vlb = 0;  in cmd640x_init()
738 			return 0;  in cmd640x_init()
741 	 * Undocumented magic (there is no 0x5b reg in specs)  in cmd640x_init()
743 	put_cmd640_reg(0x5b, 0xbd);  in cmd640x_init()
744 	if (get_cmd640_reg(0x5b) != 0xbd) {  in cmd640x_init()
745 		printk(KERN_ERR "ide: cmd640 init failed: wrong value in reg 0x5b\n");  in cmd640x_init()
746 		return 0;  in cmd640x_init()
748 	put_cmd640_reg(0x5b, 0);  in cmd640x_init()
759 	if (cmd640_chip_version == 0) {  in cmd640x_init()
761 		return 0;  in cmd640x_init()
764 	rc = cmd640x_init_one(0x1f0, 0x3f6);  in cmd640x_init()
768 	rc = cmd640x_init_one(0x170, 0x376);  in cmd640x_init()
770 		release_region(0x3f6, 1);  in cmd640x_init()
771 		release_region(0x1f0, 8);  in cmd640x_init()
775 	memset(&hw, 0, sizeof(hw));  in cmd640x_init()
777 	ide_std_init_ports(&hw[0], 0x1f0, 0x3f6);  in cmd640x_init()
778 	hw[0].irq = 14;  in cmd640x_init()
780 	ide_std_init_ports(&hw[1], 0x170, 0x376);  in cmd640x_init()
783 	printk(KERN_INFO "cmd640: buggy cmd640%c interface on %s, config=0x%02x"  in cmd640x_init()
789 	hws[0] = &hw[0];  in cmd640x_init()
798 	put_cmd640_reg(CMDTIM, 0);  in cmd640x_init()
799 	put_cmd640_reg(BRST, 0x40);  in cmd640x_init()
843 module_param_named(probe_vlb, cmd640_vlb, bool, 0);