Lines Matching +full:sama5d2 +full:- +full:adc
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Atmel ADC driver for SAMA5D2 devices and compatible.
12 #include <linux/dma-mapping.h>
98 /* Interrupt Enable Register - TS X measurement ready */
100 /* Interrupt Enable Register - TS Y measurement ready */
102 /* Interrupt Enable Register - TS pressure measurement ready */
104 /* Interrupt Enable Register - Data ready */
106 /* Interrupt Enable Register - general overrun error */
108 /* Interrupt Enable Register - Pen detect */
110 /* Interrupt Enable Register - No pen detect */
118 /* Interrupt Status Register - Pen touching sense status */
128 /* Extended Mode Register - Oversampling rate */
135 /* Extended Mode Register - Averaging on single trigger event */
150 /* Analog Control Register - Pen detect sensitivity mask */
155 /* Touchscreen Mode Register - No touch mode */
157 /* Touchscreen Mode Register - 4 wire screen, no pressure measurement */
159 /* Touchscreen Mode Register - 4 wire screen, pressure measurement */
161 /* Touchscreen Mode Register - 5 wire screen */
163 /* Touchscreen Mode Register - Average samples mask */
165 /* Touchscreen Mode Register - Average samples */
167 /* Touchscreen Mode Register - Touch/trigger frequency ratio mask */
169 /* Touchscreen Mode Register - Touch/trigger frequency ratio */
171 /* Touchscreen Mode Register - Pen Debounce Time mask */
173 /* Touchscreen Mode Register - Pen Debounce Time */
175 /* Touchscreen Mode Register - No DMA for touch measurements */
177 /* Touchscreen Mode Register - Disable pen detection */
179 /* Touchscreen Mode Register - Enable pen detection */
202 /* Trigger Mode - trigger period mask */
204 /* Trigger Mode - trigger period */
296 .datasheet_name = "CH"#num"-CH"#num2, \
333 #define at91_adc_readl(st, reg) readl_relaxed(st->base + reg)
334 #define at91_adc_writel(st, reg, val) writel_relaxed(val, st->base + reg)
350 * struct at91_adc_dma - at91-sama5d2 dma information struct
354 * @phys_addr: physical address of the ADC base register
372 * struct at91_adc_touch - at91-sama5d2 touchscreen information struct
471 for (i = 0; i < indio_dev->num_channels; i++) { in at91_adc_chan_xlate()
472 if (indio_dev->channels[i].scan_index == chan) in at91_adc_chan_xlate()
475 return -EINVAL; in at91_adc_chan_xlate()
485 return indio_dev->channels + index; in at91_adc_chan_get()
491 return at91_adc_chan_xlate(indio_dev, iiospec->args[0]); in at91_adc_of_xlate()
499 for_each_set_bit(bit, indio_dev->active_scan_mask, in at91_adc_active_scan_mask_to_reg()
500 indio_dev->num_channels) { in at91_adc_active_scan_mask_to_reg()
503 mask |= BIT(chan->channel); in at91_adc_active_scan_mask_to_reg()
521 switch (st->oversampling_ratio) { in at91_adc_config_emr()
541 if (st->oversampling_ratio == AT91_OSR_1SAMPLES) { in at91_adc_adjust_val_osr()
547 } else if (st->oversampling_ratio == AT91_OSR_4SAMPLES) { in at91_adc_adjust_val_osr()
582 u32 clk_khz = st->current_sample_rate / 1000; in at91_adc_configure_touch()
625 st->touch_st.sample_period_val = in at91_adc_configure_touch()
627 clk_khz / 1000) - 1, 1); in at91_adc_configure_touch()
642 * max = 2^AT91_SAMA5D2_MAX_POS_BITS - 1 in at91_adc_touch_pos()
647 dev_dbg(&st->indio_dev->dev, "pos is 0\n"); in at91_adc_touch_pos()
650 result = (pos << AT91_SAMA5D2_MAX_POS_BITS) - pos; in at91_adc_touch_pos()
653 dev_err(&st->indio_dev->dev, "scale is 0\n"); in at91_adc_touch_pos()
663 st->touch_st.x_pos = at91_adc_touch_pos(st, AT91_SAMA5D2_XPOSR); in at91_adc_touch_x_pos()
664 return st->touch_st.x_pos; in at91_adc_touch_x_pos()
686 pres = rxp * (st->touch_st.x_pos * factor / 1024) * in at91_adc_touch_pressure()
687 (z2 * factor / z1 - factor) / in at91_adc_touch_pressure()
697 return 0xFFFF - pres; in at91_adc_touch_pressure()
703 if (!st->touch_st.touching) in at91_adc_read_position()
704 return -ENODATA; in at91_adc_read_position()
710 return -ENODATA; in at91_adc_read_position()
718 if (!st->touch_st.touching) in at91_adc_read_pressure()
719 return -ENODATA; in at91_adc_read_pressure()
723 return -ENODATA; in at91_adc_read_pressure()
738 status |= st->selected_trig->trgmod_value; in at91_adc_configure_trigger()
752 if (st->dma_st.dma_chan) in at91_adc_reenable_trigger()
755 enable_irq(st->irq); in at91_adc_reenable_trigger()
775 status = dmaengine_tx_status(st->dma_st.dma_chan, in at91_adc_dma_size_done()
776 st->dma_st.dma_chan->cookie, in at91_adc_dma_size_done()
782 i = st->dma_st.rx_buf_sz - state.residue; in at91_adc_dma_size_done()
785 if (i >= st->dma_st.buf_idx) in at91_adc_dma_size_done()
786 size = i - st->dma_st.buf_idx; in at91_adc_dma_size_done()
788 size = st->dma_st.rx_buf_sz + i - st->dma_st.buf_idx; in at91_adc_dma_size_done()
796 iio_trigger_poll_chained(indio_dev->trig); in at91_dma_buffer_done()
807 if (!st->dma_st.dma_chan) in at91_adc_dma_start()
811 st->dma_st.buf_idx = 0; in at91_adc_dma_start()
817 st->dma_st.rx_buf_sz = 0; in at91_adc_dma_start()
819 for_each_set_bit(bit, indio_dev->active_scan_mask, in at91_adc_dma_start()
820 indio_dev->num_channels) { in at91_adc_dma_start()
827 st->dma_st.rx_buf_sz += chan->scan_type.storagebits / 8; in at91_adc_dma_start()
829 st->dma_st.rx_buf_sz *= st->dma_st.watermark; in at91_adc_dma_start()
832 desc = dmaengine_prep_dma_cyclic(st->dma_st.dma_chan, in at91_adc_dma_start()
833 st->dma_st.rx_dma_buf, in at91_adc_dma_start()
834 st->dma_st.rx_buf_sz, in at91_adc_dma_start()
835 st->dma_st.rx_buf_sz / 2, in at91_adc_dma_start()
839 dev_err(&indio_dev->dev, "cannot prepare DMA cyclic\n"); in at91_adc_dma_start()
840 return -EBUSY; in at91_adc_dma_start()
843 desc->callback = at91_dma_buffer_done; in at91_adc_dma_start()
844 desc->callback_param = indio_dev; in at91_adc_dma_start()
849 dev_err(&indio_dev->dev, "cannot submit DMA cyclic\n"); in at91_adc_dma_start()
850 dmaengine_terminate_async(st->dma_st.dma_chan); in at91_adc_dma_start()
857 dma_async_issue_pending(st->dma_st.dma_chan); in at91_adc_dma_start()
860 st->dma_st.dma_ts = iio_get_time_ns(indio_dev); in at91_adc_dma_start()
862 dev_dbg(&indio_dev->dev, "DMA cyclic started\n"); in at91_adc_dma_start()
870 /* if using DMA, we do not use our own IRQ (we use DMA-controller) */ in at91_adc_buffer_check_use_irq()
871 if (st->dma_st.dma_chan) in at91_adc_buffer_check_use_irq()
874 if (iio_trigger_validate_own_device(indio->trig, indio)) in at91_adc_buffer_check_use_irq()
883 return !!bitmap_subset(indio_dev->active_scan_mask, in at91_adc_current_chan_is_touch()
884 &st->touch_st.channels_bitmask, in at91_adc_current_chan_is_touch()
899 if (!(indio_dev->currentmode & INDIO_ALL_TRIGGERED_MODES)) in at91_adc_buffer_prepare()
900 return -EINVAL; in at91_adc_buffer_prepare()
905 dev_err(&indio_dev->dev, "buffer prepare failed\n"); in at91_adc_buffer_prepare()
909 for_each_set_bit(bit, indio_dev->active_scan_mask, in at91_adc_buffer_prepare()
910 indio_dev->num_channels) { in at91_adc_buffer_prepare()
918 if (chan->type == IIO_POSITIONRELATIVE || in at91_adc_buffer_prepare()
919 chan->type == IIO_PRESSURE) in at91_adc_buffer_prepare()
924 if (chan->differential) in at91_adc_buffer_prepare()
925 cor |= (BIT(chan->channel) | BIT(chan->channel2)) << in at91_adc_buffer_prepare()
928 cor &= ~(BIT(chan->channel) << in at91_adc_buffer_prepare()
933 at91_adc_writel(st, AT91_SAMA5D2_CHER, BIT(chan->channel)); in at91_adc_buffer_prepare()
952 if (!(indio_dev->currentmode & INDIO_ALL_TRIGGERED_MODES)) in at91_adc_buffer_postdisable()
953 return -EINVAL; in at91_adc_buffer_postdisable()
961 for_each_set_bit(bit, indio_dev->active_scan_mask, in at91_adc_buffer_postdisable()
962 indio_dev->num_channels) { in at91_adc_buffer_postdisable()
969 if (chan->type == IIO_POSITIONRELATIVE || in at91_adc_buffer_postdisable()
970 chan->type == IIO_PRESSURE) in at91_adc_buffer_postdisable()
973 at91_adc_writel(st, AT91_SAMA5D2_CHDR, BIT(chan->channel)); in at91_adc_buffer_postdisable()
975 if (st->dma_st.dma_chan) in at91_adc_buffer_postdisable()
976 at91_adc_readl(st, chan->address); in at91_adc_buffer_postdisable()
986 if (st->dma_st.dma_chan) in at91_adc_buffer_postdisable()
987 dmaengine_terminate_sync(st->dma_st.dma_chan); in at91_adc_buffer_postdisable()
1002 trig = devm_iio_trigger_alloc(&indio->dev, "%s-dev%d-%s", indio->name, in at91_adc_allocate_trigger()
1003 indio->id, trigger_name); in at91_adc_allocate_trigger()
1005 return ERR_PTR(-ENOMEM); in at91_adc_allocate_trigger()
1007 trig->dev.parent = indio->dev.parent; in at91_adc_allocate_trigger()
1009 trig->ops = &at91_adc_trigger_ops; in at91_adc_allocate_trigger()
1011 ret = devm_iio_trigger_register(&indio->dev, trig); in at91_adc_allocate_trigger()
1022 st->trig = at91_adc_allocate_trigger(indio, st->selected_trig->name); in at91_adc_trigger_init()
1023 if (IS_ERR(st->trig)) { in at91_adc_trigger_init()
1024 dev_err(&indio->dev, in at91_adc_trigger_init()
1026 return PTR_ERR(st->trig); in at91_adc_trigger_init()
1049 timeout--; in at91_adc_trigger_handler_nodma()
1056 for_each_set_bit(bit, indio_dev->active_scan_mask, in at91_adc_trigger_handler_nodma()
1057 indio_dev->num_channels) { in at91_adc_trigger_handler_nodma()
1073 if (chan->type == IIO_VOLTAGE) { in at91_adc_trigger_handler_nodma()
1074 val = at91_adc_readl(st, chan->address); in at91_adc_trigger_handler_nodma()
1076 st->buffer[i] = val; in at91_adc_trigger_handler_nodma()
1078 st->buffer[i] = 0; in at91_adc_trigger_handler_nodma()
1083 iio_push_to_buffers_with_timestamp(indio_dev, st->buffer, in at91_adc_trigger_handler_nodma()
1084 pf->timestamp); in at91_adc_trigger_handler_nodma()
1099 indio_dev->name); in at91_adc_trigger_handler_dma()
1101 sample_size = div_s64(st->dma_st.rx_buf_sz, st->dma_st.watermark); in at91_adc_trigger_handler_dma()
1109 interval = div_s64((ns - st->dma_st.dma_ts), sample_count); in at91_adc_trigger_handler_dma()
1117 &st->dma_st.rx_buf[st->dma_st.buf_idx], in at91_adc_trigger_handler_dma()
1121 (st->dma_st.rx_buf + st->dma_st.buf_idx), in at91_adc_trigger_handler_dma()
1122 (st->dma_st.dma_ts + interval * sample_index)); in at91_adc_trigger_handler_dma()
1124 transferred_len -= sample_size; in at91_adc_trigger_handler_dma()
1126 st->dma_st.buf_idx += sample_size; in at91_adc_trigger_handler_dma()
1128 if (st->dma_st.buf_idx >= st->dma_st.rx_buf_sz) in at91_adc_trigger_handler_dma()
1129 st->dma_st.buf_idx = 0; in at91_adc_trigger_handler_dma()
1133 st->dma_st.dma_ts = iio_get_time_ns(indio_dev); in at91_adc_trigger_handler_dma()
1139 struct iio_dev *indio_dev = pf->indio_dev; in at91_adc_trigger_handler()
1146 if (iio_trigger_validate_own_device(indio_dev->trig, indio_dev)) in at91_adc_trigger_handler()
1149 if (st->dma_st.dma_chan) in at91_adc_trigger_handler()
1154 iio_trigger_notify_done(indio_dev->trig); in at91_adc_trigger_handler()
1161 return devm_iio_triggered_buffer_setup(&indio->dev, indio, in at91_adc_buffer_init()
1178 * Since the adc frequency is checked before, there is no reason in at91_adc_startup_time()
1195 f_per = clk_get_rate(st->per_clk); in at91_adc_setup_samp_freq()
1196 prescal = (f_per / (2 * freq)) - 1; in at91_adc_setup_samp_freq()
1198 startup = at91_adc_startup_time(st->soc_info.startup_time, in at91_adc_setup_samp_freq()
1207 dev_dbg(&indio_dev->dev, "freq: %u, startup: %u, prescal: %u\n", in at91_adc_setup_samp_freq()
1209 st->current_sample_rate = freq; in at91_adc_setup_samp_freq()
1214 return st->current_sample_rate; in at91_adc_get_sample_freq()
1224 for_each_set_bit(bit, indio_dev->active_scan_mask, in at91_adc_touch_data_handler()
1229 if (chan->type == IIO_POSITIONRELATIVE) in at91_adc_touch_data_handler()
1230 at91_adc_read_position(st, chan->channel, &val); in at91_adc_touch_data_handler()
1231 else if (chan->type == IIO_PRESSURE) in at91_adc_touch_data_handler()
1232 at91_adc_read_pressure(st, chan->channel, &val); in at91_adc_touch_data_handler()
1235 st->buffer[i] = val; in at91_adc_touch_data_handler()
1246 schedule_work(&st->touch_st.workq); in at91_adc_touch_data_handler()
1257 AT91_SAMA5D2_TRGR_TRGPER(st->touch_st.sample_period_val)); in at91_adc_pen_detect_interrupt()
1258 st->touch_st.touching = true; in at91_adc_pen_detect_interrupt()
1270 st->touch_st.touching = false; in at91_adc_no_pen_detect_interrupt()
1283 struct iio_dev *indio_dev = st->indio_dev; in at91_adc_workq_handler()
1285 iio_push_to_buffers(indio_dev, st->buffer); in at91_adc_workq_handler()
1307 /* periodic trigger IRQ - during pen sense */ in at91_adc_interrupt()
1321 iio_trigger_poll(indio->trig); in at91_adc_interrupt()
1322 } else if (iio_buffer_enabled(indio) && st->dma_st.dma_chan) { in at91_adc_interrupt()
1323 /* triggered buffer with DMA - should not happen */ in at91_adc_interrupt()
1328 st->conversion_value = at91_adc_readl(st, st->chan->address); in at91_adc_interrupt()
1329 st->conversion_done = true; in at91_adc_interrupt()
1330 wake_up_interruptible(&st->wq_data_available); in at91_adc_interrupt()
1347 if (chan->type == IIO_POSITIONRELATIVE) { in at91_adc_read_info_raw()
1351 mutex_lock(&st->lock); in at91_adc_read_info_raw()
1353 ret = at91_adc_read_position(st, chan->channel, in at91_adc_read_info_raw()
1358 mutex_unlock(&st->lock); in at91_adc_read_info_raw()
1363 if (chan->type == IIO_PRESSURE) { in at91_adc_read_info_raw()
1367 mutex_lock(&st->lock); in at91_adc_read_info_raw()
1369 ret = at91_adc_read_pressure(st, chan->channel, in at91_adc_read_info_raw()
1374 mutex_unlock(&st->lock); in at91_adc_read_info_raw()
1385 mutex_lock(&st->lock); in at91_adc_read_info_raw()
1387 st->chan = chan; in at91_adc_read_info_raw()
1389 if (chan->differential) in at91_adc_read_info_raw()
1390 cor = (BIT(chan->channel) | BIT(chan->channel2)) << in at91_adc_read_info_raw()
1394 at91_adc_writel(st, AT91_SAMA5D2_CHER, BIT(chan->channel)); in at91_adc_read_info_raw()
1395 at91_adc_writel(st, AT91_SAMA5D2_IER, BIT(chan->channel)); in at91_adc_read_info_raw()
1398 ret = wait_event_interruptible_timeout(st->wq_data_available, in at91_adc_read_info_raw()
1399 st->conversion_done, in at91_adc_read_info_raw()
1402 ret = -ETIMEDOUT; in at91_adc_read_info_raw()
1405 *val = st->conversion_value; in at91_adc_read_info_raw()
1407 if (chan->scan_type.sign == 's') in at91_adc_read_info_raw()
1409 chan->scan_type.realbits - 1); in at91_adc_read_info_raw()
1410 st->conversion_done = false; in at91_adc_read_info_raw()
1413 at91_adc_writel(st, AT91_SAMA5D2_IDR, BIT(chan->channel)); in at91_adc_read_info_raw()
1414 at91_adc_writel(st, AT91_SAMA5D2_CHDR, BIT(chan->channel)); in at91_adc_read_info_raw()
1419 mutex_unlock(&st->lock); in at91_adc_read_info_raw()
1435 *val = st->vref_uv / 1000; in at91_adc_read_raw()
1436 if (chan->differential) in at91_adc_read_raw()
1438 *val2 = chan->scan_type.realbits; in at91_adc_read_raw()
1446 *val = st->oversampling_ratio; in at91_adc_read_raw()
1450 return -EINVAL; in at91_adc_read_raw()
1464 return -EINVAL; in at91_adc_write_raw()
1466 if (val == st->oversampling_ratio) in at91_adc_write_raw()
1468 mutex_lock(&st->lock); in at91_adc_write_raw()
1469 st->oversampling_ratio = val; in at91_adc_write_raw()
1472 mutex_unlock(&st->lock); in at91_adc_write_raw()
1475 if (val < st->soc_info.min_sample_rate || in at91_adc_write_raw()
1476 val > st->soc_info.max_sample_rate) in at91_adc_write_raw()
1477 return -EINVAL; in at91_adc_write_raw()
1479 mutex_lock(&st->lock); in at91_adc_write_raw()
1481 mutex_unlock(&st->lock); in at91_adc_write_raw()
1484 return -EINVAL; in at91_adc_write_raw()
1502 if (st->dma_st.dma_chan) in at91_adc_dma_init()
1505 st->dma_st.dma_chan = dma_request_chan(&pdev->dev, "rx"); in at91_adc_dma_init()
1506 if (IS_ERR(st->dma_st.dma_chan)) { in at91_adc_dma_init()
1507 dev_info(&pdev->dev, "can't get DMA channel\n"); in at91_adc_dma_init()
1508 st->dma_st.dma_chan = NULL; in at91_adc_dma_init()
1512 st->dma_st.rx_buf = dma_alloc_coherent(st->dma_st.dma_chan->device->dev, in at91_adc_dma_init()
1514 &st->dma_st.rx_dma_buf, in at91_adc_dma_init()
1516 if (!st->dma_st.rx_buf) { in at91_adc_dma_init()
1517 dev_info(&pdev->dev, "can't allocate coherent DMA area\n"); in at91_adc_dma_init()
1523 config.src_addr = (phys_addr_t)(st->dma_st.phys_addr in at91_adc_dma_init()
1529 if (dmaengine_slave_config(st->dma_st.dma_chan, &config)) { in at91_adc_dma_init()
1530 dev_info(&pdev->dev, "can't configure DMA slave\n"); in at91_adc_dma_init()
1534 dev_info(&pdev->dev, "using %s for rx DMA transfers\n", in at91_adc_dma_init()
1535 dma_chan_name(st->dma_st.dma_chan)); in at91_adc_dma_init()
1540 dma_free_coherent(st->dma_st.dma_chan->device->dev, pages * PAGE_SIZE, in at91_adc_dma_init()
1541 st->dma_st.rx_buf, st->dma_st.rx_dma_buf); in at91_adc_dma_init()
1543 dma_release_channel(st->dma_st.dma_chan); in at91_adc_dma_init()
1544 st->dma_st.dma_chan = NULL; in at91_adc_dma_init()
1546 dev_info(&pdev->dev, "continuing without DMA support\n"); in at91_adc_dma_init()
1558 if (!st->dma_st.dma_chan) in at91_adc_dma_disable()
1562 dmaengine_terminate_sync(st->dma_st.dma_chan); in at91_adc_dma_disable()
1564 dma_free_coherent(st->dma_st.dma_chan->device->dev, pages * PAGE_SIZE, in at91_adc_dma_disable()
1565 st->dma_st.rx_buf, st->dma_st.rx_dma_buf); in at91_adc_dma_disable()
1566 dma_release_channel(st->dma_st.dma_chan); in at91_adc_dma_disable()
1567 st->dma_st.dma_chan = NULL; in at91_adc_dma_disable()
1569 dev_info(&pdev->dev, "continuing without DMA support\n"); in at91_adc_dma_disable()
1578 return -EINVAL; in at91_adc_set_watermark()
1580 if (!st->selected_trig->hw_trig) { in at91_adc_set_watermark()
1581 dev_dbg(&indio_dev->dev, "we need hw trigger for DMA\n"); in at91_adc_set_watermark()
1585 dev_dbg(&indio_dev->dev, "new watermark is %u\n", val); in at91_adc_set_watermark()
1586 st->dma_st.watermark = val; in at91_adc_set_watermark()
1595 at91_adc_dma_disable(to_platform_device(&indio_dev->dev)); in at91_adc_set_watermark()
1597 at91_adc_dma_init(to_platform_device(&indio_dev->dev)); in at91_adc_set_watermark()
1605 at91_adc_dma_disable(to_platform_device(&indio_dev->dev)); in at91_adc_set_watermark()
1615 if (bitmap_subset(scan_mask, &st->touch_st.channels_bitmask, in at91_adc_update_scan_mode()
1622 if (bitmap_intersects(&st->touch_st.channels_bitmask, scan_mask, in at91_adc_update_scan_mode()
1624 return -EINVAL; in at91_adc_update_scan_mode()
1641 at91_adc_setup_samp_freq(indio_dev, st->soc_info.min_sample_rate); in at91_adc_hw_init()
1653 return scnprintf(buf, PAGE_SIZE, "%d\n", !!st->dma_st.dma_chan); in at91_adc_get_fifo_state()
1662 return scnprintf(buf, PAGE_SIZE, "%d\n", st->dma_st.watermark); in at91_adc_get_watermark()
1712 indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*st)); in at91_adc_probe()
1714 return -ENOMEM; in at91_adc_probe()
1716 indio_dev->name = dev_name(&pdev->dev); in at91_adc_probe()
1717 indio_dev->modes = INDIO_DIRECT_MODE | INDIO_BUFFER_SOFTWARE; in at91_adc_probe()
1718 indio_dev->info = &at91_adc_info; in at91_adc_probe()
1719 indio_dev->channels = at91_adc_channels; in at91_adc_probe()
1720 indio_dev->num_channels = ARRAY_SIZE(at91_adc_channels); in at91_adc_probe()
1723 st->indio_dev = indio_dev; in at91_adc_probe()
1725 bitmap_set(&st->touch_st.channels_bitmask, in at91_adc_probe()
1727 bitmap_set(&st->touch_st.channels_bitmask, in at91_adc_probe()
1729 bitmap_set(&st->touch_st.channels_bitmask, in at91_adc_probe()
1732 st->oversampling_ratio = AT91_OSR_1SAMPLES; in at91_adc_probe()
1734 ret = of_property_read_u32(pdev->dev.of_node, in at91_adc_probe()
1735 "atmel,min-sample-rate-hz", in at91_adc_probe()
1736 &st->soc_info.min_sample_rate); in at91_adc_probe()
1738 dev_err(&pdev->dev, in at91_adc_probe()
1739 "invalid or missing value for atmel,min-sample-rate-hz\n"); in at91_adc_probe()
1743 ret = of_property_read_u32(pdev->dev.of_node, in at91_adc_probe()
1744 "atmel,max-sample-rate-hz", in at91_adc_probe()
1745 &st->soc_info.max_sample_rate); in at91_adc_probe()
1747 dev_err(&pdev->dev, in at91_adc_probe()
1748 "invalid or missing value for atmel,max-sample-rate-hz\n"); in at91_adc_probe()
1752 ret = of_property_read_u32(pdev->dev.of_node, "atmel,startup-time-ms", in at91_adc_probe()
1753 &st->soc_info.startup_time); in at91_adc_probe()
1755 dev_err(&pdev->dev, in at91_adc_probe()
1756 "invalid or missing value for atmel,startup-time-ms\n"); in at91_adc_probe()
1760 ret = of_property_read_u32(pdev->dev.of_node, in at91_adc_probe()
1761 "atmel,trigger-edge-type", &edge_type); in at91_adc_probe()
1763 dev_dbg(&pdev->dev, in at91_adc_probe()
1764 "atmel,trigger-edge-type not specified, only software trigger available\n"); in at91_adc_probe()
1767 st->selected_trig = NULL; in at91_adc_probe()
1772 st->selected_trig = &at91_adc_trigger_list[i]; in at91_adc_probe()
1776 if (!st->selected_trig) { in at91_adc_probe()
1777 dev_err(&pdev->dev, "invalid external trigger edge value\n"); in at91_adc_probe()
1778 return -EINVAL; in at91_adc_probe()
1781 init_waitqueue_head(&st->wq_data_available); in at91_adc_probe()
1782 mutex_init(&st->lock); in at91_adc_probe()
1783 INIT_WORK(&st->touch_st.workq, at91_adc_workq_handler); in at91_adc_probe()
1785 st->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); in at91_adc_probe()
1786 if (IS_ERR(st->base)) in at91_adc_probe()
1787 return PTR_ERR(st->base); in at91_adc_probe()
1790 st->dma_st.phys_addr = res->start; in at91_adc_probe()
1792 st->irq = platform_get_irq(pdev, 0); in at91_adc_probe()
1793 if (st->irq <= 0) { in at91_adc_probe()
1794 if (!st->irq) in at91_adc_probe()
1795 st->irq = -ENXIO; in at91_adc_probe()
1797 return st->irq; in at91_adc_probe()
1800 st->per_clk = devm_clk_get(&pdev->dev, "adc_clk"); in at91_adc_probe()
1801 if (IS_ERR(st->per_clk)) in at91_adc_probe()
1802 return PTR_ERR(st->per_clk); in at91_adc_probe()
1804 st->reg = devm_regulator_get(&pdev->dev, "vddana"); in at91_adc_probe()
1805 if (IS_ERR(st->reg)) in at91_adc_probe()
1806 return PTR_ERR(st->reg); in at91_adc_probe()
1808 st->vref = devm_regulator_get(&pdev->dev, "vref"); in at91_adc_probe()
1809 if (IS_ERR(st->vref)) in at91_adc_probe()
1810 return PTR_ERR(st->vref); in at91_adc_probe()
1812 ret = devm_request_irq(&pdev->dev, st->irq, at91_adc_interrupt, 0, in at91_adc_probe()
1813 pdev->dev.driver->name, indio_dev); in at91_adc_probe()
1817 ret = regulator_enable(st->reg); in at91_adc_probe()
1821 ret = regulator_enable(st->vref); in at91_adc_probe()
1825 st->vref_uv = regulator_get_voltage(st->vref); in at91_adc_probe()
1826 if (st->vref_uv <= 0) { in at91_adc_probe()
1827 ret = -EINVAL; in at91_adc_probe()
1833 ret = clk_prepare_enable(st->per_clk); in at91_adc_probe()
1841 dev_err(&pdev->dev, "couldn't initialize the buffer.\n"); in at91_adc_probe()
1845 if (st->selected_trig->hw_trig) { in at91_adc_probe()
1848 dev_err(&pdev->dev, "couldn't setup the triggers.\n"); in at91_adc_probe()
1855 st->dma_st.watermark = 1; in at91_adc_probe()
1857 iio_buffer_set_attrs(indio_dev->buffer, in at91_adc_probe()
1861 if (dma_coerce_mask_and_coherent(&indio_dev->dev, DMA_BIT_MASK(32))) in at91_adc_probe()
1862 dev_info(&pdev->dev, "cannot set DMA mask to 32-bit\n"); in at91_adc_probe()
1868 if (st->selected_trig->hw_trig) in at91_adc_probe()
1869 dev_info(&pdev->dev, "setting up trigger as %s\n", in at91_adc_probe()
1870 st->selected_trig->name); in at91_adc_probe()
1872 dev_info(&pdev->dev, "version: %x\n", in at91_adc_probe()
1873 readl_relaxed(st->base + AT91_SAMA5D2_VERSION)); in at91_adc_probe()
1880 clk_disable_unprepare(st->per_clk); in at91_adc_probe()
1882 regulator_disable(st->vref); in at91_adc_probe()
1884 regulator_disable(st->reg); in at91_adc_probe()
1897 clk_disable_unprepare(st->per_clk); in at91_adc_remove()
1899 regulator_disable(st->vref); in at91_adc_remove()
1900 regulator_disable(st->reg); in at91_adc_remove()
1914 * Do a sofware reset of the ADC before we go to suspend. in at91_adc_suspend()
1915 * this will ensure that all pins are free from being muxed by the ADC in at91_adc_suspend()
1917 * Otherwise, ADC will hog them and we can't go to suspend mode. in at91_adc_suspend()
1921 clk_disable_unprepare(st->per_clk); in at91_adc_suspend()
1922 regulator_disable(st->vref); in at91_adc_suspend()
1923 regulator_disable(st->reg); in at91_adc_suspend()
1938 ret = regulator_enable(st->reg); in at91_adc_resume()
1942 ret = regulator_enable(st->vref); in at91_adc_resume()
1946 ret = clk_prepare_enable(st->per_clk); in at91_adc_resume()
1960 return at91_adc_configure_trigger(st->trig, true); in at91_adc_resume()
1963 regulator_disable(st->vref); in at91_adc_resume()
1965 regulator_disable(st->reg); in at91_adc_resume()
1967 dev_err(&indio_dev->dev, "failed to resume\n"); in at91_adc_resume()
1975 .compatible = "atmel,sama5d2-adc",
1986 .name = "at91-sama5d2_adc",
1994 MODULE_DESCRIPTION("Atmel AT91 SAMA5D2 ADC");