Lines Matching full:pcr
17 static u8 rts5227_get_ic_version(struct rtsx_pcr *pcr) in rts5227_get_ic_version() argument
21 rtsx_pci_read_register(pcr, DUMMY_REG_RESET_0, &val); in rts5227_get_ic_version()
25 static void rts5227_fill_driving(struct rtsx_pcr *pcr, u8 voltage) in rts5227_fill_driving() argument
43 drive_sel = pcr->sd30_drive_sel_3v3; in rts5227_fill_driving()
46 drive_sel = pcr->sd30_drive_sel_1v8; in rts5227_fill_driving()
49 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD30_CLK_DRIVE_SEL, in rts5227_fill_driving()
51 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD30_CMD_DRIVE_SEL, in rts5227_fill_driving()
53 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD30_DAT_DRIVE_SEL, in rts5227_fill_driving()
57 static void rts5227_fetch_vendor_settings(struct rtsx_pcr *pcr) in rts5227_fetch_vendor_settings() argument
59 struct pci_dev *pdev = pcr->pci; in rts5227_fetch_vendor_settings()
63 pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg); in rts5227_fetch_vendor_settings()
68 pcr->aspm_en = rtsx_reg_to_aspm(reg); in rts5227_fetch_vendor_settings()
69 pcr->sd30_drive_sel_1v8 = rtsx_reg_to_sd30_drive_sel_1v8(reg); in rts5227_fetch_vendor_settings()
70 pcr->card_drive_sel &= 0x3F; in rts5227_fetch_vendor_settings()
71 pcr->card_drive_sel |= rtsx_reg_to_card_drive_sel(reg); in rts5227_fetch_vendor_settings()
74 pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg); in rts5227_fetch_vendor_settings()
76 pcr->extra_caps |= EXTRA_CAPS_NO_MMC; in rts5227_fetch_vendor_settings()
77 pcr->sd30_drive_sel_3v3 = rtsx_reg_to_sd30_drive_sel_3v3(reg); in rts5227_fetch_vendor_settings()
79 pcr->flags |= PCR_REVERSE_SOCKET; in rts5227_fetch_vendor_settings()
82 static void rts5227_init_from_cfg(struct rtsx_pcr *pcr) in rts5227_init_from_cfg() argument
84 struct pci_dev *pdev = pcr->pci; in rts5227_init_from_cfg()
87 struct rtsx_cr_option *option = &pcr->option; in rts5227_init_from_cfg()
95 if (CHK_PCI_PID(pcr, 0x522A)) { in rts5227_init_from_cfg()
97 rtsx_pci_enable_oobs_polling(pcr); in rts5227_init_from_cfg()
99 rtsx_pci_disable_oobs_polling(pcr); in rts5227_init_from_cfg()
103 rtsx_set_dev_flag(pcr, ASPM_L1_1_EN); in rts5227_init_from_cfg()
105 rtsx_clear_dev_flag(pcr, ASPM_L1_1_EN); in rts5227_init_from_cfg()
108 rtsx_set_dev_flag(pcr, ASPM_L1_2_EN); in rts5227_init_from_cfg()
110 rtsx_clear_dev_flag(pcr, ASPM_L1_2_EN); in rts5227_init_from_cfg()
113 rtsx_set_dev_flag(pcr, PM_L1_1_EN); in rts5227_init_from_cfg()
115 rtsx_clear_dev_flag(pcr, PM_L1_1_EN); in rts5227_init_from_cfg()
118 rtsx_set_dev_flag(pcr, PM_L1_2_EN); in rts5227_init_from_cfg()
120 rtsx_clear_dev_flag(pcr, PM_L1_2_EN); in rts5227_init_from_cfg()
125 pcie_capability_read_word(pcr->pci, PCI_EXP_DEVCTL2, &val); in rts5227_init_from_cfg()
129 rtsx_set_ltr_latency(pcr, option->ltr_active_latency); in rts5227_init_from_cfg()
135 if (rtsx_check_dev_flag(pcr, ASPM_L1_1_EN | ASPM_L1_2_EN in rts5227_init_from_cfg()
143 static int rts5227_extra_init_hw(struct rtsx_pcr *pcr) in rts5227_extra_init_hw() argument
146 struct rtsx_cr_option *option = &pcr->option; in rts5227_extra_init_hw()
148 rts5227_init_from_cfg(pcr); in rts5227_extra_init_hw()
149 rtsx_pci_init_cmd(pcr); in rts5227_extra_init_hw()
152 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, GPIO_CTL, 0x02, 0x02); in rts5227_extra_init_hw()
154 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, ASPM_FORCE_CTL, 0x3F, 0); in rts5227_extra_init_hw()
156 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_PWR_SEL, 0x03, 0x00); in rts5227_extra_init_hw()
157 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_PWR_SEL, 0x03, 0x01); in rts5227_extra_init_hw()
159 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, OLT_LED_CTL, 0x0F, 0x02); in rts5227_extra_init_hw()
161 pcie_capability_read_word(pcr->pci, PCI_EXP_DEVCTL2, &cap); in rts5227_extra_init_hw()
163 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LTR_CTL, 0xFF, 0xA3); in rts5227_extra_init_hw()
165 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, OBFF_CFG, 0x03, 0x03); in rts5227_extra_init_hw()
167 rts5227_fill_driving(pcr, OUTPUT_3V3); in rts5227_extra_init_hw()
169 if (pcr->flags & PCR_REVERSE_SOCKET) in rts5227_extra_init_hw()
170 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0x30, 0x30); in rts5227_extra_init_hw()
172 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0x30, 0x00); in rts5227_extra_init_hw()
175 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, in rts5227_extra_init_hw()
178 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, in rts5227_extra_init_hw()
181 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, pcr->reg_pm_ctrl3, 0x10, 0x00); in rts5227_extra_init_hw()
183 return rtsx_pci_send_cmd(pcr, 100); in rts5227_extra_init_hw()
186 static int rts5227_optimize_phy(struct rtsx_pcr *pcr) in rts5227_optimize_phy() argument
190 err = rtsx_pci_write_register(pcr, PM_CTRL3, D3_DELINK_MODE_EN, 0x00); in rts5227_optimize_phy()
195 return rtsx_pci_write_phy_register(pcr, 0x00, 0xBA42); in rts5227_optimize_phy()
198 static int rts5227_turn_on_led(struct rtsx_pcr *pcr) in rts5227_turn_on_led() argument
200 return rtsx_pci_write_register(pcr, GPIO_CTL, 0x02, 0x02); in rts5227_turn_on_led()
203 static int rts5227_turn_off_led(struct rtsx_pcr *pcr) in rts5227_turn_off_led() argument
205 return rtsx_pci_write_register(pcr, GPIO_CTL, 0x02, 0x00); in rts5227_turn_off_led()
208 static int rts5227_enable_auto_blink(struct rtsx_pcr *pcr) in rts5227_enable_auto_blink() argument
210 return rtsx_pci_write_register(pcr, OLT_LED_CTL, 0x08, 0x08); in rts5227_enable_auto_blink()
213 static int rts5227_disable_auto_blink(struct rtsx_pcr *pcr) in rts5227_disable_auto_blink() argument
215 return rtsx_pci_write_register(pcr, OLT_LED_CTL, 0x08, 0x00); in rts5227_disable_auto_blink()
218 static int rts5227_card_power_on(struct rtsx_pcr *pcr, int card) in rts5227_card_power_on() argument
222 if (pcr->option.ocp_en) in rts5227_card_power_on()
223 rtsx_pci_enable_ocp(pcr); in rts5227_card_power_on()
225 rtsx_pci_init_cmd(pcr); in rts5227_card_power_on()
226 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL, in rts5227_card_power_on()
229 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL, in rts5227_card_power_on()
232 err = rtsx_pci_send_cmd(pcr, 100); in rts5227_card_power_on()
238 rtsx_pci_init_cmd(pcr); in rts5227_card_power_on()
239 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL, in rts5227_card_power_on()
242 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL, in rts5227_card_power_on()
245 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_OE, in rts5227_card_power_on()
247 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_OE, in rts5227_card_power_on()
249 return rtsx_pci_send_cmd(pcr, 100); in rts5227_card_power_on()
252 static int rts5227_card_power_off(struct rtsx_pcr *pcr, int card) in rts5227_card_power_off() argument
254 if (pcr->option.ocp_en) in rts5227_card_power_off()
255 rtsx_pci_disable_ocp(pcr); in rts5227_card_power_off()
257 rtsx_pci_write_register(pcr, CARD_PWR_CTL, SD_POWER_MASK | in rts5227_card_power_off()
259 rtsx_pci_write_register(pcr, PWR_GATE_CTRL, LDO3318_PWR_MASK, 0X00); in rts5227_card_power_off()
264 static int rts5227_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage) in rts5227_switch_output_voltage() argument
269 err = rtsx_pci_write_phy_register(pcr, 0x08, 0x4FC0 | 0x24); in rts5227_switch_output_voltage()
273 err = rtsx_pci_write_phy_register(pcr, 0x11, 0x3C02); in rts5227_switch_output_voltage()
276 err = rtsx_pci_write_phy_register(pcr, 0x08, 0x4C80 | 0x24); in rts5227_switch_output_voltage()
284 rtsx_pci_init_cmd(pcr); in rts5227_switch_output_voltage()
285 rts5227_fill_driving(pcr, voltage); in rts5227_switch_output_voltage()
286 return rtsx_pci_send_cmd(pcr, 100); in rts5227_switch_output_voltage()
350 void rts5227_init_params(struct rtsx_pcr *pcr) in rts5227_init_params() argument
352 pcr->extra_caps = EXTRA_CAPS_SD_SDR50 | EXTRA_CAPS_SD_SDR104; in rts5227_init_params()
353 pcr->num_slots = 2; in rts5227_init_params()
354 pcr->ops = &rts5227_pcr_ops; in rts5227_init_params()
356 pcr->flags = 0; in rts5227_init_params()
357 pcr->card_drive_sel = RTSX_CARD_DRIVE_DEFAULT; in rts5227_init_params()
358 pcr->sd30_drive_sel_1v8 = CFG_DRIVER_TYPE_B; in rts5227_init_params()
359 pcr->sd30_drive_sel_3v3 = CFG_DRIVER_TYPE_B; in rts5227_init_params()
360 pcr->aspm_en = ASPM_L1_EN; in rts5227_init_params()
361 pcr->tx_initial_phase = SET_CLOCK_PHASE(27, 27, 15); in rts5227_init_params()
362 pcr->rx_initial_phase = SET_CLOCK_PHASE(30, 7, 7); in rts5227_init_params()
364 pcr->ic_version = rts5227_get_ic_version(pcr); in rts5227_init_params()
365 pcr->sd_pull_ctl_enable_tbl = rts5227_sd_pull_ctl_enable_tbl; in rts5227_init_params()
366 pcr->sd_pull_ctl_disable_tbl = rts5227_sd_pull_ctl_disable_tbl; in rts5227_init_params()
367 pcr->ms_pull_ctl_enable_tbl = rts5227_ms_pull_ctl_enable_tbl; in rts5227_init_params()
368 pcr->ms_pull_ctl_disable_tbl = rts5227_ms_pull_ctl_disable_tbl; in rts5227_init_params()
370 pcr->reg_pm_ctrl3 = PM_CTRL3; in rts5227_init_params()
373 static int rts522a_optimize_phy(struct rtsx_pcr *pcr) in rts522a_optimize_phy() argument
377 err = rtsx_pci_write_register(pcr, RTS522A_PM_CTRL3, D3_DELINK_MODE_EN, in rts522a_optimize_phy()
382 if (is_version(pcr, 0x522A, IC_VER_A)) { in rts522a_optimize_phy()
383 err = rtsx_pci_write_phy_register(pcr, PHY_RCR2, in rts522a_optimize_phy()
388 rtsx_pci_write_phy_register(pcr, PHY_RCR1, PHY_RCR1_INIT_27S); in rts522a_optimize_phy()
389 rtsx_pci_write_phy_register(pcr, PHY_FLD0, PHY_FLD0_INIT_27S); in rts522a_optimize_phy()
390 rtsx_pci_write_phy_register(pcr, PHY_FLD3, PHY_FLD3_INIT_27S); in rts522a_optimize_phy()
391 rtsx_pci_write_phy_register(pcr, PHY_FLD4, PHY_FLD4_INIT_27S); in rts522a_optimize_phy()
397 static int rts522a_extra_init_hw(struct rtsx_pcr *pcr) in rts522a_extra_init_hw() argument
399 rts5227_extra_init_hw(pcr); in rts522a_extra_init_hw()
402 if (!pcr->card_exist) in rts522a_extra_init_hw()
403 rtsx_pci_write_register(pcr, FPDCTL, OC_POWER_DOWN, in rts522a_extra_init_hw()
406 rtsx_pci_write_register(pcr, FUNC_FORCE_CTL, FUNC_FORCE_UPME_XMT_DBG, in rts522a_extra_init_hw()
408 rtsx_pci_write_register(pcr, PCLK_CTL, 0x04, 0x04); in rts522a_extra_init_hw()
409 rtsx_pci_write_register(pcr, PM_EVENT_DEBUG, PME_DEBUG_0, PME_DEBUG_0); in rts522a_extra_init_hw()
410 rtsx_pci_write_register(pcr, PM_CLK_FORCE_CTL, 0xFF, 0x11); in rts522a_extra_init_hw()
415 static int rts522a_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage) in rts522a_switch_output_voltage() argument
420 err = rtsx_pci_write_phy_register(pcr, 0x08, 0x57E4); in rts522a_switch_output_voltage()
424 err = rtsx_pci_write_phy_register(pcr, 0x11, 0x3C02); in rts522a_switch_output_voltage()
427 err = rtsx_pci_write_phy_register(pcr, 0x08, 0x54A4); in rts522a_switch_output_voltage()
435 rtsx_pci_init_cmd(pcr); in rts522a_switch_output_voltage()
436 rts5227_fill_driving(pcr, voltage); in rts522a_switch_output_voltage()
437 return rtsx_pci_send_cmd(pcr, 100); in rts522a_switch_output_voltage()
440 static void rts522a_set_l1off_cfg_sub_d0(struct rtsx_pcr *pcr, int active) in rts522a_set_l1off_cfg_sub_d0() argument
442 struct rtsx_cr_option *option = &pcr->option; in rts522a_set_l1off_cfg_sub_d0()
446 aspm_L1_1 = rtsx_check_dev_flag(pcr, ASPM_L1_1_EN); in rts522a_set_l1off_cfg_sub_d0()
447 aspm_L1_2 = rtsx_check_dev_flag(pcr, ASPM_L1_2_EN); in rts522a_set_l1off_cfg_sub_d0()
459 rtsx_set_l1off_sub(pcr, val); in rts522a_set_l1off_cfg_sub_d0()
480 void rts522a_init_params(struct rtsx_pcr *pcr) in rts522a_init_params() argument
482 struct rtsx_cr_option *option = &pcr->option; in rts522a_init_params()
484 rts5227_init_params(pcr); in rts522a_init_params()
485 pcr->ops = &rts522a_pcr_ops; in rts522a_init_params()
486 pcr->tx_initial_phase = SET_CLOCK_PHASE(20, 20, 11); in rts522a_init_params()
487 pcr->reg_pm_ctrl3 = RTS522A_PM_CTRL3; in rts522a_init_params()
500 pcr->option.ocp_en = 1; in rts522a_init_params()
501 if (pcr->option.ocp_en) in rts522a_init_params()
502 pcr->hw_param.interrupt_en |= SD_OC_INT_EN; in rts522a_init_params()
503 pcr->hw_param.ocp_glitch = SD_OCP_GLITCH_10M; in rts522a_init_params()
504 pcr->option.sd_800mA_ocp_thd = RTS522A_OCP_THD_800; in rts522a_init_params()