1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
42 /* When high resolution timers aren't built-in: we can't use usleep_range() as
55 	struct mscc_miim_dev *miim = bus->priv;  in mscc_miim_wait_ready()  local
58 	return mscc_readl_poll_timeout(miim->regs + MSCC_MIIM_REG_STATUS, val,  in mscc_miim_wait_ready()
65 	struct mscc_miim_dev *miim = bus->priv;  in mscc_miim_wait_pending()  local
68 	return mscc_readl_poll_timeout(miim->regs + MSCC_MIIM_REG_STATUS, val,  in mscc_miim_wait_pending()
75 	struct mscc_miim_dev *miim = bus->priv;  in mscc_miim_read()  local
80 		return -EOPNOTSUPP;  in mscc_miim_read()
88 	       miim->regs + MSCC_MIIM_REG_CMD);  in mscc_miim_read()
94 	val = readl(miim->regs + MSCC_MIIM_REG_DATA);  in mscc_miim_read()
96 		ret = -EIO;  in mscc_miim_read()
108 	struct mscc_miim_dev *miim = bus->priv;  in mscc_miim_write()  local
112 		return -EOPNOTSUPP;  in mscc_miim_write()
122 	       miim->regs + MSCC_MIIM_REG_CMD);  in mscc_miim_write()
130 	struct mscc_miim_dev *miim = bus->priv;  in mscc_miim_reset()  local
132 	if (miim->phy_regs) {  in mscc_miim_reset()
133 		writel(0, miim->phy_regs + MSCC_PHY_REG_PHY_CFG);  in mscc_miim_reset()
134 		writel(0x1ff, miim->phy_regs + MSCC_PHY_REG_PHY_CFG);  in mscc_miim_reset()
150 		return -ENODEV;  in mscc_miim_probe()
152 	bus = devm_mdiobus_alloc_size(&pdev->dev, sizeof(*dev));  in mscc_miim_probe()
154 		return -ENOMEM;  in mscc_miim_probe()
156 	bus->name = "mscc_miim";  in mscc_miim_probe()
157 	bus->read = mscc_miim_read;  in mscc_miim_probe()
158 	bus->write = mscc_miim_write;  in mscc_miim_probe()
159 	bus->reset = mscc_miim_reset;  in mscc_miim_probe()
160 	snprintf(bus->id, MII_BUS_ID_SIZE, "%s-mii", dev_name(&pdev->dev));  in mscc_miim_probe()
161 	bus->parent = &pdev->dev;  in mscc_miim_probe()
163 	dev = bus->priv;  in mscc_miim_probe()
164 	dev->regs = devm_ioremap_resource(&pdev->dev, res);  in mscc_miim_probe()
165 	if (IS_ERR(dev->regs)) {  in mscc_miim_probe()
166 		dev_err(&pdev->dev, "Unable to map MIIM registers\n");  in mscc_miim_probe()
167 		return PTR_ERR(dev->regs);  in mscc_miim_probe()
172 		dev->phy_regs = devm_ioremap_resource(&pdev->dev, res);  in mscc_miim_probe()
173 		if (IS_ERR(dev->phy_regs)) {  in mscc_miim_probe()
174 			dev_err(&pdev->dev, "Unable to map internal phy registers\n");  in mscc_miim_probe()
175 			return PTR_ERR(dev->phy_regs);  in mscc_miim_probe()
179 	ret = of_mdiobus_register(bus, pdev->dev.of_node);  in mscc_miim_probe()
181 		dev_err(&pdev->dev, "Cannot register MDIO bus (%d)\n", ret);  in mscc_miim_probe()
200 	{ .compatible = "mscc,ocelot-miim" },
209 		.name = "mscc-miim",
216 MODULE_DESCRIPTION("Microsemi MIIM driver");