4  * Copyright (C) 2008-2020, VMware, Inc. All Rights Reserved.
18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
23  * Maintained by: pv-drivers@vmware.com
57 #define VMXNET3_REG_ALIGN       8	/* All registers are 8-byte aligned. */
104  *	Little Endian layout of bitfields -
106  *	Byte 1 :	oco gen 13.len.8
108  *	Byte 3 : 	13...msscof...6
110  *	Big Endian layout of bitfields -
113  *	Byte 2 :	oco gen 13.len.8
114  *	Byte 3 :	7.....len.....0
129 	u32 gen:1;      /* generation bit */  member
133 	u32 gen:1;      /* generation bit */  member
163 #define VMXNET3_OM_TSO          3
169 #define VMXNET3_TXD_EOP_DWORD_SHIFT 3
189 #define VMXNET3_TCD_GEN_DWORD_SHIFT	3
200 	u32		gen:1;        /* generation bit */  member
207 	u32		gen:1;        /* Generation bit */  member
217 	u32		gen:1;        /* Generation bit */  member
269 	u32		gen:1;        /* generation bit */  member
291 	u32		gen:1;        /* generation bit */  member
302 	u32		gen:1;        /* generation bit */  member
324 	u32		gen:1;        /* generation bit */  member
329 /* fields in RxCompDesc we access via Vmxnet3_GenericDesc.dword[3] */
348 	VMXNET3_RCD_RSS_TYPE_IPV6     = 3,
371 #define VMXNET3_TXD_NEEDED(size) (((size) + VMXNET3_MAX_TX_BUF_SIZE - 1) / \
374 /* max # of tx descs for a non-tso pkt */
378 #define VMXNET3_MAX_RX_BUF_SIZE  ((1 << 14) - 1)
385 #define VMXNET3_RING_BA_MASK    (VMXNET3_RING_BA_ALIGN - 1)
389 #define VMXNET3_RING_SIZE_MASK  (VMXNET3_RING_SIZE_ALIGN - 1)
393 #define VMXNET3_TXDATA_DESC_SIZE_MASK  (VMXNET3_TXDATA_DESC_SIZE_ALIGN - 1)
397 #define VMXNET3_RXDATA_DESC_SIZE_MASK  (VMXNET3_RXDATA_DESC_SIZE_ALIGN - 1)
426 #define VMXNET3_CDTYPE_RXCOMP      3    /* Rx Completion Descriptor */
443 	u32		gosBits:2;    /* 32-bit or 64-bit? */
445 	u32		gosBits:2;     /* 32-bit or 64-bit? */
528 	VMXNET3_IT_MSIX = 3
556 	u8		_pad[3];
656 	VMXNET3_COALESCE_RBC        = 3
689 	__le16					pad[3];
713 	/* read-only region for device, read by dev in response to a SET cmd */
743 #define VMXNET3_ECR_DIC         (1 << 3)
746 /* flip the gen bit of a ring */
747 #define VMXNET3_FLIP_RING_GEN(gen) ((gen) = (gen) ^ 0x1)  argument
749 /* only use this if moving the idx won't affect the gen bit */