Lines Matching full:io_ctrl
63 * @io_ctrl: I/O register base for PINCONF support outside the GPIO block
72 void __iomem *io_ctrl; member
82 IO_CTRL enumerator
109 if (address == IO_CTRL) in nsp_set_bit()
110 base_address = chip->io_ctrl; in nsp_set_bit()
130 if (address == IO_CTRL) in nsp_get_bit()
131 return !!(readl(chip->io_ctrl + reg) & BIT(gpio)); in nsp_get_bit()
357 nsp_set_bit(chip, IO_CTRL, NSP_GPIO_SLEW_RATE_EN, gpio, true); in nsp_gpio_set_slew()
359 nsp_set_bit(chip, IO_CTRL, NSP_GPIO_SLEW_RATE_EN, gpio, false); in nsp_gpio_set_slew()
370 nsp_set_bit(chip, IO_CTRL, NSP_PULL_DOWN_EN, gpio, pull_down); in nsp_gpio_set_pull()
371 nsp_set_bit(chip, IO_CTRL, NSP_PULL_UP_EN, gpio, pull_up); in nsp_gpio_set_pull()
385 *pull_up = nsp_get_bit(chip, IO_CTRL, NSP_PULL_UP_EN, gpio); in nsp_gpio_get_pull()
386 *pull_down = nsp_get_bit(chip, IO_CTRL, NSP_PULL_DOWN_EN, gpio); in nsp_gpio_get_pull()
408 val = readl(chip->io_ctrl + offset); in nsp_gpio_set_strength()
411 writel(val, chip->io_ctrl + offset); in nsp_gpio_set_strength()
433 val = readl(chip->io_ctrl + offset) & BIT(shift); in nsp_gpio_get_strength()
639 chip->io_ctrl = devm_platform_ioremap_resource(pdev, 1); in nsp_gpio_probe()
640 if (IS_ERR(chip->io_ctrl)) { in nsp_gpio_probe()
642 return PTR_ERR(chip->io_ctrl); in nsp_gpio_probe()