Lines Matching +full:ocelot +full:- +full:miim
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 * Author: <alexandre.belloni@free-electrons.com>
19 #include <linux/pinctrl/pinconf-generic.h>
110 [FUNC_MIIM] = "miim",
183 OCELOT_P(14, MIIM, TWI_SCL_M, SFP);
184 OCELOT_P(15, MIIM, TWI_SCL_M, SFP);
287 JAGUAR2_P(56, MIIM, SFP);
288 JAGUAR2_P(57, MIIM, SFP);
289 JAGUAR2_P(58, MIIM, SFP);
290 JAGUAR2_P(59, MIIM, SFP);
429 SPARX5_P(52, SFP, MIIM, TWI_SCL_M);
430 SPARX5_P(53, SFP, MIIM, TWI_SCL_M);
433 SPARX5_P(56, MIIM, SFP, TWI_SCL_M);
434 SPARX5_P(57, MIIM, SFP, TWI_SCL_M);
435 SPARX5_P(58, MIIM, SFP, TWI_SCL_M);
436 SPARX5_P(59, MIIM, SFP, NONE);
533 *groups = info->func[function].groups; in ocelot_get_function_groups()
534 *num_groups = info->func[function].ngroups; in ocelot_get_function_groups()
542 struct ocelot_pin_caps *p = info->desc->pins[pin].drv_data; in ocelot_pin_function_idx()
546 if (function == p->functions[i]) in ocelot_pin_function_idx()
550 return -1; in ocelot_pin_function_idx()
553 #define REG_ALT(msb, info, p) (OCELOT_GPIO_ALT0 * (info)->stride + 4 * ((msb) + ((info)->stride * (…
559 struct ocelot_pin_caps *pin = info->desc->pins[group].drv_data; in ocelot_pinmux_set_mux()
560 unsigned int p = pin->pin % 32; in ocelot_pinmux_set_mux()
565 return -EINVAL; in ocelot_pinmux_set_mux()
575 regmap_update_bits(info->map, REG_ALT(0, info, pin->pin), in ocelot_pinmux_set_mux()
577 regmap_update_bits(info->map, REG_ALT(1, info, pin->pin), in ocelot_pinmux_set_mux()
583 #define REG(r, info, p) ((r) * (info)->stride + (4 * ((p) / 32)))
592 regmap_update_bits(info->map, REG(OCELOT_GPIO_OE, info, pin), BIT(p), in ocelot_gpio_set_direction()
605 regmap_update_bits(info->map, REG_ALT(0, info, offset), in ocelot_gpio_request_enable()
607 regmap_update_bits(info->map, REG_ALT(1, info, offset), in ocelot_gpio_request_enable()
626 return info->desc->npins; in ocelot_pctl_get_groups_count()
634 return info->desc->pins[group].name; in ocelot_pctl_get_group_name()
644 *pins = &info->desc->pins[group].number; in ocelot_pctl_get_group_pins()
655 int ret = -EOPNOTSUPP; in ocelot_hw_get_value()
657 if (info->pincfg) { in ocelot_hw_get_value()
658 u32 regcfg = readl(info->pincfg + (pin * sizeof(u32))); in ocelot_hw_get_value()
675 ret = -EOPNOTSUPP; in ocelot_hw_get_value()
687 int ret = -EOPNOTSUPP; in ocelot_hw_set_value()
689 if (info->pincfg) { in ocelot_hw_set_value()
690 void __iomem *regaddr = info->pincfg + (pin * sizeof(u32)); in ocelot_hw_set_value()
706 ret = -EINVAL; in ocelot_hw_set_value()
710 ret = -EOPNOTSUPP; in ocelot_hw_set_value()
755 err = regmap_read(info->map, REG(OCELOT_GPIO_OUT, info, pin), in ocelot_pinconf_get()
764 err = regmap_read(info->map, REG(OCELOT_GPIO_OE, info, pin), in ocelot_pinconf_get()
776 return -EOPNOTSUPP; in ocelot_pinconf_get()
832 regmap_write(info->map, in ocelot_pinconf_set()
837 regmap_write(info->map, in ocelot_pinconf_set()
841 regmap_update_bits(info->map, in ocelot_pinconf_set()
849 err = -EOPNOTSUPP; in ocelot_pinconf_set()
872 .name = "ocelot-pinctrl",
881 .name = "jaguar2-pinctrl",
890 .name = "sparx5-pinctrl",
903 u8 *pins = kcalloc(info->desc->npins, sizeof(u8), GFP_KERNEL); in ocelot_create_group_func_map()
906 return -ENOMEM; in ocelot_create_group_func_map()
909 for (npins = 0, i = 0; i < info->desc->npins; i++) { in ocelot_create_group_func_map()
917 info->func[f].ngroups = npins; in ocelot_create_group_func_map()
918 info->func[f].groups = devm_kcalloc(dev, npins, sizeof(char *), in ocelot_create_group_func_map()
920 if (!info->func[f].groups) { in ocelot_create_group_func_map()
922 return -ENOMEM; in ocelot_create_group_func_map()
926 info->func[f].groups[i] = in ocelot_create_group_func_map()
927 info->desc->pins[pins[i]].name; in ocelot_create_group_func_map()
940 ret = ocelot_create_group_func_map(&pdev->dev, info); in ocelot_pinctrl_register()
942 dev_err(&pdev->dev, "Unable to create group func map.\n"); in ocelot_pinctrl_register()
946 info->pctl = devm_pinctrl_register(&pdev->dev, info->desc, info); in ocelot_pinctrl_register()
947 if (IS_ERR(info->pctl)) { in ocelot_pinctrl_register()
948 dev_err(&pdev->dev, "Failed to register pinctrl\n"); in ocelot_pinctrl_register()
949 return PTR_ERR(info->pctl); in ocelot_pinctrl_register()
960 regmap_read(info->map, REG(OCELOT_GPIO_IN, info, offset), &val); in ocelot_gpio_get()
971 regmap_write(info->map, REG(OCELOT_GPIO_OUT_SET, info, offset), in ocelot_gpio_set()
974 regmap_write(info->map, REG(OCELOT_GPIO_OUT_CLR, info, offset), in ocelot_gpio_set()
984 regmap_read(info->map, REG(OCELOT_GPIO_OE, info, offset), &val); in ocelot_gpio_get_direction()
995 return pinctrl_gpio_direction_input(chip->base + offset); in ocelot_gpio_direction_input()
1005 regmap_write(info->map, REG(OCELOT_GPIO_OUT_SET, info, offset), in ocelot_gpio_direction_output()
1008 regmap_write(info->map, REG(OCELOT_GPIO_OUT_CLR, info, offset), in ocelot_gpio_direction_output()
1011 return pinctrl_gpio_direction_output(chip->base + offset); in ocelot_gpio_direction_output()
1031 regmap_update_bits(info->map, REG(OCELOT_GPIO_INTR_ENA, info, gpio), in ocelot_irq_mask()
1041 regmap_update_bits(info->map, REG(OCELOT_GPIO_INTR_ENA, info, gpio), in ocelot_irq_unmask()
1051 regmap_write_bits(info->map, REG(OCELOT_GPIO_INTR, info, gpio), in ocelot_irq_ack()
1079 return -EINVAL; in ocelot_irq_set_type()
1096 unsigned int id_reg = OCELOT_GPIO_INTR_IDENT * info->stride; in ocelot_irq_handler()
1100 for (i = 0; i < info->stride; i++) { in ocelot_irq_handler()
1101 regmap_read(info->map, id_reg + 4 * i, ®); in ocelot_irq_handler()
1110 min(32U, info->desc->npins - 32 * i)) in ocelot_irq_handler()
1111 generic_handle_irq(irq_linear_revmap(chip->irq.domain, in ocelot_irq_handler()
1125 info->gpio_chip = ocelot_gpiolib_chip; in ocelot_gpiochip_register()
1127 gc = &info->gpio_chip; in ocelot_gpiochip_register()
1128 gc->ngpio = info->desc->npins; in ocelot_gpiochip_register()
1129 gc->parent = &pdev->dev; in ocelot_gpiochip_register()
1130 gc->base = 0; in ocelot_gpiochip_register()
1131 gc->of_node = info->dev->of_node; in ocelot_gpiochip_register()
1132 gc->label = "ocelot-gpio"; in ocelot_gpiochip_register()
1134 irq = irq_of_parse_and_map(gc->of_node, 0); in ocelot_gpiochip_register()
1136 girq = &gc->irq; in ocelot_gpiochip_register()
1137 girq->chip = &ocelot_irqchip; in ocelot_gpiochip_register()
1138 girq->parent_handler = ocelot_irq_handler; in ocelot_gpiochip_register()
1139 girq->num_parents = 1; in ocelot_gpiochip_register()
1140 girq->parents = devm_kcalloc(&pdev->dev, 1, in ocelot_gpiochip_register()
1141 sizeof(*girq->parents), in ocelot_gpiochip_register()
1143 if (!girq->parents) in ocelot_gpiochip_register()
1144 return -ENOMEM; in ocelot_gpiochip_register()
1145 girq->parents[0] = irq; in ocelot_gpiochip_register()
1146 girq->default_type = IRQ_TYPE_NONE; in ocelot_gpiochip_register()
1147 girq->handler = handle_edge_irq; in ocelot_gpiochip_register()
1150 return devm_gpiochip_add_data(&pdev->dev, gc, info); in ocelot_gpiochip_register()
1154 { .compatible = "mscc,ocelot-pinctrl", .data = &ocelot_desc },
1155 { .compatible = "mscc,jaguar2-pinctrl", .data = &jaguar2_desc },
1156 { .compatible = "microchip,sparx5-pinctrl", .data = &sparx5_desc },
1162 struct device *dev = &pdev->dev; in ocelot_pinctrl_probe()
1175 return -ENOMEM; in ocelot_pinctrl_probe()
1177 info->desc = (struct pinctrl_desc *)device_get_match_data(dev); in ocelot_pinctrl_probe()
1186 info->stride = 1 + (info->desc->npins - 1) / 32; in ocelot_pinctrl_probe()
1188 regmap_config.max_register = OCELOT_GPIO_SD_MAP * info->stride + 15 * 4; in ocelot_pinctrl_probe()
1190 info->map = devm_regmap_init_mmio(dev, base, ®map_config); in ocelot_pinctrl_probe()
1191 if (IS_ERR(info->map)) { in ocelot_pinctrl_probe()
1193 return PTR_ERR(info->map); in ocelot_pinctrl_probe()
1195 dev_set_drvdata(dev, info->map); in ocelot_pinctrl_probe()
1196 info->dev = dev; in ocelot_pinctrl_probe()
1199 if (info->desc->confops) { in ocelot_pinctrl_probe()
1205 info->pincfg = base; in ocelot_pinctrl_probe()
1223 .name = "pinctrl-ocelot",