Lines Matching +full:entry +full:- +full:address
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * linux/arch/arm/mm/proc-arm926.S: MMU functions for ARM926EJ-S
5 * Copyright (C) 1999-2001 ARM Limited
7 * hacked for non-paged-MM by Hyok S. Choi, 2003.
12 * CONFIG_CPU_ARM926_CPU_IDLE -> nohlt
19 #include <asm/pgtable-hwdef.h>
22 #include "proc-macros.S"
26 * using the single invalidate entry instructions. Anything larger
43 ENTRY(cpu_arm926_proc_init)
49 ENTRY(cpu_arm926_proc_fin)
67 ENTRY(cpu_arm926_reset)
88 ENTRY(cpu_arm926_do_idle)
107 ENTRY(arm926_flush_icache_all)
117 * address space.
119 ENTRY(arm926_flush_user_cache_all)
127 ENTRY(arm926_flush_kern_cache_all)
146 * specified address range.
148 * - start - start address (inclusive)
149 * - end - end address (exclusive)
150 * - flags - vm_flags describing address space
152 ENTRY(arm926_flush_user_cache_range)
159 mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
160 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
162 mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
163 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
166 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D entry
167 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
169 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D entry
170 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
183 * region described by start, end. If you have non-snooping
186 * - start - virtual start address
187 * - end - virtual end address
189 ENTRY(arm926_coherent_kern_range)
196 * region described by start, end. If you have non-snooping
199 * - start - virtual start address
200 * - end - virtual end address
202 ENTRY(arm926_coherent_user_range)
203 bic r0, r0, #CACHE_DLINESIZE - 1
204 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
205 mcr p15, 0, r0, c7, c5, 1 @ invalidate I entry
219 * - addr - kernel address
220 * - size - region size
222 ENTRY(arm926_flush_kern_dcache_area)
224 1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
236 * Invalidate (discard) the specified virtual address range.
241 * - start - virtual start address
242 * - end - virtual end address
248 tst r0, #CACHE_DLINESIZE - 1
249 mcrne p15, 0, r0, c7, c10, 1 @ clean D entry
250 tst r1, #CACHE_DLINESIZE - 1
251 mcrne p15, 0, r1, c7, c10, 1 @ clean D entry
253 bic r0, r0, #CACHE_DLINESIZE - 1
254 1: mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
264 * Clean the specified virtual address range.
266 * - start - virtual start address
267 * - end - virtual end address
273 bic r0, r0, #CACHE_DLINESIZE - 1
274 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
285 * Clean and invalidate the specified virtual address range.
287 * - start - virtual start address
288 * - end - virtual end address
290 ENTRY(arm926_dma_flush_range)
291 bic r0, r0, #CACHE_DLINESIZE - 1
294 mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
296 mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
306 * - start - kernel virtual start address
307 * - size - size of region
308 * - dir - DMA direction
310 ENTRY(arm926_dma_map_area)
320 * - start - kernel virtual start address
321 * - size - size of region
322 * - dir - DMA direction
324 ENTRY(arm926_dma_unmap_area)
331 @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S)
334 ENTRY(cpu_arm926_dcache_clean_area)
336 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
354 ENTRY(cpu_arm926_switch_mm)
377 ENTRY(cpu_arm926_set_pte_ext)
382 mcr p15, 0, r0, c7, c10, 1 @ clean D entry
388 /* Suspend/resume support: taken from arch/arm/plat-s3c24xx/sleep.S */
392 ENTRY(cpu_arm926_do_suspend)
393 stmfd sp!, {r4 - r6, lr}
397 stmia r0, {r4 - r6}
398 ldmfd sp!, {r4 - r6, pc}
401 ENTRY(cpu_arm926_do_resume)
405 ldmia r0, {r4 - r6}
408 mcr p15, 0, r1, c2, c0, 0 @ TTB address
425 mov r0, #4 @ disable write-back on caches explicitly
438 .size __arm926_setup, . - __arm926_setup
452 @ define struct processor (see <asm/proc-fns.h> and proc-macros.S)
459 string cpu_arm926_name, "ARM926EJ-S"
467 .long 0x41069260 @ ARM926EJ-S (v5TEJ)
488 .size __arm926_proc_info, . - __arm926_proc_info