1 // SPDX-License-Identifier: GPL-2.0-only
26  * Returns the hart ID of the given device tree node, or -ENODEV if the node
27  * isn't an enabled and valid RISC-V hart node.
29 int riscv_of_processor_hartid(struct device_node *node, unsigned long *hart)  in riscv_of_processor_hartid()  argument
33 	*hart = (unsigned long)of_get_cpu_hwid(node, 0);  in riscv_of_processor_hartid()
34 	if (*hart == ~0UL) {  in riscv_of_processor_hartid()
35 		pr_warn("Found CPU without hart ID\n");  in riscv_of_processor_hartid()
36 		return -ENODEV;  in riscv_of_processor_hartid()
39 	cpu = riscv_hartid_to_cpuid(*hart);  in riscv_of_processor_hartid()
44 		return -ENODEV;  in riscv_of_processor_hartid()
49 int __init riscv_early_of_processor_hartid(struct device_node *node, unsigned long *hart)  in riscv_early_of_processor_hartid()  argument
55 		return -ENODEV;  in riscv_early_of_processor_hartid()
58 	*hart = (unsigned long)of_get_cpu_hwid(node, 0);  in riscv_early_of_processor_hartid()
59 	if (*hart == ~0UL) {  in riscv_early_of_processor_hartid()
60 		pr_warn("Found CPU without hart ID\n");  in riscv_early_of_processor_hartid()
61 		return -ENODEV;  in riscv_early_of_processor_hartid()
65 		pr_info("CPU with hartid=%lu is not available\n", *hart);  in riscv_early_of_processor_hartid()
66 		return -ENODEV;  in riscv_early_of_processor_hartid()
69 	if (of_property_read_string(node, "riscv,isa-base", &isa))  in riscv_early_of_processor_hartid()
73 		pr_warn("CPU with hartid=%lu does not support rv32i", *hart);  in riscv_early_of_processor_hartid()
74 		return -ENODEV;  in riscv_early_of_processor_hartid()
78 		pr_warn("CPU with hartid=%lu does not support rv64i", *hart);  in riscv_early_of_processor_hartid()
79 		return -ENODEV;  in riscv_early_of_processor_hartid()
82 	if (!of_property_present(node, "riscv,isa-extensions"))  in riscv_early_of_processor_hartid()
83 		return -ENODEV;  in riscv_early_of_processor_hartid()
85 	if (of_property_match_string(node, "riscv,isa-extensions", "i") < 0 ||  in riscv_early_of_processor_hartid()
86 	    of_property_match_string(node, "riscv,isa-extensions", "m") < 0 ||  in riscv_early_of_processor_hartid()
87 	    of_property_match_string(node, "riscv,isa-extensions", "a") < 0) {  in riscv_early_of_processor_hartid()
88 		pr_warn("CPU with hartid=%lu does not support ima", *hart);  in riscv_early_of_processor_hartid()
89 		return -ENODEV;  in riscv_early_of_processor_hartid()
97 			*hart);  in riscv_early_of_processor_hartid()
98 		return -ENODEV;  in riscv_early_of_processor_hartid()
102 		pr_warn("CPU with hartid=%lu has no \"riscv,isa-base\" or \"riscv,isa\" property\n",  in riscv_early_of_processor_hartid()
103 			*hart);  in riscv_early_of_processor_hartid()
104 		return -ENODEV;  in riscv_early_of_processor_hartid()
108 		pr_warn("CPU with hartid=%lu does not support rv32ima", *hart);  in riscv_early_of_processor_hartid()
109 		return -ENODEV;  in riscv_early_of_processor_hartid()
113 		pr_warn("CPU with hartid=%lu does not support rv64ima", *hart);  in riscv_early_of_processor_hartid()
114 		return -ENODEV;  in riscv_early_of_processor_hartid()
121  * Find hart ID of the CPU DT node under which given DT node falls.
124  * RISC-V core (HART) node and extract the cpuid from it.
128 	for (; node; node = node->parent) {  in riscv_of_parent_hartid()
132 				pr_warn("Found CPU without hart ID\n");  in riscv_of_parent_hartid()
133 				return -ENODEV;  in riscv_of_parent_hartid()
139 	return -1;  in riscv_of_parent_hartid()
148 	return ci->mvendorid;  in riscv_cached_mvendorid()
156 	return ci->marchid;  in riscv_cached_marchid()
164 	return ci->mimpid;  in riscv_cached_mimpid()
173 	ci->mvendorid = sbi_spec_is_0_1() ? 0 : sbi_get_mvendorid();  in riscv_cpuinfo_starting()
174 	ci->marchid = sbi_spec_is_0_1() ? 0 : sbi_get_marchid();  in riscv_cpuinfo_starting()
175 	ci->mimpid = sbi_spec_is_0_1() ? 0 : sbi_get_mimpid();  in riscv_cpuinfo_starting()
177 	ci->mvendorid = csr_read(CSR_MVENDORID);  in riscv_cpuinfo_starting()
178 	ci->marchid = csr_read(CSR_MARCHID);  in riscv_cpuinfo_starting()
179 	ci->mimpid = csr_read(CSR_MIMPID);  in riscv_cpuinfo_starting()
181 	ci->mvendorid = 0;  in riscv_cpuinfo_starting()
182 	ci->marchid = 0;  in riscv_cpuinfo_starting()
183 	ci->mimpid = 0;  in riscv_cpuinfo_starting()
219 		/* Only multi-letter extensions are split by underscores */  in print_isa()
255 	*pos = cpumask_next(*pos - 1, cpu_online_mask);  in c_start()
273 	unsigned long cpu_id = (unsigned long)v - 1;  in c_show()
279 	seq_printf(m, "hart\t\t: %lu\n", cpuid_to_hartid_map(cpu_id));  in c_show()
286 		if (!of_property_read_string(node, "compatible", &compat) &&  in c_show()
293 	seq_printf(m, "mvendorid\t: 0x%lx\n", ci->mvendorid);  in c_show()
294 	seq_printf(m, "marchid\t\t: 0x%lx\n", ci->marchid);  in c_show()
295 	seq_printf(m, "mimpid\t\t: 0x%lx\n", ci->mimpid);  in c_show()