Lines Matching +full:gemini +full:- +full:ata +full:- +full:muxmode
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Cortina Systems Gemini SATA bridge add-on to Faraday FTIDE010
24 * struct sata_gemini - a state container for a Gemini SATA bridge
27 * @muxmode: the current muxing mode
38 enum gemini_muxmode muxmode; member
53 * adapters are connected to which of the two IDE/ATA
54 * controllers in the Gemini. We can connect the two IDE blocks
62 * 111-100 - Reserved
63 * Mode 0: 000 - ata0 master <-> sata0
64 * ata1 master <-> sata1
66 * Mode 1: 001 - ata0 master <-> sata0
67 * ata1 master <-> sata1
69 * Mode 2: 010 - ata1 master <-> sata1
70 * ata1 slave <-> sata0
73 * Mode 3: 011 - ata0 master <-> sata0
74 * ata1 slave <-> sata1
86 * Registers directly controlling the PATA<->SATA adapters
121 return ERR_PTR(-EPROBE_DEFER); in gemini_sata_bridge_get()
127 if (!sg->sata_bridge) in gemini_sata_bridge_enabled()
130 * In muxmode 2 and 3 one of the ATA controllers is in gemini_sata_bridge_enabled()
133 if ((sg->muxmode == GEMINI_MUXMODE_2) && in gemini_sata_bridge_enabled()
136 if ((sg->muxmode == GEMINI_MUXMODE_3) && in gemini_sata_bridge_enabled()
146 return sg->muxmode; in gemini_sata_get_muxmode()
159 /* SATA0 slave mode is only used in muxmode 2 */ in gemini_sata_setup_bridge()
160 if (sg->muxmode == GEMINI_MUXMODE_2) in gemini_sata_setup_bridge()
162 writel(val, sg->base + GEMINI_SATA0_CTRL); in gemini_sata_setup_bridge()
165 /* SATA1 slave mode is only used in muxmode 3 */ in gemini_sata_setup_bridge()
166 if (sg->muxmode == GEMINI_MUXMODE_3) in gemini_sata_setup_bridge()
168 writel(val, sg->base + GEMINI_SATA1_CTRL); in gemini_sata_setup_bridge()
179 val = readl(sg->base + GEMINI_SATA0_STATUS); in gemini_sata_setup_bridge()
181 val = readl(sg->base + GEMINI_SATA1_STATUS); in gemini_sata_setup_bridge()
188 dev_info(sg->dev, "SATA%d PHY %s\n", bridge, in gemini_sata_setup_bridge()
191 return bridge_online ? 0: -ENODEV; in gemini_sata_setup_bridge()
200 pclk = sg->sata0_pclk; in gemini_sata_start_bridge()
202 pclk = sg->sata1_pclk; in gemini_sata_start_bridge()
218 clk_disable(sg->sata0_pclk); in gemini_sata_stop_bridge()
220 clk_disable(sg->sata1_pclk); in gemini_sata_stop_bridge()
228 reset_control_reset(sg->sata0_reset); in gemini_sata_reset_bridge()
230 reset_control_reset(sg->sata1_reset); in gemini_sata_reset_bridge()
238 struct device *dev = sg->dev; in gemini_sata_bridge_init()
242 sg->sata0_pclk = devm_clk_get(dev, "SATA0_PCLK"); in gemini_sata_bridge_init()
243 if (IS_ERR(sg->sata0_pclk)) { in gemini_sata_bridge_init()
245 return -ENODEV; in gemini_sata_bridge_init()
247 sg->sata1_pclk = devm_clk_get(dev, "SATA1_PCLK"); in gemini_sata_bridge_init()
248 if (IS_ERR(sg->sata1_pclk)) { in gemini_sata_bridge_init()
250 return -ENODEV; in gemini_sata_bridge_init()
253 ret = clk_prepare_enable(sg->sata0_pclk); in gemini_sata_bridge_init()
258 ret = clk_prepare_enable(sg->sata1_pclk); in gemini_sata_bridge_init()
261 clk_disable_unprepare(sg->sata0_pclk); in gemini_sata_bridge_init()
265 sg->sata0_reset = devm_reset_control_get_exclusive(dev, "sata0"); in gemini_sata_bridge_init()
266 if (IS_ERR(sg->sata0_reset)) { in gemini_sata_bridge_init()
268 clk_disable_unprepare(sg->sata1_pclk); in gemini_sata_bridge_init()
269 clk_disable_unprepare(sg->sata0_pclk); in gemini_sata_bridge_init()
270 return PTR_ERR(sg->sata0_reset); in gemini_sata_bridge_init()
272 sg->sata1_reset = devm_reset_control_get_exclusive(dev, "sata1"); in gemini_sata_bridge_init()
273 if (IS_ERR(sg->sata1_reset)) { in gemini_sata_bridge_init()
275 clk_disable_unprepare(sg->sata1_pclk); in gemini_sata_bridge_init()
276 clk_disable_unprepare(sg->sata0_pclk); in gemini_sata_bridge_init()
277 return PTR_ERR(sg->sata1_reset); in gemini_sata_bridge_init()
280 sata_id = readl(sg->base + GEMINI_SATA_ID); in gemini_sata_bridge_init()
281 sata_phy_id = readl(sg->base + GEMINI_SATA_PHY_ID); in gemini_sata_bridge_init()
282 sg->sata_bridge = true; in gemini_sata_bridge_init()
283 clk_disable(sg->sata0_pclk); in gemini_sata_bridge_init()
284 clk_disable(sg->sata1_pclk); in gemini_sata_bridge_init()
316 struct device *dev = &pdev->dev; in gemini_sata_probe()
317 struct device_node *np = dev->of_node; in gemini_sata_probe()
320 enum gemini_muxmode muxmode; in gemini_sata_probe() local
327 return -ENOMEM; in gemini_sata_probe()
328 sg->dev = dev; in gemini_sata_probe()
330 sg->base = devm_platform_ioremap_resource(pdev, 0); in gemini_sata_probe()
331 if (IS_ERR(sg->base)) in gemini_sata_probe()
332 return PTR_ERR(sg->base); in gemini_sata_probe()
341 if (of_property_read_bool(np, "cortina,gemini-enable-sata-bridge")) { in gemini_sata_probe()
347 if (of_property_read_bool(np, "cortina,gemini-enable-ide-pins")) in gemini_sata_probe()
348 sg->ide_pins = true; in gemini_sata_probe()
350 if (!sg->sata_bridge && !sg->ide_pins) { in gemini_sata_probe()
352 ret = -EINVAL; in gemini_sata_probe()
356 ret = of_property_read_u32(np, "cortina,gemini-ata-muxmode", &muxmode); in gemini_sata_probe()
358 dev_err(dev, "could not parse ATA muxmode\n"); in gemini_sata_probe()
361 if (muxmode > GEMINI_MUXMODE_3) { in gemini_sata_probe()
362 dev_err(dev, "illegal muxmode %d\n", muxmode); in gemini_sata_probe()
363 ret = -EINVAL; in gemini_sata_probe()
366 sg->muxmode = muxmode; in gemini_sata_probe()
368 gmode = (muxmode << GEMINI_IDE_IOMUX_SHIFT); in gemini_sata_probe()
373 ret = -ENODEV; in gemini_sata_probe()
382 if (sg->ide_pins) { in gemini_sata_probe()
388 dev_info(dev, "set up the Gemini IDE/SATA nexus\n"); in gemini_sata_probe()
395 if (sg->sata_bridge) { in gemini_sata_probe()
396 clk_unprepare(sg->sata1_pclk); in gemini_sata_probe()
397 clk_unprepare(sg->sata0_pclk); in gemini_sata_probe()
406 if (sg->sata_bridge) { in gemini_sata_remove()
407 clk_unprepare(sg->sata1_pclk); in gemini_sata_remove()
408 clk_unprepare(sg->sata0_pclk); in gemini_sata_remove()
414 { .compatible = "cortina,gemini-sata-bridge", },
428 MODULE_DESCRIPTION("low level driver for Cortina Systems Gemini SATA bridge");