Lines Matching +full:clock +full:- +full:accuracy
1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
4 * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org>
6 * Standard functionality for the common clock API. See Documentation/driver-api/clk.rst
10 #include <linux/clk-provider.h>
11 #include <linux/clk/clk-conf.h>
80 unsigned long accuracy; member
111 if (!core->rpm_enabled) in clk_pm_runtime_get()
114 return pm_runtime_resume_and_get(core->dev); in clk_pm_runtime_get()
119 if (!core->rpm_enabled) in clk_pm_runtime_put()
122 pm_runtime_put_sync(core->dev); in clk_pm_runtime_put()
146 if (--prepare_refcnt) in clk_prepare_unlock()
186 if (--enable_refcnt) { in clk_enable_unlock()
196 return core->protect_count; in clk_core_rate_is_protected()
207 if (!core->ops->is_prepared) in clk_core_is_prepared()
208 return core->prepare_count; in clk_core_is_prepared()
211 ret = core->ops->is_prepared(core->hw); in clk_core_is_prepared()
226 if (!core->ops->is_enabled) in clk_core_is_enabled()
227 return core->enable_count; in clk_core_is_enabled()
230 * Check if clock controller's device is runtime active before in clk_core_is_enabled()
231 * calling .is_enabled callback. If not, assume that clock is in clk_core_is_enabled()
239 if (core->rpm_enabled) { in clk_core_is_enabled()
240 pm_runtime_get_noresume(core->dev); in clk_core_is_enabled()
241 if (!pm_runtime_active(core->dev)) { in clk_core_is_enabled()
250 * anything here. We can also assume this clock isn't enabled. in clk_core_is_enabled()
252 if ((core->flags & CLK_OPS_PARENT_ENABLE) && core->parent) in clk_core_is_enabled()
253 if (!clk_core_is_enabled(core->parent)) { in clk_core_is_enabled()
258 ret = core->ops->is_enabled(core->hw); in clk_core_is_enabled()
260 if (core->rpm_enabled) in clk_core_is_enabled()
261 pm_runtime_put(core->dev); in clk_core_is_enabled()
270 return !clk ? NULL : clk->core->name; in __clk_get_name()
276 return hw->core->name; in clk_hw_get_name()
282 return !clk ? NULL : clk->core->hw; in __clk_get_hw()
288 return hw->core->num_parents; in clk_hw_get_num_parents()
294 return hw->core->parent ? hw->core->parent->hw : NULL; in clk_hw_get_parent()
304 if (!strcmp(core->name, name)) in __clk_lookup_subtree()
307 hlist_for_each_entry(child, &core->children, child_node) { in __clk_lookup_subtree()
351 return -ENOENT; in of_parse_clkspec()
356 return ERR_PTR(-ENOENT); in of_clk_get_hw_from_clkspec()
361 * clk_core_get - Find the clk_core parent of a clk
368 * node's 'clock-names' property or as the 'con_id' matching the device's
372 * For example the following DT snippet would allow a clock registered by the
373 * clock-controller@c001 that has a clk_init_data::parent_data array
374 * with 'xtal' in the 'name' member to find the clock provided by the
375 * clock-controller@f00abcd without needing to get the globally unique name of
378 * parent: clock-controller@f00abcd {
380 * #clock-cells = <0>;
383 * clock-controller@c001 {
386 * clock-names = "xtal";
387 * #clock-cells = <1>;
390 * Returns: -ENOENT when the provider can't be found or the clk doesn't
398 const char *name = core->parents[p_index].fw_name; in clk_core_get()
399 int index = core->parents[p_index].index; in clk_core_get()
400 struct clk_hw *hw = ERR_PTR(-ENOENT); in clk_core_get()
401 struct device *dev = core->dev; in clk_core_get()
403 struct device_node *np = core->of_node; in clk_core_get()
421 return hw->core; in clk_core_get()
426 struct clk_parent_map *entry = &core->parents[index]; in clk_core_fill_parent_index()
429 if (entry->hw) { in clk_core_fill_parent_index()
430 parent = entry->hw->core; in clk_core_fill_parent_index()
433 if (PTR_ERR(parent) == -ENOENT && entry->name) in clk_core_fill_parent_index()
434 parent = clk_core_lookup(entry->name); in clk_core_fill_parent_index()
443 parent = ERR_PTR(-EPROBE_DEFER); in clk_core_fill_parent_index()
447 entry->core = parent; in clk_core_fill_parent_index()
453 if (!core || index >= core->num_parents || !core->parents) in clk_core_get_parent_by_index()
456 if (!core->parents[index].core) in clk_core_get_parent_by_index()
459 return core->parents[index].core; in clk_core_get_parent_by_index()
467 parent = clk_core_get_parent_by_index(hw->core, index); in clk_hw_get_parent_by_index()
469 return !parent ? NULL : parent->hw; in clk_hw_get_parent_by_index()
475 return !clk ? 0 : clk->core->enable_count; in __clk_get_enable_count()
483 if (!core->num_parents || core->parent) in clk_core_get_rate_nolock()
484 return core->rate; in clk_core_get_rate_nolock()
496 return clk_core_get_rate_nolock(hw->core); in clk_hw_get_rate()
505 return core->accuracy; in clk_core_get_accuracy_no_lock()
510 return hw->core->flags; in clk_hw_get_flags()
516 return clk_core_is_prepared(hw->core); in clk_hw_is_prepared()
522 return clk_core_rate_is_protected(hw->core); in clk_hw_rate_is_protected()
528 return clk_core_is_enabled(hw->core); in clk_hw_is_enabled()
537 return clk_core_is_enabled(clk->core); in __clk_is_enabled()
545 return abs(now - rate) < abs(best - rate); in mux_is_better_rate()
563 if (core->parent == parent) in clk_core_has_parent()
566 for (i = 0; i < core->num_parents; i++) { in clk_core_has_parent()
590 if (req->min_rate < old_req->min_rate) in clk_core_forward_rate_req()
591 req->min_rate = old_req->min_rate; in clk_core_forward_rate_req()
593 if (req->max_rate > old_req->max_rate) in clk_core_forward_rate_req()
594 req->max_rate = old_req->max_rate; in clk_core_forward_rate_req()
601 struct clk_core *core = hw->core; in clk_core_determine_rate_no_reparent()
602 struct clk_core *parent = core->parent; in clk_core_determine_rate_no_reparent()
606 if (core->flags & CLK_SET_RATE_PARENT) { in clk_core_determine_rate_no_reparent()
610 req->rate = 0; in clk_core_determine_rate_no_reparent()
615 req->rate); in clk_core_determine_rate_no_reparent()
632 req->best_parent_rate = best; in clk_core_determine_rate_no_reparent()
633 req->rate = best; in clk_core_determine_rate_no_reparent()
642 struct clk_core *core = hw->core, *parent, *best_parent = NULL; in clk_mux_determine_rate_flags()
647 if (core->flags & CLK_SET_RATE_NO_REPARENT) in clk_mux_determine_rate_flags()
651 num_parents = core->num_parents; in clk_mux_determine_rate_flags()
659 if (core->flags & CLK_SET_RATE_PARENT) { in clk_mux_determine_rate_flags()
662 clk_core_forward_rate_req(core, req, parent, &parent_req, req->rate); in clk_mux_determine_rate_flags()
677 if (mux_is_better_rate(req->rate, parent_rate, in clk_mux_determine_rate_flags()
685 return -EINVAL; in clk_mux_determine_rate_flags()
687 req->best_parent_hw = best_parent->hw; in clk_mux_determine_rate_flags()
688 req->best_parent_rate = best; in clk_mux_determine_rate_flags()
689 req->rate = best; in clk_mux_determine_rate_flags()
699 return !core ? NULL : core->hw->clk; in __clk_lookup()
710 *min_rate = core->min_rate; in clk_core_get_boundaries()
711 *max_rate = core->max_rate; in clk_core_get_boundaries()
713 hlist_for_each_entry(clk_user, &core->clks, clks_node) in clk_core_get_boundaries()
714 *min_rate = max(*min_rate, clk_user->min_rate); in clk_core_get_boundaries()
716 hlist_for_each_entry(clk_user, &core->clks, clks_node) in clk_core_get_boundaries()
717 *max_rate = min(*max_rate, clk_user->max_rate); in clk_core_get_boundaries()
721 * clk_hw_get_rate_range() - returns the clock rate range for a hw clk
727 * maximum that clock can reach.
732 clk_core_get_boundaries(hw->core, min_rate, max_rate); in clk_hw_get_rate_range()
744 if (min_rate > core->max_rate || max_rate < core->min_rate) in clk_core_check_boundaries()
747 hlist_for_each_entry(user, &core->clks, clks_node) in clk_core_check_boundaries()
748 if (min_rate > user->max_rate || max_rate < user->min_rate) in clk_core_check_boundaries()
757 hw->core->min_rate = min_rate; in clk_hw_set_rate_range()
758 hw->core->max_rate = max_rate; in clk_hw_set_rate_range()
763 * __clk_mux_determine_rate - clk_ops::determine_rate implementation for a mux type clk
769 * complex clock that may combine a mux with other operations.
771 * Returns: 0 on success, -EERROR value on error
788 …* clk_hw_determine_rate_no_reparent - clk_ops::determine_rate implementation for a clk that doesn'…
794 * mux), or from a more complex clock that may combine a mux with other
797 * Returns: 0 on success, -EERROR value on error
815 if (WARN(core->protect_count == 0, in clk_core_rate_unprotect()
816 "%s already unprotected\n", core->name)) in clk_core_rate_unprotect()
819 if (--core->protect_count > 0) in clk_core_rate_unprotect()
822 clk_core_rate_unprotect(core->parent); in clk_core_rate_unprotect()
832 return -EINVAL; in clk_core_rate_nuke_protect()
834 if (core->protect_count == 0) in clk_core_rate_nuke_protect()
837 ret = core->protect_count; in clk_core_rate_nuke_protect()
838 core->protect_count = 1; in clk_core_rate_nuke_protect()
845 * clk_rate_exclusive_put - release exclusivity over clock rate control
848 * clk_rate_exclusive_put() completes a critical section during which a clock
850 * clock which could result in a rate change or rate glitch. Exclusive clocks
855 * If exlusivity is claimed more than once on clock, even by the same consumer,
873 if (WARN_ON(clk->exclusive_count <= 0)) in clk_rate_exclusive_put()
876 clk_core_rate_unprotect(clk->core); in clk_rate_exclusive_put()
877 clk->exclusive_count--; in clk_rate_exclusive_put()
890 if (core->protect_count == 0) in clk_core_rate_protect()
891 clk_core_rate_protect(core->parent); in clk_core_rate_protect()
893 core->protect_count++; in clk_core_rate_protect()
907 core->protect_count = count; in clk_core_rate_restore_protect()
911 * clk_rate_exclusive_get - get exclusivity over the clk rate control
914 * clk_rate_exclusive_get() begins a critical section during which a clock
916 * clock which could result in a rate change or rate glitch. Exclusive clocks
921 * If exlusivity is claimed more than once on clock, even by the same consumer,
926 * Returns 0 on success, -EERROR otherwise
934 clk_core_rate_protect(clk->core); in clk_rate_exclusive_get()
935 clk->exclusive_count++; in clk_rate_exclusive_get()
949 if (WARN(core->prepare_count == 0, in clk_core_unprepare()
950 "%s already unprepared\n", core->name)) in clk_core_unprepare()
953 if (WARN(core->prepare_count == 1 && core->flags & CLK_IS_CRITICAL, in clk_core_unprepare()
954 "Unpreparing critical %s\n", core->name)) in clk_core_unprepare()
957 if (core->flags & CLK_SET_RATE_GATE) in clk_core_unprepare()
960 if (--core->prepare_count > 0) in clk_core_unprepare()
963 WARN(core->enable_count > 0, "Unpreparing enabled %s\n", core->name); in clk_core_unprepare()
967 if (core->ops->unprepare) in clk_core_unprepare()
968 core->ops->unprepare(core->hw); in clk_core_unprepare()
971 clk_core_unprepare(core->parent); in clk_core_unprepare()
983 * clk_unprepare - undo preparation of a clock source
998 clk_core_unprepare_lock(clk->core); in clk_unprepare()
1011 if (core->prepare_count == 0) { in clk_core_prepare()
1016 ret = clk_core_prepare(core->parent); in clk_core_prepare()
1022 if (core->ops->prepare) in clk_core_prepare()
1023 ret = core->ops->prepare(core->hw); in clk_core_prepare()
1031 core->prepare_count++; in clk_core_prepare()
1034 * CLK_SET_RATE_GATE is a special case of clock protection in clk_core_prepare()
1038 * the clock is prepared. in clk_core_prepare()
1040 if (core->flags & CLK_SET_RATE_GATE) in clk_core_prepare()
1045 clk_core_unprepare(core->parent); in clk_core_prepare()
1063 * clk_prepare - prepare a clock source
1072 * Returns 0 on success, -EERROR otherwise.
1079 return clk_core_prepare_lock(clk->core); in clk_prepare()
1090 if (WARN(core->enable_count == 0, "%s already disabled\n", core->name)) in clk_core_disable()
1093 if (WARN(core->enable_count == 1 && core->flags & CLK_IS_CRITICAL, in clk_core_disable()
1094 "Disabling critical %s\n", core->name)) in clk_core_disable()
1097 if (--core->enable_count > 0) in clk_core_disable()
1102 if (core->ops->disable) in clk_core_disable()
1103 core->ops->disable(core->hw); in clk_core_disable()
1107 clk_core_disable(core->parent); in clk_core_disable()
1120 * clk_disable - gate a clock
1126 * SoC-internal clk which is controlled via simple register writes. In the
1136 clk_core_disable_lock(clk->core); in clk_disable()
1149 if (WARN(core->prepare_count == 0, in clk_core_enable()
1150 "Enabling unprepared %s\n", core->name)) in clk_core_enable()
1151 return -ESHUTDOWN; in clk_core_enable()
1153 if (core->enable_count == 0) { in clk_core_enable()
1154 ret = clk_core_enable(core->parent); in clk_core_enable()
1161 if (core->ops->enable) in clk_core_enable()
1162 ret = core->ops->enable(core->hw); in clk_core_enable()
1167 clk_core_disable(core->parent); in clk_core_enable()
1172 core->enable_count++; in clk_core_enable()
1189 * clk_gate_restore_context - restore context for poweroff
1190 * @hw: the clk_hw pointer of clock whose state is to be restored
1192 * The clock gate restore context function enables or disables
1194 * where the clock context is lost and based on the enable_count
1195 * the clock either needs to be enabled/disabled. This
1200 struct clk_core *core = hw->core; in clk_gate_restore_context()
1202 if (core->enable_count) in clk_gate_restore_context()
1203 core->ops->enable(hw); in clk_gate_restore_context()
1205 core->ops->disable(hw); in clk_gate_restore_context()
1214 hlist_for_each_entry(child, &core->children, child_node) { in clk_core_save_context()
1220 if (core->ops && core->ops->save_context) in clk_core_save_context()
1221 ret = core->ops->save_context(core->hw); in clk_core_save_context()
1230 if (core->ops && core->ops->restore_context) in clk_core_restore_context()
1231 core->ops->restore_context(core->hw); in clk_core_restore_context()
1233 hlist_for_each_entry(child, &core->children, child_node) in clk_core_restore_context()
1238 * clk_save_context - save clock context for poweroff
1240 * Saves the context of the clock register for powerstates in which the
1266 * clk_restore_context - restore clock context after poweroff
1268 * Restore the saved clock context upon resume.
1284 * clk_enable - ungate a clock
1289 * if the operation will never sleep. One example is a SoC-internal clk which
1293 * must be called before clk_enable. Returns 0 on success, -EERROR
1301 return clk_core_enable_lock(clk->core); in clk_enable()
1306 * clk_is_enabled_when_prepared - indicate if preparing a clock also enables it.
1307 * @clk: clock source
1309 * Returns true if clk_prepare() implicitly enables the clock, effectively
1310 * making clk_enable()/clk_disable() no-ops, false otherwise.
1313 * disabling the clock also requires unpreparing it to have any material
1322 return clk && !(clk->core->ops->enable && clk->core->ops->disable); in clk_is_enabled_when_prepared()
1353 hlist_for_each_entry(child, &core->children, child_node) in clk_unprepare_unused_subtree()
1356 if (core->prepare_count) in clk_unprepare_unused_subtree()
1359 if (core->flags & CLK_IGNORE_UNUSED) in clk_unprepare_unused_subtree()
1367 if (core->ops->unprepare_unused) in clk_unprepare_unused_subtree()
1368 core->ops->unprepare_unused(core->hw); in clk_unprepare_unused_subtree()
1369 else if (core->ops->unprepare) in clk_unprepare_unused_subtree()
1370 core->ops->unprepare(core->hw); in clk_unprepare_unused_subtree()
1384 hlist_for_each_entry(child, &core->children, child_node) in clk_disable_unused_subtree()
1387 if (core->flags & CLK_OPS_PARENT_ENABLE) in clk_disable_unused_subtree()
1388 clk_core_prepare_enable(core->parent); in clk_disable_unused_subtree()
1395 if (core->enable_count) in clk_disable_unused_subtree()
1398 if (core->flags & CLK_IGNORE_UNUSED) in clk_disable_unused_subtree()
1402 * some gate clocks have special needs during the disable-unused in clk_disable_unused_subtree()
1408 if (core->ops->disable_unused) in clk_disable_unused_subtree()
1409 core->ops->disable_unused(core->hw); in clk_disable_unused_subtree()
1410 else if (core->ops->disable) in clk_disable_unused_subtree()
1411 core->ops->disable(core->hw); in clk_disable_unused_subtree()
1419 if (core->flags & CLK_OPS_PARENT_ENABLE) in clk_disable_unused_subtree()
1420 clk_core_disable_unprepare(core->parent); in clk_disable_unused_subtree()
1473 * Some clock providers hand-craft their clk_rate_requests and in clk_core_determine_round_nolock()
1480 if (!req->min_rate && !req->max_rate) in clk_core_determine_round_nolock()
1482 __func__, core->name); in clk_core_determine_round_nolock()
1484 req->rate = clamp(req->rate, req->min_rate, req->max_rate); in clk_core_determine_round_nolock()
1488 * - if the provider is not protected at all in clk_core_determine_round_nolock()
1489 * - if the calling consumer is the only one which has exclusivity in clk_core_determine_round_nolock()
1493 req->rate = core->rate; in clk_core_determine_round_nolock()
1494 } else if (core->ops->determine_rate) { in clk_core_determine_round_nolock()
1495 return core->ops->determine_rate(core->hw, req); in clk_core_determine_round_nolock()
1496 } else if (core->ops->round_rate) { in clk_core_determine_round_nolock()
1497 rate = core->ops->round_rate(core->hw, req->rate, in clk_core_determine_round_nolock()
1498 &req->best_parent_rate); in clk_core_determine_round_nolock()
1502 req->rate = rate; in clk_core_determine_round_nolock()
1504 return -EINVAL; in clk_core_determine_round_nolock()
1520 req->max_rate = ULONG_MAX; in clk_core_init_rate_req()
1525 req->core = core; in clk_core_init_rate_req()
1526 req->rate = rate; in clk_core_init_rate_req()
1527 clk_core_get_boundaries(core, &req->min_rate, &req->max_rate); in clk_core_init_rate_req()
1529 parent = core->parent; in clk_core_init_rate_req()
1531 req->best_parent_hw = parent->hw; in clk_core_init_rate_req()
1532 req->best_parent_rate = parent->rate; in clk_core_init_rate_req()
1534 req->best_parent_hw = NULL; in clk_core_init_rate_req()
1535 req->best_parent_rate = 0; in clk_core_init_rate_req()
1540 * clk_hw_init_rate_request - Initializes a clk_rate_request
1555 clk_core_init_rate_req(hw->core, req, rate); in clk_hw_init_rate_request()
1560 * clk_hw_forward_rate_request - Forwards a clk_rate_request to a clock's parent
1561 * @hw: the original clock that got the rate request
1567 * Initializes a clk_rate_request structure to submit to a clock parent
1579 clk_core_forward_rate_req(hw->core, old_req, in clk_hw_forward_rate_request()
1580 parent->core, req, in clk_hw_forward_rate_request()
1587 return core->ops->determine_rate || core->ops->round_rate; in clk_core_can_round()
1598 req->rate = 0; in clk_core_round_rate_nolock()
1605 if (core->flags & CLK_SET_RATE_PARENT) { in clk_core_round_rate_nolock()
1608 clk_core_forward_rate_req(core, req, core->parent, &parent_req, req->rate); in clk_core_round_rate_nolock()
1612 ret = clk_core_round_rate_nolock(core->parent, &parent_req); in clk_core_round_rate_nolock()
1618 req->best_parent_rate = parent_req.rate; in clk_core_round_rate_nolock()
1619 req->rate = parent_req.rate; in clk_core_round_rate_nolock()
1624 req->rate = core->rate; in clk_core_round_rate_nolock()
1629 * __clk_determine_rate - get the closest rate actually supported by a clock
1630 * @hw: determine the rate of this clock
1638 req->rate = 0; in __clk_determine_rate()
1642 return clk_core_round_rate_nolock(hw->core, req); in __clk_determine_rate()
1647 * clk_hw_round_rate() - round the given rate for a hw clk
1666 clk_core_init_rate_req(hw->core, &req, rate); in clk_hw_round_rate()
1670 ret = clk_core_round_rate_nolock(hw->core, &req); in clk_hw_round_rate()
1681 * clk_round_rate - round the given rate for a clk
1699 if (clk->exclusive_count) in clk_round_rate()
1700 clk_core_rate_unprotect(clk->core); in clk_round_rate()
1702 clk_core_init_rate_req(clk->core, &req, rate); in clk_round_rate()
1706 ret = clk_core_round_rate_nolock(clk->core, &req); in clk_round_rate()
1710 if (clk->exclusive_count) in clk_round_rate()
1711 clk_core_rate_protect(clk->core); in clk_round_rate()
1723 * __clk_notify - call clk notifier chain
1729 * Triggers a notifier call chain on the clk rate-change notification
1732 * internal clock code only. Returns NOTIFY_DONE from the last driver
1747 if (cn->clk->core == core) { in __clk_notify()
1748 cnd.clk = cn->clk; in __clk_notify()
1749 ret = srcu_notifier_call_chain(&cn->notifier_head, msg, in __clk_notify()
1765 * callback then it is assumed that the clock will take on the accuracy of its
1775 if (core->parent) in __clk_recalc_accuracies()
1776 parent_accuracy = core->parent->accuracy; in __clk_recalc_accuracies()
1778 if (core->ops->recalc_accuracy) in __clk_recalc_accuracies()
1779 core->accuracy = core->ops->recalc_accuracy(core->hw, in __clk_recalc_accuracies()
1782 core->accuracy = parent_accuracy; in __clk_recalc_accuracies()
1784 hlist_for_each_entry(child, &core->children, child_node) in __clk_recalc_accuracies()
1790 if (core && (core->flags & CLK_GET_ACCURACY_NOCACHE)) in clk_core_get_accuracy_recalc()
1797 * clk_get_accuracy - return the accuracy of clk
1798 * @clk: the clk whose accuracy is being returned
1800 * Simply returns the cached accuracy of the clk, unless
1807 long accuracy; in clk_get_accuracy() local
1813 accuracy = clk_core_get_accuracy_recalc(clk->core); in clk_get_accuracy()
1816 return accuracy; in clk_get_accuracy()
1825 if (core->ops->recalc_rate && !clk_pm_runtime_get(core)) { in clk_recalc()
1826 rate = core->ops->recalc_rate(core->hw, parent_rate); in clk_recalc()
1840 * it is assumed that the clock will take on the rate of its parent.
1854 old_rate = core->rate; in __clk_recalc_rates()
1856 if (core->parent) in __clk_recalc_rates()
1857 parent_rate = core->parent->rate; in __clk_recalc_rates()
1859 core->rate = clk_recalc(core, parent_rate); in __clk_recalc_rates()
1861 core->req_rate = core->rate; in __clk_recalc_rates()
1867 if (core->notifier_count && msg) in __clk_recalc_rates()
1868 __clk_notify(core, msg, old_rate, core->rate); in __clk_recalc_rates()
1870 hlist_for_each_entry(child, &core->children, child_node) in __clk_recalc_rates()
1876 if (core && (core->flags & CLK_GET_RATE_NOCACHE)) in clk_core_get_rate_recalc()
1883 * clk_get_rate - return the rate of clk
1888 * the clock enabledness. If clk is NULL, or if an error occurred, then returns
1899 rate = clk_core_get_rate_recalc(clk->core); in clk_get_rate()
1912 return -EINVAL; in clk_fetch_parent_index()
1914 for (i = 0; i < core->num_parents; i++) { in clk_fetch_parent_index()
1916 if (core->parents[i].core == parent) in clk_fetch_parent_index()
1920 if (core->parents[i].core) in clk_fetch_parent_index()
1924 if (core->parents[i].hw) { in clk_fetch_parent_index()
1925 if (core->parents[i].hw == parent->hw) in clk_fetch_parent_index()
1937 if (core->parents[i].name && in clk_fetch_parent_index()
1938 !strcmp(parent->name, core->parents[i].name)) in clk_fetch_parent_index()
1942 if (i == core->num_parents) in clk_fetch_parent_index()
1943 return -EINVAL; in clk_fetch_parent_index()
1945 core->parents[i].core = parent; in clk_fetch_parent_index()
1950 * clk_hw_get_parent_index - return the index of the parent clock
1953 * Fetches and returns the index of parent clock. Returns -EINVAL if the given
1954 * clock does not have a current parent.
1961 return -EINVAL; in clk_hw_get_parent_index()
1963 return clk_fetch_parent_index(hw->core, parent->core); in clk_hw_get_parent_index()
1974 core->orphan = is_orphan; in clk_core_update_orphan_status()
1976 hlist_for_each_entry(child, &core->children, child_node) in clk_core_update_orphan_status()
1982 bool was_orphan = core->orphan; in clk_reparent()
1984 hlist_del(&core->child_node); in clk_reparent()
1987 bool becomes_orphan = new_parent->orphan; in clk_reparent()
1990 if (new_parent->new_child == core) in clk_reparent()
1991 new_parent->new_child = NULL; in clk_reparent()
1993 hlist_add_head(&core->child_node, &new_parent->children); in clk_reparent()
1998 hlist_add_head(&core->child_node, &clk_orphan_list); in clk_reparent()
2003 core->parent = new_parent; in clk_reparent()
2010 struct clk_core *old_parent = core->parent; in __clk_set_parent_before()
2013 * 1. enable parents for CLK_OPS_PARENT_ENABLE clock in __clk_set_parent_before()
2018 * If the clock is not prepared, then a race with in __clk_set_parent_before()
2023 * If the clock is prepared, migrate the prepared state to the new in __clk_set_parent_before()
2025 * forcing the clock and the new parent on. This ensures that all in __clk_set_parent_before()
2033 if (core->flags & CLK_OPS_PARENT_ENABLE) { in __clk_set_parent_before()
2039 if (core->prepare_count) { in __clk_set_parent_before()
2060 if (core->prepare_count) { in __clk_set_parent_after()
2065 /* re-balance ref counting if CLK_OPS_PARENT_ENABLE is set */ in __clk_set_parent_after()
2066 if (core->flags & CLK_OPS_PARENT_ENABLE) { in __clk_set_parent_after()
2083 /* change clock input source */ in __clk_set_parent()
2084 if (parent && core->ops->set_parent) in __clk_set_parent()
2085 ret = core->ops->set_parent(core->hw, p_index); in __clk_set_parent()
2113 * pre-rate change notifications and returns early if no clks in the
2115 * implement the .recalc_rate callback then it is assumed that the clock will
2130 if (core->notifier_count) in __clk_speculate_rates()
2131 ret = __clk_notify(core, PRE_RATE_CHANGE, core->rate, new_rate); in __clk_speculate_rates()
2134 pr_debug("%s: clk notifier callback for clock %s aborted with error %d\n", in __clk_speculate_rates()
2135 __func__, core->name, ret); in __clk_speculate_rates()
2139 hlist_for_each_entry(child, &core->children, child_node) { in __clk_speculate_rates()
2154 core->new_rate = new_rate; in clk_calc_subtree()
2155 core->new_parent = new_parent; in clk_calc_subtree()
2156 core->new_parent_index = p_index; in clk_calc_subtree()
2158 core->new_child = NULL; in clk_calc_subtree()
2159 if (new_parent && new_parent != core->parent) in clk_calc_subtree()
2160 new_parent->new_child = core; in clk_calc_subtree()
2162 hlist_for_each_entry(child, &core->children, child_node) { in clk_calc_subtree()
2163 child->new_rate = clk_recalc(child, new_rate); in clk_calc_subtree()
2164 clk_calc_subtree(child, child->new_rate, NULL, 0); in clk_calc_subtree()
2169 * calculate the new rates returning the topmost clock that has to be
2189 parent = old_parent = core->parent; in clk_calc_new_rates()
2191 best_parent_rate = parent->rate; in clk_calc_new_rates()
2211 parent = req.best_parent_hw ? req.best_parent_hw->core : NULL; in clk_calc_new_rates()
2215 } else if (!parent || !(core->flags & CLK_SET_RATE_PARENT)) { in clk_calc_new_rates()
2216 /* pass-through clock without adjustable parent */ in clk_calc_new_rates()
2217 core->new_rate = core->rate; in clk_calc_new_rates()
2220 /* pass-through clock with adjustable parent */ in clk_calc_new_rates()
2222 new_rate = parent->new_rate; in clk_calc_new_rates()
2228 (core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) { in clk_calc_new_rates()
2230 __func__, core->name); in clk_calc_new_rates()
2235 if (parent && core->num_parents > 1) { in clk_calc_new_rates()
2239 __func__, parent->name, core->name); in clk_calc_new_rates()
2244 if ((core->flags & CLK_SET_RATE_PARENT) && parent && in clk_calc_new_rates()
2245 best_parent_rate != parent->rate) in clk_calc_new_rates()
2265 if (core->rate == core->new_rate) in clk_propagate_rate_change()
2268 if (core->notifier_count) { in clk_propagate_rate_change()
2269 ret = __clk_notify(core, event, core->rate, core->new_rate); in clk_propagate_rate_change()
2274 hlist_for_each_entry(child, &core->children, child_node) { in clk_propagate_rate_change()
2275 /* Skip children who will be reparented to another clock */ in clk_propagate_rate_change()
2276 if (child->new_parent && child->new_parent != core) in clk_propagate_rate_change()
2283 /* handle the new child who might not be in core->children yet */ in clk_propagate_rate_change()
2284 if (core->new_child) { in clk_propagate_rate_change()
2285 tmp_clk = clk_propagate_rate_change(core->new_child, event); in clk_propagate_rate_change()
2307 old_rate = core->rate; in clk_change_rate()
2309 if (core->new_parent) { in clk_change_rate()
2310 parent = core->new_parent; in clk_change_rate()
2311 best_parent_rate = core->new_parent->rate; in clk_change_rate()
2312 } else if (core->parent) { in clk_change_rate()
2313 parent = core->parent; in clk_change_rate()
2314 best_parent_rate = core->parent->rate; in clk_change_rate()
2320 if (core->flags & CLK_SET_RATE_UNGATE) { in clk_change_rate()
2325 if (core->new_parent && core->new_parent != core->parent) { in clk_change_rate()
2326 old_parent = __clk_set_parent_before(core, core->new_parent); in clk_change_rate()
2327 trace_clk_set_parent(core, core->new_parent); in clk_change_rate()
2329 if (core->ops->set_rate_and_parent) { in clk_change_rate()
2331 core->ops->set_rate_and_parent(core->hw, core->new_rate, in clk_change_rate()
2333 core->new_parent_index); in clk_change_rate()
2334 } else if (core->ops->set_parent) { in clk_change_rate()
2335 core->ops->set_parent(core->hw, core->new_parent_index); in clk_change_rate()
2338 trace_clk_set_parent_complete(core, core->new_parent); in clk_change_rate()
2339 __clk_set_parent_after(core, core->new_parent, old_parent); in clk_change_rate()
2342 if (core->flags & CLK_OPS_PARENT_ENABLE) in clk_change_rate()
2345 trace_clk_set_rate(core, core->new_rate); in clk_change_rate()
2347 if (!skip_set_rate && core->ops->set_rate) in clk_change_rate()
2348 core->ops->set_rate(core->hw, core->new_rate, best_parent_rate); in clk_change_rate()
2350 trace_clk_set_rate_complete(core, core->new_rate); in clk_change_rate()
2352 core->rate = clk_recalc(core, best_parent_rate); in clk_change_rate()
2354 if (core->flags & CLK_SET_RATE_UNGATE) { in clk_change_rate()
2359 if (core->flags & CLK_OPS_PARENT_ENABLE) in clk_change_rate()
2362 if (core->notifier_count && old_rate != core->rate) in clk_change_rate()
2363 __clk_notify(core, POST_RATE_CHANGE, old_rate, core->rate); in clk_change_rate()
2365 if (core->flags & CLK_RECALC_NEW_RATES) in clk_change_rate()
2366 (void)clk_calc_new_rates(core, core->new_rate); in clk_change_rate()
2370 * for certain clock types. in clk_change_rate()
2372 hlist_for_each_entry_safe(child, tmp, &core->children, child_node) { in clk_change_rate()
2373 /* Skip children who will be reparented to another clock */ in clk_change_rate()
2374 if (child->new_parent && child->new_parent != core) in clk_change_rate()
2379 /* handle the new child who might not be in core->children yet */ in clk_change_rate()
2380 if (core->new_child) in clk_change_rate()
2381 clk_change_rate(core->new_child); in clk_change_rate()
2434 return -EBUSY; in clk_core_set_rate_nolock()
2436 /* calculate new rates and get the topmost changed clock */ in clk_core_set_rate_nolock()
2439 return -EINVAL; in clk_core_set_rate_nolock()
2449 fail_clk->name); in clk_core_set_rate_nolock()
2451 ret = -EBUSY; in clk_core_set_rate_nolock()
2458 core->req_rate = req_rate; in clk_core_set_rate_nolock()
2466 * clk_set_rate - specify a new rate for clk
2484 * Returns 0 on success, -EERROR otherwise.
2493 /* prevent racing with updates to the clock topology */ in clk_set_rate()
2496 if (clk->exclusive_count) in clk_set_rate()
2497 clk_core_rate_unprotect(clk->core); in clk_set_rate()
2499 ret = clk_core_set_rate_nolock(clk->core, rate); in clk_set_rate()
2501 if (clk->exclusive_count) in clk_set_rate()
2502 clk_core_rate_protect(clk->core); in clk_set_rate()
2511 * clk_set_rate_exclusive - specify a new rate and get exclusive control
2520 * same clock provider.
2527 * Returns 0 on success, -EERROR otherwise.
2536 /* prevent racing with updates to the clock topology */ in clk_set_rate_exclusive()
2542 * so before the consumer code path protect the clock provider in clk_set_rate_exclusive()
2545 ret = clk_core_set_rate_nolock(clk->core, rate); in clk_set_rate_exclusive()
2547 clk_core_rate_protect(clk->core); in clk_set_rate_exclusive()
2548 clk->exclusive_count++; in clk_set_rate_exclusive()
2569 trace_clk_set_rate_range(clk->core, min, max); in clk_set_rate_range_nolock()
2573 __func__, clk->core->name, clk->dev_id, clk->con_id, in clk_set_rate_range_nolock()
2575 return -EINVAL; in clk_set_rate_range_nolock()
2578 if (clk->exclusive_count) in clk_set_rate_range_nolock()
2579 clk_core_rate_unprotect(clk->core); in clk_set_rate_range_nolock()
2582 old_min = clk->min_rate; in clk_set_rate_range_nolock()
2583 old_max = clk->max_rate; in clk_set_rate_range_nolock()
2584 clk->min_rate = min; in clk_set_rate_range_nolock()
2585 clk->max_rate = max; in clk_set_rate_range_nolock()
2587 if (!clk_core_check_boundaries(clk->core, min, max)) { in clk_set_rate_range_nolock()
2588 ret = -EINVAL; in clk_set_rate_range_nolock()
2592 rate = clk->core->req_rate; in clk_set_rate_range_nolock()
2593 if (clk->core->flags & CLK_GET_RATE_NOCACHE) in clk_set_rate_range_nolock()
2594 rate = clk_core_get_rate_recalc(clk->core); in clk_set_rate_range_nolock()
2598 * opportunity to the provider to adjust the clock rate based on in clk_set_rate_range_nolock()
2601 * We also need to handle the case where the clock is currently in clk_set_rate_range_nolock()
2606 * There is a catch. It may fail for the usual reason (clock in clk_set_rate_range_nolock()
2607 * broken, clock protected, etc) but also because: in clk_set_rate_range_nolock()
2608 * - round_rate() was not favorable and fell on the wrong in clk_set_rate_range_nolock()
2610 * - the determine_rate() callback does not really check for in clk_set_rate_range_nolock()
2614 ret = clk_core_set_rate_nolock(clk->core, rate); in clk_set_rate_range_nolock()
2617 clk->min_rate = old_min; in clk_set_rate_range_nolock()
2618 clk->max_rate = old_max; in clk_set_rate_range_nolock()
2622 if (clk->exclusive_count) in clk_set_rate_range_nolock()
2623 clk_core_rate_protect(clk->core); in clk_set_rate_range_nolock()
2629 * clk_set_rate_range - set a rate range for a clock source
2630 * @clk: clock source
2631 * @min: desired minimum clock rate in Hz, inclusive
2632 * @max: desired maximum clock rate in Hz, inclusive
2654 * clk_set_min_rate - set a minimum clock rate for a clock source
2655 * @clk: clock source
2656 * @rate: desired minimum clock rate in Hz, inclusive
2665 trace_clk_set_min_rate(clk->core, rate); in clk_set_min_rate()
2667 return clk_set_rate_range(clk, rate, clk->max_rate); in clk_set_min_rate()
2672 * clk_set_max_rate - set a maximum clock rate for a clock source
2673 * @clk: clock source
2674 * @rate: desired maximum clock rate in Hz, inclusive
2683 trace_clk_set_max_rate(clk->core, rate); in clk_set_max_rate()
2685 return clk_set_rate_range(clk, clk->min_rate, rate); in clk_set_max_rate()
2690 * clk_get_parent - return the parent of a clk
2693 * Simply returns clk->parent. Returns NULL if clk is NULL.
2703 /* TODO: Create a per-user clk and change callers to call clk_put */ in clk_get_parent()
2704 parent = !clk->core->parent ? NULL : clk->core->parent->hw->clk; in clk_get_parent()
2715 if (core->num_parents > 1 && core->ops->get_parent) in __clk_init_parent()
2716 index = core->ops->get_parent(core->hw); in __clk_init_parent()
2734 clk_core_reparent(hw->core, !new_parent ? NULL : new_parent->core); in clk_hw_reparent()
2738 * clk_has_parent - check if a clock is a possible parent for another
2739 * @clk: clock source
2740 * @parent: parent clock source
2742 * This function can be used in drivers that need to check that a clock can be
2753 return clk_core_has_parent(clk->core, parent->core); in clk_has_parent()
2769 if (core->parent == parent) in clk_core_set_parent_nolock()
2772 /* verify ops for multi-parent clks */ in clk_core_set_parent_nolock()
2773 if (core->num_parents > 1 && !core->ops->set_parent) in clk_core_set_parent_nolock()
2774 return -EPERM; in clk_core_set_parent_nolock()
2776 /* check that we are allowed to re-parent if the clock is in use */ in clk_core_set_parent_nolock()
2777 if ((core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) in clk_core_set_parent_nolock()
2778 return -EBUSY; in clk_core_set_parent_nolock()
2781 return -EBUSY; in clk_core_set_parent_nolock()
2788 __func__, parent->name, core->name); in clk_core_set_parent_nolock()
2791 p_rate = parent->rate; in clk_core_set_parent_nolock()
2805 /* do the re-parent */ in clk_core_set_parent_nolock()
2808 /* propagate rate an accuracy recalculation accordingly */ in clk_core_set_parent_nolock()
2824 return clk_core_set_parent_nolock(hw->core, parent->core); in clk_hw_set_parent()
2829 * clk_set_parent - switch the parent of a mux clk
2833 * Re-parent clk to use parent as its new input source. If clk is in
2843 * Returns 0 on success, -EERROR otherwise.
2854 if (clk->exclusive_count) in clk_set_parent()
2855 clk_core_rate_unprotect(clk->core); in clk_set_parent()
2857 ret = clk_core_set_parent_nolock(clk->core, in clk_set_parent()
2858 parent ? parent->core : NULL); in clk_set_parent()
2860 if (clk->exclusive_count) in clk_set_parent()
2861 clk_core_rate_protect(clk->core); in clk_set_parent()
2871 int ret = -EINVAL; in clk_core_set_phase_nolock()
2879 return -EBUSY; in clk_core_set_phase_nolock()
2883 if (core->ops->set_phase) { in clk_core_set_phase_nolock()
2884 ret = core->ops->set_phase(core->hw, degrees); in clk_core_set_phase_nolock()
2886 core->phase = degrees; in clk_core_set_phase_nolock()
2895 * clk_set_phase - adjust the phase shift of a clock signal
2896 * @clk: clock signal source
2899 * Shifts the phase of a clock signal by the specified
2900 * degrees. Returns 0 on success, -EERROR otherwise.
2903 * signal that we adjust the clock signal phase against. For example
2904 * phase locked-loop clock signal generators we may shift phase with
2905 * respect to feedback clock signal input, but for other cases the
2906 * clock phase may be shifted with respect to some other, unspecified
2910 * the clock tree hierarchy, which sets it apart from clock rates and
2911 * clock accuracy. A parent clock phase attribute does not have an
2912 * impact on the phase attribute of a child clock.
2928 if (clk->exclusive_count) in clk_set_phase()
2929 clk_core_rate_unprotect(clk->core); in clk_set_phase()
2931 ret = clk_core_set_phase_nolock(clk->core, degrees); in clk_set_phase()
2933 if (clk->exclusive_count) in clk_set_phase()
2934 clk_core_rate_protect(clk->core); in clk_set_phase()
2947 if (!core->ops->get_phase) in clk_core_get_phase()
2951 ret = core->ops->get_phase(core->hw); in clk_core_get_phase()
2953 core->phase = ret; in clk_core_get_phase()
2959 * clk_get_phase - return the phase shift of a clock signal
2960 * @clk: clock signal source
2962 * Returns the phase shift of a clock node in degrees, otherwise returns
2963 * -EERROR.
2973 ret = clk_core_get_phase(clk->core); in clk_get_phase()
2983 core->duty.num = 1; in clk_core_reset_duty_cycle_nolock()
2984 core->duty.den = 2; in clk_core_reset_duty_cycle_nolock()
2991 struct clk_duty *duty = &core->duty; in clk_core_update_duty_cycle_nolock()
2994 if (!core->ops->get_duty_cycle) in clk_core_update_duty_cycle_nolock()
2997 ret = core->ops->get_duty_cycle(core->hw, duty); in clk_core_update_duty_cycle_nolock()
3001 /* Don't trust the clock provider too much */ in clk_core_update_duty_cycle_nolock()
3002 if (duty->den == 0 || duty->num > duty->den) { in clk_core_update_duty_cycle_nolock()
3003 ret = -EINVAL; in clk_core_update_duty_cycle_nolock()
3018 if (core->parent && in clk_core_update_duty_cycle_parent_nolock()
3019 core->flags & CLK_DUTY_CYCLE_PARENT) { in clk_core_update_duty_cycle_parent_nolock()
3020 ret = clk_core_update_duty_cycle_nolock(core->parent); in clk_core_update_duty_cycle_parent_nolock()
3021 memcpy(&core->duty, &core->parent->duty, sizeof(core->duty)); in clk_core_update_duty_cycle_parent_nolock()
3040 return -EBUSY; in clk_core_set_duty_cycle_nolock()
3044 if (!core->ops->set_duty_cycle) in clk_core_set_duty_cycle_nolock()
3047 ret = core->ops->set_duty_cycle(core->hw, duty); in clk_core_set_duty_cycle_nolock()
3049 memcpy(&core->duty, duty, sizeof(*duty)); in clk_core_set_duty_cycle_nolock()
3061 if (core->parent && in clk_core_set_duty_cycle_parent_nolock()
3062 core->flags & (CLK_DUTY_CYCLE_PARENT | CLK_SET_RATE_PARENT)) { in clk_core_set_duty_cycle_parent_nolock()
3063 ret = clk_core_set_duty_cycle_nolock(core->parent, duty); in clk_core_set_duty_cycle_parent_nolock()
3064 memcpy(&core->duty, &core->parent->duty, sizeof(core->duty)); in clk_core_set_duty_cycle_parent_nolock()
3071 * clk_set_duty_cycle - adjust the duty cycle ratio of a clock signal
3072 * @clk: clock signal source
3076 * Apply the duty cycle ratio if the ratio is valid and the clock can
3091 return -EINVAL; in clk_set_duty_cycle()
3098 if (clk->exclusive_count) in clk_set_duty_cycle()
3099 clk_core_rate_unprotect(clk->core); in clk_set_duty_cycle()
3101 ret = clk_core_set_duty_cycle_nolock(clk->core, &duty); in clk_set_duty_cycle()
3103 if (clk->exclusive_count) in clk_set_duty_cycle()
3104 clk_core_rate_protect(clk->core); in clk_set_duty_cycle()
3115 struct clk_duty *duty = &core->duty; in clk_core_get_scaled_duty_cycle()
3122 ret = mult_frac(scale, duty->num, duty->den); in clk_core_get_scaled_duty_cycle()
3130 * clk_get_scaled_duty_cycle - return the duty cycle ratio of a clock signal
3131 * @clk: clock signal source
3134 * Returns the duty cycle ratio of a clock node multiplied by the provided
3142 return clk_core_get_scaled_duty_cycle(clk->core, scale); in clk_get_scaled_duty_cycle()
3147 * clk_is_match - check if two clk's point to the same hardware clock
3152 * clock node. Put differently, returns true if struct clk *p and struct clk *q
3163 /* true if clk->core pointers match. Avoid dereferencing garbage */ in clk_is_match()
3165 if (p->core == q->core) in clk_is_match()
3192 seq_printf(s, "%*s%-*s %7d %8d %8d %11lu %10lu ", in clk_summary_show_one()
3194 30 - level * 3, c->name, in clk_summary_show_one()
3195 c->enable_count, c->prepare_count, c->protect_count, in clk_summary_show_one()
3203 seq_puts(s, "-----"); in clk_summary_show_one()
3207 if (c->ops->is_enabled) in clk_summary_show_one()
3209 else if (!c->ops->enable) in clk_summary_show_one()
3224 hlist_for_each_entry(child, &c->children, child_node) in clk_summary_show_subtree()
3231 struct hlist_head **lists = s->private; in clk_summary_show()
3234 …seq_puts(s, " clock count count count rate accuracy phas… in clk_summary_show()
3235 …seq_puts(s, "-------------------------------------------------------------------------------------… in clk_summary_show()
3257 seq_printf(s, "\"%s\": { ", c->name); in clk_dump_one()
3258 seq_printf(s, "\"enable_count\": %d,", c->enable_count); in clk_dump_one()
3259 seq_printf(s, "\"prepare_count\": %d,", c->prepare_count); in clk_dump_one()
3260 seq_printf(s, "\"protect_count\": %d,", c->protect_count); in clk_dump_one()
3264 seq_printf(s, "\"accuracy\": %lu,", clk_core_get_accuracy_recalc(c)); in clk_dump_one()
3278 hlist_for_each_entry(child, &c->children, child_node) { in clk_dump_subtree()
3290 struct hlist_head **lists = s->private; in clk_dump_show()
3338 ret = clk_prepare_enable(core->hw->clk); in clk_prepare_enable_set()
3340 clk_disable_unprepare(core->hw->clk); in clk_prepare_enable_set()
3349 *val = core->enable_count && core->prepare_count; in clk_prepare_enable_get()
3396 struct clk_core *core = s->private; in clk_flags_show()
3397 unsigned long flags = core->flags; in clk_flags_show()
3424 * 1. Fetch the registered parent clock and use its name in possible_parent_show()
3427 * 4. Fetch parent clock's clock-output-name if DT index was set in possible_parent_show()
3435 seq_puts(s, parent->name); in possible_parent_show()
3436 } else if (core->parents[i].name) { in possible_parent_show()
3437 seq_puts(s, core->parents[i].name); in possible_parent_show()
3438 } else if (core->parents[i].fw_name) { in possible_parent_show()
3439 seq_printf(s, "<%s>(fw)", core->parents[i].fw_name); in possible_parent_show()
3441 if (core->parents[i].index >= 0) in possible_parent_show()
3442 name = of_clk_get_parent_name(core->of_node, core->parents[i].index); in possible_parent_show()
3454 struct clk_core *core = s->private; in possible_parents_show()
3457 for (i = 0; i < core->num_parents - 1; i++) in possible_parents_show()
3468 struct clk_core *core = s->private; in current_parent_show()
3470 if (core->parent) in current_parent_show()
3471 seq_printf(s, "%s\n", core->parent->name); in current_parent_show()
3481 struct seq_file *s = file->private_data; in current_parent_write()
3482 struct clk_core *core = s->private; in current_parent_write()
3493 return -ENOENT; in current_parent_write()
3515 struct clk_core *core = s->private; in clk_duty_cycle_show()
3516 struct clk_duty *duty = &core->duty; in clk_duty_cycle_show()
3518 seq_printf(s, "%u/%u\n", duty->num, duty->den); in clk_duty_cycle_show()
3526 struct clk_core *core = s->private; in clk_min_rate_show()
3540 struct clk_core *core = s->private; in clk_max_rate_show()
3559 root = debugfs_create_dir(core->name, pdentry); in clk_debug_create_one()
3560 core->dentry = root; in clk_debug_create_one()
3566 debugfs_create_ulong("clk_accuracy", 0444, root, &core->accuracy); in clk_debug_create_one()
3567 debugfs_create_u32("clk_phase", 0444, root, &core->phase); in clk_debug_create_one()
3569 debugfs_create_u32("clk_prepare_count", 0444, root, &core->prepare_count); in clk_debug_create_one()
3570 debugfs_create_u32("clk_enable_count", 0444, root, &core->enable_count); in clk_debug_create_one()
3571 debugfs_create_u32("clk_protect_count", 0444, root, &core->protect_count); in clk_debug_create_one()
3572 debugfs_create_u32("clk_notifier_count", 0444, root, &core->notifier_count); in clk_debug_create_one()
3579 if (core->num_parents > 1) in clk_debug_create_one()
3584 if (core->num_parents > 0) in clk_debug_create_one()
3588 if (core->num_parents > 1) in clk_debug_create_one()
3592 if (core->ops->debug_init) in clk_debug_create_one()
3593 core->ops->debug_init(core->hw, core->dentry); in clk_debug_create_one()
3597 * clk_debug_register - add a clk node to the debugfs clk directory
3607 hlist_add_head(&core->debug_node, &clk_debug_list); in clk_debug_register()
3614 * clk_debug_unregister - remove a clk node from the debugfs clk directory
3618 * debugfs clk directory if clk->dentry points to debugfs created by
3624 hlist_del_init(&core->debug_node); in clk_debug_unregister()
3625 debugfs_remove_recursive(core->dentry); in clk_debug_unregister()
3626 core->dentry = NULL; in clk_debug_unregister()
3631 * clk_debug_init - lazily populate the debugfs clk directory
3635 * populates the debugfs clk directory once at boot-time when we know that
3636 * debugfs is setup. It should only be called once at boot-time, all other clks
3704 * clock. This is important for CLK_IS_CRITICAL clocks, which in clk_core_reparent_orphans_nolock()
3716 * 0 if the clock doesn't have clk_ops::recalc_rate and in clk_core_reparent_orphans_nolock()
3722 * 'req_rate' is set to something non-zero so that in clk_core_reparent_orphans_nolock()
3725 orphan->req_rate = orphan->rate; in clk_core_reparent_orphans_nolock()
3731 * __clk_core_init - initialize the data structures in a struct clk_core
3747 * Set hw->core after grabbing the prepare_lock to synchronize with in __clk_core_init()
3748 * callers of clk_core_fill_parent_index() where we treat hw->core in __clk_core_init()
3752 core->hw->core = core; in __clk_core_init()
3758 /* check to see if a clock with this name is already registered */ in __clk_core_init()
3759 if (clk_core_lookup(core->name)) { in __clk_core_init()
3761 __func__, core->name); in __clk_core_init()
3762 ret = -EEXIST; in __clk_core_init()
3766 /* check that clk_ops are sane. See Documentation/driver-api/clk.rst */ in __clk_core_init()
3767 if (core->ops->set_rate && in __clk_core_init()
3768 !((core->ops->round_rate || core->ops->determine_rate) && in __clk_core_init()
3769 core->ops->recalc_rate)) { in __clk_core_init()
3771 __func__, core->name); in __clk_core_init()
3772 ret = -EINVAL; in __clk_core_init()
3776 if (core->ops->set_parent && !core->ops->get_parent) { in __clk_core_init()
3778 __func__, core->name); in __clk_core_init()
3779 ret = -EINVAL; in __clk_core_init()
3783 if (core->ops->set_parent && !core->ops->determine_rate) { in __clk_core_init()
3785 __func__, core->name); in __clk_core_init()
3786 ret = -EINVAL; in __clk_core_init()
3790 if (core->num_parents > 1 && !core->ops->get_parent) { in __clk_core_init()
3792 __func__, core->name); in __clk_core_init()
3793 ret = -EINVAL; in __clk_core_init()
3797 if (core->ops->set_rate_and_parent && in __clk_core_init()
3798 !(core->ops->set_parent && core->ops->set_rate)) { in __clk_core_init()
3800 __func__, core->name); in __clk_core_init()
3801 ret = -EINVAL; in __clk_core_init()
3806 * optional platform-specific magic in __clk_core_init()
3808 * The .init callback is not used by any of the basic clock types, but in __clk_core_init()
3810 * CCF to get an accurate view of clock for any other callbacks. It may in __clk_core_init()
3817 * the clock in __clk_core_init()
3819 if (core->ops->init) { in __clk_core_init()
3820 ret = core->ops->init(core->hw); in __clk_core_init()
3825 parent = core->parent = __clk_init_parent(core); in __clk_core_init()
3828 * Populate core->parent if parent has already been clk_core_init'd. If in __clk_core_init()
3834 * clocks and re-parent any that are children of the clock currently in __clk_core_init()
3838 hlist_add_head(&core->child_node, &parent->children); in __clk_core_init()
3839 core->orphan = parent->orphan; in __clk_core_init()
3840 } else if (!core->num_parents) { in __clk_core_init()
3841 hlist_add_head(&core->child_node, &clk_root_list); in __clk_core_init()
3842 core->orphan = false; in __clk_core_init()
3844 hlist_add_head(&core->child_node, &clk_orphan_list); in __clk_core_init()
3845 core->orphan = true; in __clk_core_init()
3849 * Set clk's accuracy. The preferred method is to use in __clk_core_init()
3851 * fallback is to use the parent's accuracy. If a clock doesn't have a in __clk_core_init()
3852 * parent (or is orphaned) then accuracy is set to zero (perfect in __clk_core_init()
3853 * clock). in __clk_core_init()
3855 if (core->ops->recalc_accuracy) in __clk_core_init()
3856 core->accuracy = core->ops->recalc_accuracy(core->hw, in __clk_core_init()
3859 core->accuracy = parent->accuracy; in __clk_core_init()
3861 core->accuracy = 0; in __clk_core_init()
3866 * query the current clock phase, or just assume it's in phase. in __clk_core_init()
3872 core->name); in __clk_core_init()
3884 * parent's rate. If a clock doesn't have a parent (or is orphaned) in __clk_core_init()
3887 if (core->ops->recalc_rate) in __clk_core_init()
3888 rate = core->ops->recalc_rate(core->hw, in __clk_core_init()
3891 rate = parent->rate; in __clk_core_init()
3894 core->rate = core->req_rate = rate; in __clk_core_init()
3901 if (core->flags & CLK_IS_CRITICAL) { in __clk_core_init()
3905 __func__, core->name); in __clk_core_init()
3912 __func__, core->name); in __clk_core_init()
3920 kref_init(&core->ref); in __clk_core_init()
3925 hlist_del_init(&core->child_node); in __clk_core_init()
3926 core->hw->core = NULL; in __clk_core_init()
3938 * clk_core_link_consumer - Add a clk consumer to the list of consumers in a clk_core
3945 hlist_add_head(&clk->clks_node, &core->clks); in clk_core_link_consumer()
3950 * clk_core_unlink_consumer - Remove a clk consumer from the list of consumers in a clk_core
3956 hlist_del(&clk->clks_node); in clk_core_unlink_consumer()
3960 * alloc_clk - Allocate a clk consumer, but leave it unlinked to the clk_core
3974 return ERR_PTR(-ENOMEM); in alloc_clk()
3976 clk->core = core; in alloc_clk()
3977 clk->dev_id = dev_id; in alloc_clk()
3978 clk->con_id = kstrdup_const(con_id, GFP_KERNEL); in alloc_clk()
3979 clk->max_rate = ULONG_MAX; in alloc_clk()
3985 * free_clk - Free a clk consumer
3993 kfree_const(clk->con_id); in free_clk()
4019 core = hw->core; in clk_hw_create_clk()
4023 clk->dev = dev; in clk_hw_create_clk()
4025 if (!try_module_get(core->owner)) { in clk_hw_create_clk()
4027 return ERR_PTR(-ENOENT); in clk_hw_create_clk()
4030 kref_get(&core->ref); in clk_hw_create_clk()
4037 * clk_hw_get_clk - get clk consumer given an clk_hw
4043 * to get a consumer clk and act on the clock element
4048 struct device *dev = hw->core->dev; in clk_hw_get_clk()
4061 return -EINVAL; in clk_cpy_name()
4067 return -ENOMEM; in clk_cpy_name()
4075 u8 num_parents = init->num_parents; in clk_core_populate_parent_map()
4076 const char * const *parent_names = init->parent_names; in clk_core_populate_parent_map()
4077 const struct clk_hw **parent_hws = init->parent_hws; in clk_core_populate_parent_map()
4078 const struct clk_parent_data *parent_data = init->parent_data; in clk_core_populate_parent_map()
4086 * Avoid unnecessary string look-ups of clk_core's possible parents by in clk_core_populate_parent_map()
4090 core->parents = parents; in clk_core_populate_parent_map()
4092 return -ENOMEM; in clk_core_populate_parent_map()
4096 parent->index = -1; in clk_core_populate_parent_map()
4101 __func__, core->name); in clk_core_populate_parent_map()
4102 ret = clk_cpy_name(&parent->name, parent_names[i], in clk_core_populate_parent_map()
4105 parent->hw = parent_data[i].hw; in clk_core_populate_parent_map()
4106 parent->index = parent_data[i].index; in clk_core_populate_parent_map()
4107 ret = clk_cpy_name(&parent->fw_name, in clk_core_populate_parent_map()
4110 ret = clk_cpy_name(&parent->name, in clk_core_populate_parent_map()
4114 parent->hw = parent_hws[i]; in clk_core_populate_parent_map()
4116 ret = -EINVAL; in clk_core_populate_parent_map()
4124 } while (--i >= 0); in clk_core_populate_parent_map()
4136 int i = core->num_parents; in clk_core_free_parent_map()
4138 if (!core->num_parents) in clk_core_free_parent_map()
4141 while (--i >= 0) { in clk_core_free_parent_map()
4142 kfree_const(core->parents[i].name); in clk_core_free_parent_map()
4143 kfree_const(core->parents[i].fw_name); in clk_core_free_parent_map()
4146 kfree(core->parents); in clk_core_free_parent_map()
4154 const struct clk_init_data *init = hw->init; in __clk_register()
4159 * we catch use of hw->init early on in the core. in __clk_register()
4161 hw->init = NULL; in __clk_register()
4165 ret = -ENOMEM; in __clk_register()
4169 core->name = kstrdup_const(init->name, GFP_KERNEL); in __clk_register()
4170 if (!core->name) { in __clk_register()
4171 ret = -ENOMEM; in __clk_register()
4175 if (WARN_ON(!init->ops)) { in __clk_register()
4176 ret = -EINVAL; in __clk_register()
4179 core->ops = init->ops; in __clk_register()
4182 core->rpm_enabled = true; in __clk_register()
4183 core->dev = dev; in __clk_register()
4184 core->of_node = np; in __clk_register()
4185 if (dev && dev->driver) in __clk_register()
4186 core->owner = dev->driver->owner; in __clk_register()
4187 core->hw = hw; in __clk_register()
4188 core->flags = init->flags; in __clk_register()
4189 core->num_parents = init->num_parents; in __clk_register()
4190 core->min_rate = 0; in __clk_register()
4191 core->max_rate = ULONG_MAX; in __clk_register()
4197 INIT_HLIST_HEAD(&core->clks); in __clk_register()
4203 hw->clk = alloc_clk(core, NULL, NULL); in __clk_register()
4204 if (IS_ERR(hw->clk)) { in __clk_register()
4205 ret = PTR_ERR(hw->clk); in __clk_register()
4209 clk_core_link_consumer(core, hw->clk); in __clk_register()
4213 return hw->clk; in __clk_register()
4216 clk_core_unlink_consumer(hw->clk); in __clk_register()
4219 free_clk(hw->clk); in __clk_register()
4220 hw->clk = NULL; in __clk_register()
4226 kfree_const(core->name); in __clk_register()
4234 * dev_or_parent_of_node() - Get device node of @dev or @dev's parent
4238 * @dev->parent if dev doesn't have a device node, or NULL if neither
4239 * @dev or @dev->parent have a device node.
4250 np = dev_of_node(dev->parent); in dev_or_parent_of_node()
4256 * clk_register - allocate a new clock, register it and return an opaque cookie
4257 * @dev: device that is registering this clock
4258 * @hw: link to hardware-specific clock data
4260 * clk_register is the *deprecated* interface for populating the clock tree with
4261 * new clock nodes. Use clk_hw_register() instead.
4265 * rest of the clock API. In the event of an error clk_register will return an
4275 * clk_hw_register - register a clk_hw and return an error code
4276 * @dev: device that is registering this clock
4277 * @hw: link to hardware-specific clock data
4279 * clk_hw_register is the primary interface for populating the clock tree with
4280 * new clock nodes. It returns an integer equal to zero indicating success or
4292 * of_clk_hw_register - register a clk_hw and return an error code
4293 * @node: device_node of device that is registering this clock
4294 * @hw: link to hardware-specific clock data
4296 * of_clk_hw_register() is the primary interface for populating the clock tree
4297 * with new clock nodes when a struct device is not available, but a struct
4308 /* Free memory allocated for a clock. */
4316 kfree_const(core->name); in __clk_release()
4322 * after clk_unregister() was called on a clock and until last clock
4327 return -ENXIO; in clk_nodrv_prepare_enable()
4338 return -ENXIO; in clk_nodrv_set_rate()
4343 return -ENXIO; in clk_nodrv_set_parent()
4349 return -ENXIO; in clk_nodrv_determine_rate()
4368 for (i = 0; i < root->num_parents; i++) in clk_core_evict_parent_cache_subtree()
4369 if (root->parents[i].core == target) in clk_core_evict_parent_cache_subtree()
4370 root->parents[i].core = NULL; in clk_core_evict_parent_cache_subtree()
4372 hlist_for_each_entry(child, &root->children, child_node) in clk_core_evict_parent_cache_subtree()
4391 * clk_unregister - unregister a currently registered clock
4392 * @clk: clock to unregister
4402 clk_debug_unregister(clk->core); in clk_unregister()
4406 ops = clk->core->ops; in clk_unregister()
4408 pr_err("%s: unregistered clock: %s\n", __func__, in clk_unregister()
4409 clk->core->name); in clk_unregister()
4413 * Assign empty clock ops for consumers that might still hold in clk_unregister()
4414 * a reference to this clock. in clk_unregister()
4417 clk->core->ops = &clk_nodrv_ops; in clk_unregister()
4420 if (ops->terminate) in clk_unregister()
4421 ops->terminate(clk->core->hw); in clk_unregister()
4423 if (!hlist_empty(&clk->core->children)) { in clk_unregister()
4428 hlist_for_each_entry_safe(child, t, &clk->core->children, in clk_unregister()
4433 clk_core_evict_parent_cache(clk->core); in clk_unregister()
4435 hlist_del_init(&clk->core->child_node); in clk_unregister()
4437 if (clk->core->prepare_count) in clk_unregister()
4438 pr_warn("%s: unregistering prepared clock: %s\n", in clk_unregister()
4439 __func__, clk->core->name); in clk_unregister()
4441 if (clk->core->protect_count) in clk_unregister()
4442 pr_warn("%s: unregistering protected clock: %s\n", in clk_unregister()
4443 __func__, clk->core->name); in clk_unregister()
4445 kref_put(&clk->core->ref, __clk_release); in clk_unregister()
4453 * clk_hw_unregister - unregister a currently registered clk_hw
4454 * @hw: hardware-specific clock data to unregister
4458 clk_unregister(hw->clk); in clk_hw_unregister()
4473 * devm_clk_register - resource managed clk_register()
4474 * @dev: device that is registering this clock
4475 * @hw: link to hardware-specific clock data
4489 return ERR_PTR(-ENOMEM); in devm_clk_register()
4504 * devm_clk_hw_register - resource managed clk_hw_register()
4505 * @dev: device that is registering this clock
4506 * @hw: link to hardware-specific clock data
4519 return -ENOMEM; in devm_clk_hw_register()
4539 * devm_clk_hw_get_clk - resource managed clk_hw_get_clk()
4540 * @dev: device that is registering this clock
4558 WARN_ON_ONCE(dev != hw->core->dev); in devm_clk_hw_get_clk()
4562 return ERR_PTR(-ENOMEM); in devm_clk_hw_get_clk()
4594 if (WARN_ON(clk->exclusive_count)) { in __clk_put()
4596 clk->core->protect_count -= (clk->exclusive_count - 1); in __clk_put()
4597 clk_core_rate_unprotect(clk->core); in __clk_put()
4598 clk->exclusive_count = 0; in __clk_put()
4601 hlist_del(&clk->clks_node); in __clk_put()
4603 /* If we had any boundaries on that clock, let's drop them. */ in __clk_put()
4604 if (clk->min_rate > 0 || clk->max_rate < ULONG_MAX) in __clk_put()
4607 owner = clk->core->owner; in __clk_put()
4608 kref_put(&clk->core->ref, __clk_release); in __clk_put()
4620 * clk_notifier_register - add a clk rate change notifier
4627 * re-enter into the clk framework by calling any top-level clk APIs;
4631 * clock rate is passed to the callback via struct clk_notifier_data.old_rate
4634 * clk_notifier_register() must be called from non-atomic context.
4635 * Returns -EINVAL if called with null arguments, -ENOMEM upon
4642 int ret = -ENOMEM; in clk_notifier_register()
4645 return -EINVAL; in clk_notifier_register()
4651 if (cn->clk == clk) in clk_notifier_register()
4659 cn->clk = clk; in clk_notifier_register()
4660 srcu_init_notifier_head(&cn->notifier_head); in clk_notifier_register()
4662 list_add(&cn->node, &clk_notifier_list); in clk_notifier_register()
4665 ret = srcu_notifier_chain_register(&cn->notifier_head, nb); in clk_notifier_register()
4667 clk->core->notifier_count++; in clk_notifier_register()
4677 * clk_notifier_unregister - remove a clk rate change notifier
4684 * Returns -EINVAL if called with null arguments; otherwise, passes
4690 int ret = -ENOENT; in clk_notifier_unregister()
4693 return -EINVAL; in clk_notifier_unregister()
4698 if (cn->clk == clk) { in clk_notifier_unregister()
4699 ret = srcu_notifier_chain_unregister(&cn->notifier_head, nb); in clk_notifier_unregister()
4701 clk->core->notifier_count--; in clk_notifier_unregister()
4704 if (!cn->notifier_head.head) { in clk_notifier_unregister()
4705 srcu_cleanup_notifier_head(&cn->notifier_head); in clk_notifier_unregister()
4706 list_del(&cn->node); in clk_notifier_unregister()
4728 clk_notifier_unregister(devres->clk, devres->nb); in devm_clk_notifier_release()
4741 return -ENOMEM; in devm_clk_notifier_register()
4745 devres->clk = clk; in devm_clk_notifier_register()
4746 devres->nb = nb; in devm_clk_notifier_register()
4765 * struct of_clk_provider - Clock provider registration structure
4766 * @link: Entry in global list of clock providers
4767 * @node: Pointer to device tree node of clock provider
4768 * @get: Get clock callback. Returns NULL or a struct clk for the
4769 * given clock specifier
4771 * struct clk_hw for the given clock specifier
4806 unsigned int idx = clkspec->args[0]; in of_clk_src_onecell_get()
4808 if (idx >= clk_data->clk_num) { in of_clk_src_onecell_get()
4809 pr_err("%s: invalid clock index %u\n", __func__, idx); in of_clk_src_onecell_get()
4810 return ERR_PTR(-EINVAL); in of_clk_src_onecell_get()
4813 return clk_data->clks[idx]; in of_clk_src_onecell_get()
4821 unsigned int idx = clkspec->args[0]; in of_clk_hw_onecell_get()
4823 if (idx >= hw_data->num) { in of_clk_hw_onecell_get()
4825 return ERR_PTR(-EINVAL); in of_clk_hw_onecell_get()
4828 return hw_data->hws[idx]; in of_clk_hw_onecell_get()
4833 * of_clk_add_provider() - Register a clock provider for a node
4834 * @np: Device node pointer associated with clock provider
4835 * @clk_src_get: callback for decoding clock
4853 return -ENOMEM; in of_clk_add_provider()
4855 cp->node = of_node_get(np); in of_clk_add_provider()
4856 cp->data = data; in of_clk_add_provider()
4857 cp->get = clk_src_get; in of_clk_add_provider()
4860 list_add(&cp->link, &of_clk_providers); in of_clk_add_provider()
4862 pr_debug("Added clock from %pOF\n", np); in of_clk_add_provider()
4870 fwnode_dev_initialized(&np->fwnode, true); in of_clk_add_provider()
4877 * of_clk_add_hw_provider() - Register a clock provider for a node
4878 * @np: Device node pointer associated with clock provider
4895 return -ENOMEM; in of_clk_add_hw_provider()
4897 cp->node = of_node_get(np); in of_clk_add_hw_provider()
4898 cp->data = data; in of_clk_add_hw_provider()
4899 cp->get_hw = get; in of_clk_add_hw_provider()
4902 list_add(&cp->link, &of_clk_providers); in of_clk_add_hw_provider()
4912 fwnode_dev_initialized(&np->fwnode, true); in of_clk_add_hw_provider()
4924 * We allow a child device to use its parent device as the clock provider node
4925 * for cases like MFD sub-devices where the child device driver wants to use
4926 * devm_*() APIs but not list the device in DT as a sub-node.
4932 np = dev->of_node; in get_clk_provider_node()
4933 parent_np = dev->parent ? dev->parent->of_node : NULL; in get_clk_provider_node()
4935 if (!of_property_present(np, "#clock-cells")) in get_clk_provider_node()
4936 if (of_property_present(parent_np, "#clock-cells")) in get_clk_provider_node()
4943 * devm_of_clk_add_hw_provider() - Managed clk provider node registration
4944 * @dev: Device acting as the clock provider (used for DT node and lifetime)
4948 * Registers clock provider for given device's node. If the device has no DT
4949 * node or if the device node lacks of clock provider information (#clock-cells)
4951 * has the #clock-cells then it is used in registration. Provider is
4967 return -ENOMEM; in devm_of_clk_add_hw_provider()
4983 * of_clk_del_provider() - Remove a previously registered clock provider
4984 * @np: Device node pointer associated with clock provider
4995 if (cp->node == np) { in of_clk_del_provider()
4996 list_del(&cp->link); in of_clk_del_provider()
4997 fwnode_dev_initialized(&np->fwnode, false); in of_clk_del_provider()
4998 of_node_put(cp->node); in of_clk_del_provider()
5008 * of_parse_clkspec() - Parse a DT clock specifier for a given device node
5009 * @np: device node to parse clock specifier from
5010 * @index: index of phandle to parse clock out of. If index < 0, @name is used
5011 * @name: clock name to find and parse. If name is NULL, the index is used
5012 * @out_args: Result of parsing the clock specifier
5014 * Parses a device node's "clocks" and "clock-names" properties to find the
5015 * phandle and cells for the index or name that is desired. The resulting clock
5017 * parsing error. The @index argument is ignored if @name is non-NULL.
5021 * phandle1: clock-controller@1 {
5022 * #clock-cells = <2>;
5025 * phandle2: clock-controller@2 {
5026 * #clock-cells = <1>;
5029 * clock-consumer@3 {
5031 * clock-names = "name1", "name2";
5034 * To get a device_node for `clock-controller@2' node you may call this
5037 * of_parse_clkspec(clock-consumer@3, -1, "name2", &args);
5038 * of_parse_clkspec(clock-consumer@3, 1, NULL, &args);
5039 * of_parse_clkspec(clock-consumer@3, 1, "name2", &args);
5041 * Return: 0 upon successfully parsing the clock specifier. Otherwise, -ENOENT
5042 * if @name is NULL or -EINVAL if @name is non-NULL and it can't be found in
5043 * the "clock-names" property of @np.
5048 int ret = -ENOENT; in of_parse_clkspec()
5050 /* Walk up the tree of devices looking for a clock property that matches */ in of_parse_clkspec()
5054 * "clock-names" property. If it cannot be found, then index in of_parse_clkspec()
5056 * return -EINVAL. in of_parse_clkspec()
5059 index = of_property_match_string(np, "clock-names", name); in of_parse_clkspec()
5060 ret = of_parse_phandle_with_args(np, "clocks", "#clock-cells", in of_parse_clkspec()
5068 * No matching clock found on this node. If the parent node in of_parse_clkspec()
5069 * has a "clock-ranges" property, then we can try one of its in of_parse_clkspec()
5072 np = np->parent; in of_parse_clkspec()
5073 if (np && !of_get_property(np, "clock-ranges", NULL)) in of_parse_clkspec()
5087 if (provider->get_hw) in __of_clk_get_hw_from_provider()
5088 return provider->get_hw(clkspec, provider->data); in __of_clk_get_hw_from_provider()
5090 clk = provider->get(clkspec, provider->data); in __of_clk_get_hw_from_provider()
5100 struct clk_hw *hw = ERR_PTR(-EPROBE_DEFER); in of_clk_get_hw_from_clkspec()
5103 return ERR_PTR(-EINVAL); in of_clk_get_hw_from_clkspec()
5107 if (provider->node == clkspec->np) { in of_clk_get_hw_from_clkspec()
5119 * of_clk_get_from_provider() - Lookup a clock from a clock provider
5120 * @clkspec: pointer to a clock specifier data structure
5122 * This function looks up a struct clk from the registered list of clock
5123 * providers, an input is a clock specifier data structure as returned
5162 return __of_clk_get(np, index, np->full_name, NULL); in of_clk_get()
5167 * of_clk_get_by_name() - Parse and lookup a clock referenced by a device node
5168 * @np: pointer to clock consumer node
5169 * @name: name of consumer's clock input, or NULL for the first clock reference
5171 * This function parses the clocks and clock-names properties,
5172 * and uses them to look up the struct clk from the registered list of clock
5178 return ERR_PTR(-ENOENT); in of_clk_get_by_name()
5180 return __of_clk_get(np, 0, np->full_name, name); in of_clk_get_by_name()
5185 * of_clk_get_parent_count() - Count the number of clocks a device node has
5194 count = of_count_phandle_with_args(np, "clocks", "#clock-cells"); in of_clk_get_parent_count()
5213 rc = of_parse_phandle_with_args(np, "clocks", "#clock-cells", index, in of_clk_get_parent_name()
5222 * specified into an array offset for the clock-output-names property. in of_clk_get_parent_name()
5224 of_property_for_each_u32(clkspec.np, "clock-indices", prop, vp, pv) { in of_clk_get_parent_name()
5231 /* We went off the end of 'clock-indices' without finding it */ in of_clk_get_parent_name()
5235 if (of_property_read_string_index(clkspec.np, "clock-output-names", in of_clk_get_parent_name()
5239 * Best effort to get the name if the clock has been in of_clk_get_parent_name()
5240 * registered with the framework. If the clock isn't in of_clk_get_parent_name()
5242 * the clock as long as #clock-cells = 0. in of_clk_get_parent_name()
5247 clk_name = clkspec.np->name; in of_clk_get_parent_name()
5263 * of_clk_parent_fill() - Fill @parents with names of @np's parents and return
5265 * @np: Device node pointer associated with clock provider
5269 * Return: number of parents for the clock node.
5290 * This function looks for a parent clock. If there is one, then it
5291 * checks that the provider for this parent clock was initialized, in
5292 * this case the parent clock will be ready.
5309 if (PTR_ERR(clk) == -EPROBE_DEFER) in parent_ready()
5316 * previous parent are ready. If there is no clock in parent_ready()
5325 * of_clk_detect_critical() - set CLK_IS_CRITICAL flag from Device Tree
5326 * @np: Device node pointer associated with clock provider
5327 * @index: clock index
5328 * @flags: pointer to top-level framework flags
5330 * Detects if the clock-critical property exists and, if so, sets the
5334 * bindings, such as the one-clock-per-node style that are outdated.
5335 * Those bindings typically put all clock data into .dts and the Linux
5336 * driver has no clock data, thus making it impossible to set this flag
5350 return -EINVAL; in of_clk_detect_critical()
5352 of_property_for_each_u32(np, "clock-critical", prop, cur, idx) in of_clk_detect_critical()
5360 * of_clk_init() - Scan and init clock providers from the DT
5363 * This function scans the device tree for matching clock providers
5390 list_del(&clk_provider->node); in of_clk_init()
5391 of_node_put(clk_provider->np); in of_clk_init()
5398 parent->clk_init_cb = match->data; in of_clk_init()
5399 parent->np = of_node_get(np); in of_clk_init()
5400 list_add_tail(&parent->node, &clk_provider_list); in of_clk_init()
5407 if (force || parent_ready(clk_provider->np)) { in of_clk_init()
5410 of_node_set_flag(clk_provider->np, in of_clk_init()
5413 clk_provider->clk_init_cb(clk_provider->np); in of_clk_init()
5414 of_clk_set_defaults(clk_provider->np, true); in of_clk_init()
5416 list_del(&clk_provider->node); in of_clk_init()
5417 of_node_put(clk_provider->np); in of_clk_init()
5427 * in case the clock parent was not mandatory in of_clk_init()