10 #include <linux/regmap.h>
300 	ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in wait_for_pll()
305 		ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in wait_for_pll()
344 static void clk_alpha_pll_write_config(struct regmap *regmap, unsigned int reg,  in clk_alpha_pll_write_config()  argument
348 		regmap_write(regmap, reg, val);  in clk_alpha_pll_write_config()
351 void clk_alpha_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,  in clk_alpha_pll_configure()  argument
356 	regmap_write(regmap, PLL_L_VAL(pll), config->l);  in clk_alpha_pll_configure()
357 	regmap_write(regmap, PLL_ALPHA_VAL(pll), config->alpha);  in clk_alpha_pll_configure()
358 	regmap_write(regmap, PLL_CONFIG_CTL(pll), config->config_ctl_val);  in clk_alpha_pll_configure()
361 		regmap_write(regmap, PLL_CONFIG_CTL_U(pll),  in clk_alpha_pll_configure()
365 		regmap_write(regmap, PLL_ALPHA_VAL_U(pll), config->alpha_hi);  in clk_alpha_pll_configure()
385 	regmap_update_bits(regmap, PLL_USER_CTL(pll), mask, val);  in clk_alpha_pll_configure()
388 		regmap_update_bits(regmap, PLL_TEST_CTL(pll),  in clk_alpha_pll_configure()
392 		clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll),  in clk_alpha_pll_configure()
396 		regmap_update_bits(regmap, PLL_TEST_CTL_U(pll),  in clk_alpha_pll_configure()
400 		clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll),  in clk_alpha_pll_configure()
404 		qcom_pll_set_fsm_mode(regmap, PLL_MODE(pll), 6, 0);  in clk_alpha_pll_configure()
414 	ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in clk_alpha_pll_hwfsm_enable()
423 	ret = regmap_write(pll->clkr.regmap, PLL_MODE(pll), val);  in clk_alpha_pll_hwfsm_enable()
439 	ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in clk_alpha_pll_hwfsm_disable()
444 		ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll),  in clk_alpha_pll_hwfsm_disable()
455 	ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll),  in clk_alpha_pll_hwfsm_disable()
469 	ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in pll_is_enabled()
493 	ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in clk_alpha_pll_enable()
509 	ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll),  in clk_alpha_pll_enable()
521 	ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll),  in clk_alpha_pll_enable()
530 	ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll),  in clk_alpha_pll_enable()
544 	ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in clk_alpha_pll_disable()
555 	regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), mask, 0);  in clk_alpha_pll_disable()
562 	regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), mask, 0);  in clk_alpha_pll_disable()
620 	regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l);  in clk_alpha_pll_recalc_rate()
622 	regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl);  in clk_alpha_pll_recalc_rate()
624 		regmap_read(pll->clkr.regmap, PLL_ALPHA_VAL(pll), &low);  in clk_alpha_pll_recalc_rate()
626 			regmap_read(pll->clkr.regmap, PLL_ALPHA_VAL_U(pll),  in clk_alpha_pll_recalc_rate()
646 	regmap_read(pll->clkr.regmap, PLL_MODE(pll), &mode);  in __clk_alpha_pll_update_latch()
649 	regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_UPDATE,  in __clk_alpha_pll_update_latch()
667 		regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_UPDATE, 0);  in __clk_alpha_pll_update_latch()
711 	regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);  in __clk_alpha_pll_set_rate()
717 		regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL_U(pll), a >> 32);  in __clk_alpha_pll_set_rate()
719 	regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);  in __clk_alpha_pll_set_rate()
722 		regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in __clk_alpha_pll_set_rate()
727 	regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in __clk_alpha_pll_set_rate()
819 	regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l);  in alpha_pll_huayra_recalc_rate()
820 	regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl);  in alpha_pll_huayra_recalc_rate()
823 		regmap_read(pll->clkr.regmap, PLL_ALPHA_VAL(pll), &alpha);  in alpha_pll_huayra_recalc_rate()
874 	regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl);  in alpha_pll_huayra_set_rate()
877 		regmap_read(pll->clkr.regmap, PLL_ALPHA_VAL(pll), &cur_alpha);  in alpha_pll_huayra_set_rate()
890 		regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);  in alpha_pll_huayra_set_rate()
896 	regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);  in alpha_pll_huayra_set_rate()
897 	regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);  in alpha_pll_huayra_set_rate()
900 		regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in alpha_pll_huayra_set_rate()
903 		regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in alpha_pll_huayra_set_rate()
918 				struct regmap *regmap)  in trion_pll_is_enabled()  argument
923 	ret = regmap_read(regmap, PLL_MODE(pll), &mode_val);  in trion_pll_is_enabled()
924 	ret |= regmap_read(regmap, PLL_OPMODE(pll), &opmode_val);  in trion_pll_is_enabled()
935 	return trion_pll_is_enabled(pll, pll->clkr.regmap);  in clk_trion_pll_is_enabled()
941 	struct regmap *regmap = pll->clkr.regmap;  in clk_trion_pll_enable()  local
945 	ret = regmap_read(regmap, PLL_MODE(pll), &val);  in clk_trion_pll_enable()
958 	regmap_write(regmap, PLL_OPMODE(pll), PLL_RUN);  in clk_trion_pll_enable()
965 	ret = regmap_update_bits(regmap, PLL_USER_CTL(pll),  in clk_trion_pll_enable()
971 	return regmap_update_bits(regmap, PLL_MODE(pll),  in clk_trion_pll_enable()
978 	struct regmap *regmap = pll->clkr.regmap;  in clk_trion_pll_disable()  local
982 	ret = regmap_read(regmap, PLL_MODE(pll), &val);  in clk_trion_pll_disable()
993 	ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);  in clk_trion_pll_disable()
998 	ret = regmap_update_bits(regmap, PLL_USER_CTL(pll),  in clk_trion_pll_disable()
1004 	regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);  in clk_trion_pll_disable()
1005 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);  in clk_trion_pll_disable()
1014 	regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l);  in clk_trion_pll_recalc_rate()
1015 	regmap_read(pll->clkr.regmap, PLL_ALPHA_VAL(pll), &frac);  in clk_trion_pll_recalc_rate()
1073 	regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl);  in clk_alpha_pll_postdiv_recalc_rate()
1120 	regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl);  in clk_alpha_pll_postdiv_round_ro_rate()
1141 	return regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in clk_alpha_pll_postdiv_set_rate()
1159 void clk_fabia_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,  in clk_fabia_pll_configure()  argument
1164 	clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), config->l);  in clk_fabia_pll_configure()
1165 	clk_alpha_pll_write_config(regmap, PLL_FRAC(pll), config->alpha);  in clk_fabia_pll_configure()
1166 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll),  in clk_fabia_pll_configure()
1168 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll),  in clk_fabia_pll_configure()
1170 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll),  in clk_fabia_pll_configure()
1172 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U(pll),  in clk_fabia_pll_configure()
1174 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll),  in clk_fabia_pll_configure()
1176 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll),  in clk_fabia_pll_configure()
1182 		regmap_update_bits(regmap, PLL_USER_CTL(pll), mask, val);  in clk_fabia_pll_configure()
1186 		regmap_update_bits(regmap, PLL_MODE(pll), PLL_FSM_LEGACY_MODE,  in clk_fabia_pll_configure()
1189 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_UPDATE_BYPASS,  in clk_fabia_pll_configure()
1192 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);  in clk_fabia_pll_configure()
1201 	struct regmap *regmap = pll->clkr.regmap;  in alpha_pll_fabia_enable()  local
1203 	ret = regmap_read(regmap, PLL_MODE(pll), &val);  in alpha_pll_fabia_enable()
1215 	ret = regmap_read(regmap, PLL_OPMODE(pll), &opmode_val);  in alpha_pll_fabia_enable()
1223 	ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);  in alpha_pll_fabia_enable()
1227 	ret = regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);  in alpha_pll_fabia_enable()
1231 	ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N,  in alpha_pll_fabia_enable()
1236 	ret = regmap_write(regmap, PLL_OPMODE(pll), PLL_RUN);  in alpha_pll_fabia_enable()
1244 	ret = regmap_update_bits(regmap, PLL_USER_CTL(pll),  in alpha_pll_fabia_enable()
1249 	return regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL,  in alpha_pll_fabia_enable()
1258 	struct regmap *regmap = pll->clkr.regmap;  in alpha_pll_fabia_disable()  local
1260 	ret = regmap_read(regmap, PLL_MODE(pll), &val);  in alpha_pll_fabia_disable()
1270 	ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);  in alpha_pll_fabia_disable()
1275 	ret = regmap_update_bits(regmap, PLL_USER_CTL(pll), PLL_OUT_MASK, 0);  in alpha_pll_fabia_disable()
1280 	regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);  in alpha_pll_fabia_disable()
1289 	regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l);  in alpha_pll_fabia_recalc_rate()
1290 	regmap_read(pll->clkr.regmap, PLL_FRAC(pll), &frac);  in alpha_pll_fabia_recalc_rate()
1328 	regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);  in alpha_pll_fabia_set_rate()
1329 	regmap_write(pll->clkr.regmap, PLL_FRAC(pll), a);  in alpha_pll_fabia_set_rate()
1346 	ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in alpha_pll_fabia_prepare()
1375 	regmap_write(pll->clkr.regmap, PLL_CAL_L_VAL(pll), cal_l);  in alpha_pll_fabia_prepare()
1416 	ret = regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &val);  in clk_alpha_pll_postdiv_fabia_recalc_rate()
1437 	struct regmap *regmap = pll->clkr.regmap;  in clk_trion_pll_postdiv_recalc_rate()  local
1440 	regmap_read(regmap, PLL_USER_CTL(pll), &val);  in clk_trion_pll_postdiv_recalc_rate()
1470 	struct regmap *regmap = pll->clkr.regmap;  in clk_trion_pll_postdiv_set_rate()  local
1481 	return regmap_update_bits(regmap, PLL_USER_CTL(pll),  in clk_trion_pll_postdiv_set_rate()
1512 	ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in clk_alpha_pll_postdiv_fabia_set_rate()
1527 	return regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in clk_alpha_pll_postdiv_fabia_set_rate()
1543  * @regmap: register map
1546 void clk_trion_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,  in clk_trion_pll_configure()  argument
1553 	if (trion_pll_is_enabled(pll, regmap)) {  in clk_trion_pll_configure()
1558 	clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), config->l);  in clk_trion_pll_configure()
1559 	regmap_write(regmap, PLL_CAL_L_VAL(pll), TRION_PLL_CAL_VAL);  in clk_trion_pll_configure()
1560 	clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);  in clk_trion_pll_configure()
1561 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll),  in clk_trion_pll_configure()
1563 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll),  in clk_trion_pll_configure()
1565 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U1(pll),  in clk_trion_pll_configure()
1567 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll),  in clk_trion_pll_configure()
1569 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U(pll),  in clk_trion_pll_configure()
1571 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U1(pll),  in clk_trion_pll_configure()
1573 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll),  in clk_trion_pll_configure()
1575 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll),  in clk_trion_pll_configure()
1577 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U1(pll),  in clk_trion_pll_configure()
1580 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_UPDATE_BYPASS,  in clk_trion_pll_configure()
1584 	regmap_update_bits(regmap, PLL_MODE(pll),  PLL_OUTCTRL, 0);  in clk_trion_pll_configure()
1587 	regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);  in clk_trion_pll_configure()
1590 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);  in clk_trion_pll_configure()
1605 	regmap_read(pll->clkr.regmap, PLL_STATUS(pll), &val);  in __alpha_pll_trion_prepare()
1642 	regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);  in __alpha_pll_trion_set_rate()
1643 	regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);  in __alpha_pll_trion_set_rate()
1646 	ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), latch_bit, latch_bit);  in __alpha_pll_trion_set_rate()
1652 	regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in __alpha_pll_trion_set_rate()
1659 	ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), latch_bit, 0);  in __alpha_pll_trion_set_rate()
1709 void clk_agera_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,  in clk_agera_pll_configure()  argument
1712 	clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), config->l);  in clk_agera_pll_configure()
1713 	clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);  in clk_agera_pll_configure()
1714 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll),  in clk_agera_pll_configure()
1716 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll),  in clk_agera_pll_configure()
1718 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll),  in clk_agera_pll_configure()
1720 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll),  in clk_agera_pll_configure()
1722 	clk_alpha_pll_write_config(regmap,  PLL_TEST_CTL_U(pll),  in clk_agera_pll_configure()
1742 	regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);  in clk_alpha_pll_agera_set_rate()
1743 	regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);  in clk_alpha_pll_agera_set_rate()
1767 	ret = regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &val);  in alpha_pll_lucid_5lpe_enable()
1780 	ret = trion_pll_is_enabled(pll, pll->clkr.regmap);  in alpha_pll_lucid_5lpe_enable()
1784 	ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);  in alpha_pll_lucid_5lpe_enable()
1788 	regmap_write(pll->clkr.regmap, PLL_OPMODE(pll), PLL_RUN);  in alpha_pll_lucid_5lpe_enable()
1795 	ret = regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll), PLL_OUT_MASK, PLL_OUT_MASK);  in alpha_pll_lucid_5lpe_enable()
1800 	return regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_OUTCTRL, PLL_OUTCTRL);  in alpha_pll_lucid_5lpe_enable()
1809 	ret = regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &val);  in alpha_pll_lucid_5lpe_disable()
1820 	ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);  in alpha_pll_lucid_5lpe_disable()
1825 	ret = regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll), PLL_OUT_MASK, 0);  in alpha_pll_lucid_5lpe_disable()
1830 	regmap_write(pll->clkr.regmap, PLL_OPMODE(pll), PLL_STANDBY);  in alpha_pll_lucid_5lpe_disable()
1845 	regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in alpha_pll_lucid_5lpe_prepare()
1875 	struct regmap *regmap = pll->clkr.regmap;  in __clk_lucid_pll_postdiv_set_rate()  local
1883 	ret = regmap_read(regmap, PLL_USER_CTL(pll), &val);  in __clk_lucid_pll_postdiv_set_rate()
1905 	return regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in __clk_lucid_pll_postdiv_set_rate()
1942 void clk_zonda_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,  in clk_zonda_pll_configure()  argument
1945 	clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), config->l);  in clk_zonda_pll_configure()
1946 	clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);  in clk_zonda_pll_configure()
1947 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll), config->config_ctl_val);  in clk_zonda_pll_configure()
1948 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll), config->config_ctl_hi_val);  in clk_zonda_pll_configure()
1949 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U1(pll), config->config_ctl_hi1_val);  in clk_zonda_pll_configure()
1950 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll), config->user_ctl_val);  in clk_zonda_pll_configure()
1951 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U(pll), config->user_ctl_hi_val);  in clk_zonda_pll_configure()
1952 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U1(pll), config->user_ctl_hi1_val);  in clk_zonda_pll_configure()
1953 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll), config->test_ctl_val);  in clk_zonda_pll_configure()
1954 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll), config->test_ctl_hi_val);  in clk_zonda_pll_configure()
1955 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U1(pll), config->test_ctl_hi1_val);  in clk_zonda_pll_configure()
1957 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_BYPASSNL, 0);  in clk_zonda_pll_configure()
1960 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);  in clk_zonda_pll_configure()
1963 	regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);  in clk_zonda_pll_configure()
1966 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);  in clk_zonda_pll_configure()
1973 	struct regmap *regmap = pll->clkr.regmap;  in clk_zonda_pll_enable()  local
1977 	regmap_read(regmap, PLL_MODE(pll), &val);  in clk_zonda_pll_enable()
1988 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_BYPASSNL, PLL_BYPASSNL);  in clk_zonda_pll_enable()
1996 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);  in clk_zonda_pll_enable()
1999 	regmap_write(regmap, PLL_OPMODE(pll), PLL_RUN);  in clk_zonda_pll_enable()
2001 	regmap_read(regmap, PLL_TEST_CTL(pll), &val);  in clk_zonda_pll_enable()
2012 	regmap_update_bits(regmap, PLL_USER_CTL(pll), ZONDA_PLL_OUT_MASK, ZONDA_PLL_OUT_MASK);  in clk_zonda_pll_enable()
2015 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, PLL_OUTCTRL);  in clk_zonda_pll_enable()
2023 	struct regmap *regmap = pll->clkr.regmap;  in clk_zonda_pll_disable()  local
2026 	regmap_read(regmap, PLL_MODE(pll), &val);  in clk_zonda_pll_disable()
2035 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);  in clk_zonda_pll_disable()
2038 	regmap_update_bits(regmap, PLL_USER_CTL(pll), ZONDA_PLL_OUT_MASK, 0);  in clk_zonda_pll_disable()
2041 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N | PLL_BYPASSNL, 0);  in clk_zonda_pll_disable()
2044 	regmap_write(regmap, PLL_OPMODE(pll), 0x0);  in clk_zonda_pll_disable()
2063 	regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);  in clk_zonda_pll_set_rate()
2064 	regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);  in clk_zonda_pll_set_rate()
2070 	regmap_read(pll->clkr.regmap, PLL_TEST_CTL(pll), &test_ctl_val);  in clk_zonda_pll_set_rate()
2095 void clk_lucid_evo_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,  in clk_lucid_evo_pll_configure()  argument
2101 	clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), lval);  in clk_lucid_evo_pll_configure()
2102 	clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);  in clk_lucid_evo_pll_configure()
2103 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll), config->config_ctl_val);  in clk_lucid_evo_pll_configure()
2104 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll), config->config_ctl_hi_val);  in clk_lucid_evo_pll_configure()
2105 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U1(pll), config->config_ctl_hi1_val);  in clk_lucid_evo_pll_configure()
2106 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll), config->user_ctl_val);  in clk_lucid_evo_pll_configure()
2107 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U(pll), config->user_ctl_hi_val);  in clk_lucid_evo_pll_configure()
2108 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll), config->test_ctl_val);  in clk_lucid_evo_pll_configure()
2109 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll), config->test_ctl_hi_val);  in clk_lucid_evo_pll_configure()
2110 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U1(pll), config->test_ctl_hi1_val);  in clk_lucid_evo_pll_configure()
2111 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U2(pll), config->test_ctl_hi2_val);  in clk_lucid_evo_pll_configure()
2114 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);  in clk_lucid_evo_pll_configure()
2117 	regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);  in clk_lucid_evo_pll_configure()
2118 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);  in clk_lucid_evo_pll_configure()
2125 	struct regmap *regmap = pll->clkr.regmap;  in alpha_pll_lucid_evo_enable()  local
2129 	ret = regmap_read(regmap, PLL_USER_CTL(pll), &val);  in alpha_pll_lucid_evo_enable()
2142 	ret = trion_pll_is_enabled(pll, regmap);  in alpha_pll_lucid_evo_enable()
2150 	ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);  in alpha_pll_lucid_evo_enable()
2155 	regmap_write(regmap, PLL_OPMODE(pll), PLL_RUN);  in alpha_pll_lucid_evo_enable()
2162 	ret = regmap_update_bits(regmap, PLL_USER_CTL(pll), PLL_OUT_MASK, PLL_OUT_MASK);  in alpha_pll_lucid_evo_enable()
2167 	ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, PLL_OUTCTRL);  in alpha_pll_lucid_evo_enable()
2179 	struct regmap *regmap = pll->clkr.regmap;  in _alpha_pll_lucid_evo_disable()  local
2183 	ret = regmap_read(regmap, PLL_USER_CTL(pll), &val);  in _alpha_pll_lucid_evo_disable()
2194 	ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);  in _alpha_pll_lucid_evo_disable()
2199 	ret = regmap_update_bits(regmap, PLL_USER_CTL(pll), PLL_OUT_MASK, 0);  in _alpha_pll_lucid_evo_disable()
2204 	regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);  in _alpha_pll_lucid_evo_disable()
2207 		regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, 0);  in _alpha_pll_lucid_evo_disable()
2218 	regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in _alpha_pll_lucid_evo_prepare()
2259 	struct regmap *regmap = pll->clkr.regmap;  in alpha_pll_lucid_evo_recalc_rate()  local
2262 	regmap_read(regmap, PLL_L_VAL(pll), &l);  in alpha_pll_lucid_evo_recalc_rate()
2264 	regmap_read(regmap, PLL_ALPHA_VAL(pll), &frac);  in alpha_pll_lucid_evo_recalc_rate()
2313 void clk_rivian_evo_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,  in clk_rivian_evo_pll_configure()  argument
2316 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll), config->config_ctl_val);  in clk_rivian_evo_pll_configure()
2317 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll), config->config_ctl_hi_val);  in clk_rivian_evo_pll_configure()
2318 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U1(pll), config->config_ctl_hi1_val);  in clk_rivian_evo_pll_configure()
2319 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll), config->test_ctl_val);  in clk_rivian_evo_pll_configure()
2320 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll), config->test_ctl_hi_val);  in clk_rivian_evo_pll_configure()
2321 	clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), config->l);  in clk_rivian_evo_pll_configure()
2322 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll), config->user_ctl_val);  in clk_rivian_evo_pll_configure()
2323 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U(pll), config->user_ctl_hi_val);  in clk_rivian_evo_pll_configure()
2325 	regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);  in clk_rivian_evo_pll_configure()
2327 	regmap_update_bits(regmap, PLL_MODE(pll),  in clk_rivian_evo_pll_configure()
2339 	regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l);  in clk_rivian_evo_pll_recalc_rate()
2371 void clk_stromer_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,  in clk_stromer_pll_configure()  argument
2376 	regmap_write(regmap, PLL_L_VAL(pll), config->l);  in clk_stromer_pll_configure()
2377 	regmap_write(regmap, PLL_ALPHA_VAL(pll), config->alpha);  in clk_stromer_pll_configure()
2378 	regmap_write(regmap, PLL_CONFIG_CTL(pll), config->config_ctl_val);  in clk_stromer_pll_configure()
2381 		regmap_write(regmap, PLL_CONFIG_CTL_U(pll),  in clk_stromer_pll_configure()
2385 		regmap_write(regmap, PLL_ALPHA_VAL_U(pll), config->alpha_hi);  in clk_stromer_pll_configure()
2407 	regmap_update_bits(regmap, PLL_USER_CTL(pll), mask, val);  in clk_stromer_pll_configure()
2416 	regmap_update_bits(regmap, PLL_USER_CTL_U(pll), mask_u, val_u);  in clk_stromer_pll_configure()
2417 	regmap_write(regmap, PLL_TEST_CTL(pll), config->test_ctl_val);  in clk_stromer_pll_configure()
2418 	regmap_write(regmap, PLL_TEST_CTL_U(pll), config->test_ctl_hi_val);  in clk_stromer_pll_configure()
2421 		qcom_pll_set_fsm_mode(regmap, PLL_MODE(pll), 6, 0);  in clk_stromer_pll_configure()
2447 	regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);  in clk_alpha_pll_stromer_set_rate()
2448 	regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);  in clk_alpha_pll_stromer_set_rate()
2449 	regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL_U(pll),  in clk_alpha_pll_stromer_set_rate()
2452 	regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in clk_alpha_pll_stromer_set_rate()
2463 	regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_UPDATE,  in clk_alpha_pll_stromer_set_rate()
2494 	ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &pll_mode);  in clk_alpha_pll_stromer_plus_set_rate()
2498 	regmap_write(pll->clkr.regmap, PLL_MODE(pll), 0);  in clk_alpha_pll_stromer_plus_set_rate()
2503 	regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);  in clk_alpha_pll_stromer_plus_set_rate()
2508 	regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);  in clk_alpha_pll_stromer_plus_set_rate()
2509 	regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL_U(pll),  in clk_alpha_pll_stromer_plus_set_rate()
2512 	regmap_write(pll->clkr.regmap, PLL_MODE(pll), PLL_BYPASSNL);  in clk_alpha_pll_stromer_plus_set_rate()
2516 	regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_RESET_N,  in clk_alpha_pll_stromer_plus_set_rate()
2530 		regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_OUTCTRL,  in clk_alpha_pll_stromer_plus_set_rate()