Lines Matching full:master
3 * Silvaco dual-role I3C master driver
14 #include <linux/i3c/master.h>
24 /* Master Mode Registers */
156 * struct svc_i3c_master - Silvaco I3C Master structure
157 * @base: I3C master controller
179 * @lock: Transfer lock, protect between IBI work thread and callbacks from master
213 * @index: Index in the master tables corresponding to this device
214 * @ibi: IBI slot index in the master structure
223 static bool svc_i3c_master_error(struct svc_i3c_master *master) in svc_i3c_master_error() argument
227 mstatus = readl(master->regs + SVC_I3C_MSTATUS); in svc_i3c_master_error()
229 merrwarn = readl(master->regs + SVC_I3C_MERRWARN); in svc_i3c_master_error()
230 writel(merrwarn, master->regs + SVC_I3C_MERRWARN); in svc_i3c_master_error()
234 dev_dbg(master->dev, "Warning condition: MSTATUS 0x%08x, MERRWARN 0x%08x\n", in svc_i3c_master_error()
239 dev_err(master->dev, in svc_i3c_master_error()
249 static void svc_i3c_master_enable_interrupts(struct svc_i3c_master *master, u32 mask) in svc_i3c_master_enable_interrupts() argument
251 writel(mask, master->regs + SVC_I3C_MINTSET); in svc_i3c_master_enable_interrupts()
254 static void svc_i3c_master_disable_interrupts(struct svc_i3c_master *master) in svc_i3c_master_disable_interrupts() argument
256 u32 mask = readl(master->regs + SVC_I3C_MINTSET); in svc_i3c_master_disable_interrupts()
258 writel(mask, master->regs + SVC_I3C_MINTCLR); in svc_i3c_master_disable_interrupts()
261 static void svc_i3c_master_clear_merrwarn(struct svc_i3c_master *master) in svc_i3c_master_clear_merrwarn() argument
264 writel(readl(master->regs + SVC_I3C_MERRWARN), in svc_i3c_master_clear_merrwarn()
265 master->regs + SVC_I3C_MERRWARN); in svc_i3c_master_clear_merrwarn()
268 static void svc_i3c_master_flush_fifo(struct svc_i3c_master *master) in svc_i3c_master_flush_fifo() argument
272 master->regs + SVC_I3C_MDATACTRL); in svc_i3c_master_flush_fifo()
275 static void svc_i3c_master_reset_fifo_trigger(struct svc_i3c_master *master) in svc_i3c_master_reset_fifo_trigger() argument
285 writel(reg, master->regs + SVC_I3C_MDATACTRL); in svc_i3c_master_reset_fifo_trigger()
288 static void svc_i3c_master_reset(struct svc_i3c_master *master) in svc_i3c_master_reset() argument
290 svc_i3c_master_clear_merrwarn(master); in svc_i3c_master_reset()
291 svc_i3c_master_reset_fifo_trigger(master); in svc_i3c_master_reset()
292 svc_i3c_master_disable_interrupts(master); in svc_i3c_master_reset()
296 to_svc_i3c_master(struct i3c_master_controller *master) in to_svc_i3c_master() argument
298 return container_of(master, struct svc_i3c_master, base); in to_svc_i3c_master()
303 struct svc_i3c_master *master; in svc_i3c_master_hj_work() local
305 master = container_of(work, struct svc_i3c_master, hj_work); in svc_i3c_master_hj_work()
306 i3c_master_do_daa(&master->base); in svc_i3c_master_hj_work()
310 svc_i3c_master_dev_from_addr(struct svc_i3c_master *master, in svc_i3c_master_dev_from_addr() argument
316 if (master->addrs[i] == ibiaddr) in svc_i3c_master_dev_from_addr()
322 return master->descs[i]; in svc_i3c_master_dev_from_addr()
325 static void svc_i3c_master_emit_stop(struct svc_i3c_master *master) in svc_i3c_master_emit_stop() argument
327 writel(SVC_I3C_MCTRL_REQUEST_STOP, master->regs + SVC_I3C_MCTRL); in svc_i3c_master_emit_stop()
338 static int svc_i3c_master_handle_ibi(struct svc_i3c_master *master, in svc_i3c_master_handle_ibi() argument
355 ret = readl_relaxed_poll_timeout(master->regs + SVC_I3C_MSTATUS, val, in svc_i3c_master_handle_ibi()
358 dev_err(master->dev, "Timeout when polling for COMPLETE\n"); in svc_i3c_master_handle_ibi()
362 while (SVC_I3C_MSTATUS_RXPEND(readl(master->regs + SVC_I3C_MSTATUS)) && in svc_i3c_master_handle_ibi()
364 mdatactrl = readl(master->regs + SVC_I3C_MDATACTRL); in svc_i3c_master_handle_ibi()
366 readsl(master->regs + SVC_I3C_MRDATAB, buf, count); in svc_i3c_master_handle_ibi()
371 master->ibi.tbq_slot = slot; in svc_i3c_master_handle_ibi()
376 static void svc_i3c_master_ack_ibi(struct svc_i3c_master *master, in svc_i3c_master_ack_ibi() argument
387 writel(ibi_ack_nack, master->regs + SVC_I3C_MCTRL); in svc_i3c_master_ack_ibi()
390 static void svc_i3c_master_nack_ibi(struct svc_i3c_master *master) in svc_i3c_master_nack_ibi() argument
394 master->regs + SVC_I3C_MCTRL); in svc_i3c_master_nack_ibi()
399 struct svc_i3c_master *master = container_of(work, struct svc_i3c_master, ibi_work); in svc_i3c_master_ibi_work() local
406 mutex_lock(&master->lock); in svc_i3c_master_ibi_work()
410 master->regs + SVC_I3C_MCTRL); in svc_i3c_master_ibi_work()
413 ret = readl_relaxed_poll_timeout(master->regs + SVC_I3C_MSTATUS, val, in svc_i3c_master_ibi_work()
416 dev_err(master->dev, "Timeout when polling for IBIWON\n"); in svc_i3c_master_ibi_work()
417 svc_i3c_master_emit_stop(master); in svc_i3c_master_ibi_work()
422 writel(SVC_I3C_MINT_IBIWON, master->regs + SVC_I3C_MSTATUS); in svc_i3c_master_ibi_work()
424 status = readl(master->regs + SVC_I3C_MSTATUS); in svc_i3c_master_ibi_work()
431 dev = svc_i3c_master_dev_from_addr(master, ibiaddr); in svc_i3c_master_ibi_work()
433 svc_i3c_master_nack_ibi(master); in svc_i3c_master_ibi_work()
435 svc_i3c_master_handle_ibi(master, dev); in svc_i3c_master_ibi_work()
438 svc_i3c_master_ack_ibi(master, false); in svc_i3c_master_ibi_work()
441 svc_i3c_master_nack_ibi(master); in svc_i3c_master_ibi_work()
452 if (svc_i3c_master_error(master)) { in svc_i3c_master_ibi_work()
453 if (master->ibi.tbq_slot) { in svc_i3c_master_ibi_work()
456 master->ibi.tbq_slot); in svc_i3c_master_ibi_work()
457 master->ibi.tbq_slot = NULL; in svc_i3c_master_ibi_work()
460 svc_i3c_master_emit_stop(master); in svc_i3c_master_ibi_work()
469 i3c_master_queue_ibi(dev, master->ibi.tbq_slot); in svc_i3c_master_ibi_work()
470 master->ibi.tbq_slot = NULL; in svc_i3c_master_ibi_work()
472 svc_i3c_master_emit_stop(master); in svc_i3c_master_ibi_work()
475 queue_work(master->base.wq, &master->hj_work); in svc_i3c_master_ibi_work()
483 svc_i3c_master_enable_interrupts(master, SVC_I3C_MINT_SLVSTART); in svc_i3c_master_ibi_work()
484 mutex_unlock(&master->lock); in svc_i3c_master_ibi_work()
489 struct svc_i3c_master *master = (struct svc_i3c_master *)dev_id; in svc_i3c_master_irq_handler() local
490 u32 active = readl(master->regs + SVC_I3C_MSTATUS); in svc_i3c_master_irq_handler()
496 writel(SVC_I3C_MINT_SLVSTART, master->regs + SVC_I3C_MSTATUS); in svc_i3c_master_irq_handler()
498 svc_i3c_master_disable_interrupts(master); in svc_i3c_master_irq_handler()
501 queue_work(master->base.wq, &master->ibi_work); in svc_i3c_master_irq_handler()
508 struct svc_i3c_master *master = to_svc_i3c_master(m); in svc_i3c_master_bus_init() local
516 ret = pm_runtime_resume_and_get(master->dev); in svc_i3c_master_bus_init()
518 dev_err(master->dev, in svc_i3c_master_bus_init()
519 "<%s> cannot resume i3c bus master, err: %d\n", in svc_i3c_master_bus_init()
525 fclk_rate = clk_get_rate(master->fclk); in svc_i3c_master_bus_init()
586 writel(reg, master->regs + SVC_I3C_MCONFIG); in svc_i3c_master_bus_init()
588 /* Master core's registration */ in svc_i3c_master_bus_init()
596 master->regs + SVC_I3C_MDYNADDR); in svc_i3c_master_bus_init()
598 ret = i3c_master_set_info(&master->base, &info); in svc_i3c_master_bus_init()
603 pm_runtime_mark_last_busy(master->dev); in svc_i3c_master_bus_init()
604 pm_runtime_put_autosuspend(master->dev); in svc_i3c_master_bus_init()
611 struct svc_i3c_master *master = to_svc_i3c_master(m); in svc_i3c_master_bus_cleanup() local
614 ret = pm_runtime_resume_and_get(master->dev); in svc_i3c_master_bus_cleanup()
616 dev_err(master->dev, "<%s> Cannot get runtime PM.\n", __func__); in svc_i3c_master_bus_cleanup()
620 svc_i3c_master_disable_interrupts(master); in svc_i3c_master_bus_cleanup()
622 /* Disable master */ in svc_i3c_master_bus_cleanup()
623 writel(0, master->regs + SVC_I3C_MCONFIG); in svc_i3c_master_bus_cleanup()
625 pm_runtime_mark_last_busy(master->dev); in svc_i3c_master_bus_cleanup()
626 pm_runtime_put_autosuspend(master->dev); in svc_i3c_master_bus_cleanup()
629 static int svc_i3c_master_reserve_slot(struct svc_i3c_master *master) in svc_i3c_master_reserve_slot() argument
633 if (!(master->free_slots & GENMASK(SVC_I3C_MAX_DEVS - 1, 0))) in svc_i3c_master_reserve_slot()
636 slot = ffs(master->free_slots) - 1; in svc_i3c_master_reserve_slot()
638 master->free_slots &= ~BIT(slot); in svc_i3c_master_reserve_slot()
643 static void svc_i3c_master_release_slot(struct svc_i3c_master *master, in svc_i3c_master_release_slot() argument
646 master->free_slots |= BIT(slot); in svc_i3c_master_release_slot()
652 struct svc_i3c_master *master = to_svc_i3c_master(m); in svc_i3c_master_attach_i3c_dev() local
656 slot = svc_i3c_master_reserve_slot(master); in svc_i3c_master_attach_i3c_dev()
662 svc_i3c_master_release_slot(master, slot); in svc_i3c_master_attach_i3c_dev()
668 master->addrs[slot] = dev->info.dyn_addr ? dev->info.dyn_addr : in svc_i3c_master_attach_i3c_dev()
670 master->descs[slot] = dev; in svc_i3c_master_attach_i3c_dev()
681 struct svc_i3c_master *master = to_svc_i3c_master(m); in svc_i3c_master_reattach_i3c_dev() local
684 master->addrs[data->index] = dev->info.dyn_addr ? dev->info.dyn_addr : in svc_i3c_master_reattach_i3c_dev()
694 struct svc_i3c_master *master = to_svc_i3c_master(m); in svc_i3c_master_detach_i3c_dev() local
696 master->addrs[data->index] = 0; in svc_i3c_master_detach_i3c_dev()
697 svc_i3c_master_release_slot(master, data->index); in svc_i3c_master_detach_i3c_dev()
705 struct svc_i3c_master *master = to_svc_i3c_master(m); in svc_i3c_master_attach_i2c_dev() local
709 slot = svc_i3c_master_reserve_slot(master); in svc_i3c_master_attach_i2c_dev()
715 svc_i3c_master_release_slot(master, slot); in svc_i3c_master_attach_i2c_dev()
720 master->addrs[slot] = dev->addr; in svc_i3c_master_attach_i2c_dev()
731 struct svc_i3c_master *master = to_svc_i3c_master(m); in svc_i3c_master_detach_i2c_dev() local
733 svc_i3c_master_release_slot(master, data->index); in svc_i3c_master_detach_i2c_dev()
738 static int svc_i3c_master_readb(struct svc_i3c_master *master, u8 *dst, in svc_i3c_master_readb() argument
745 ret = readl_poll_timeout_atomic(master->regs + SVC_I3C_MSTATUS, in svc_i3c_master_readb()
752 dst[i] = readl(master->regs + SVC_I3C_MRDATAB); in svc_i3c_master_readb()
758 static int svc_i3c_master_do_daa_locked(struct svc_i3c_master *master, in svc_i3c_master_do_daa_locked() argument
772 master->regs + SVC_I3C_MCTRL); in svc_i3c_master_do_daa_locked()
778 ret = readl_poll_timeout_atomic(master->regs + SVC_I3C_MSTATUS, in svc_i3c_master_do_daa_locked()
794 ret = svc_i3c_master_readb(master, data, 6); in svc_i3c_master_do_daa_locked()
802 ret = svc_i3c_master_readb(master, data, 2); in svc_i3c_master_do_daa_locked()
831 svc_i3c_master_emit_stop(master); in svc_i3c_master_do_daa_locked()
840 ret = readl_poll_timeout_atomic(master->regs + SVC_I3C_MSTATUS, in svc_i3c_master_do_daa_locked()
850 ret = i3c_master_get_free_addr(&master->base, last_addr + 1); in svc_i3c_master_do_daa_locked()
855 dev_dbg(master->dev, "DAA: device %d assigned to 0x%02x\n", in svc_i3c_master_do_daa_locked()
858 writel(addrs[dev_nb], master->regs + SVC_I3C_MWDATAB); in svc_i3c_master_do_daa_locked()
867 static int svc_i3c_update_ibirules(struct svc_i3c_master *master) in svc_i3c_update_ibirules() argument
876 i3c_bus_for_each_i3cdev(&master->base.bus, dev) { in svc_i3c_update_ibirules()
914 writel(reg_mbyte, master->regs + SVC_I3C_IBIRULES); in svc_i3c_update_ibirules()
916 writel(reg_nobyte, master->regs + SVC_I3C_IBIRULES); in svc_i3c_update_ibirules()
923 struct svc_i3c_master *master = to_svc_i3c_master(m); in svc_i3c_master_do_daa() local
929 ret = pm_runtime_resume_and_get(master->dev); in svc_i3c_master_do_daa()
931 dev_err(master->dev, "<%s> Cannot get runtime PM.\n", __func__); in svc_i3c_master_do_daa()
935 spin_lock_irqsave(&master->xferqueue.lock, flags); in svc_i3c_master_do_daa()
936 ret = svc_i3c_master_do_daa_locked(master, addrs, &dev_nb); in svc_i3c_master_do_daa()
937 spin_unlock_irqrestore(&master->xferqueue.lock, flags); in svc_i3c_master_do_daa()
939 svc_i3c_master_emit_stop(master); in svc_i3c_master_do_daa()
940 svc_i3c_master_clear_merrwarn(master); in svc_i3c_master_do_daa()
952 ret = svc_i3c_update_ibirules(master); in svc_i3c_master_do_daa()
954 dev_err(master->dev, "Cannot handle such a list of devices"); in svc_i3c_master_do_daa()
957 pm_runtime_mark_last_busy(master->dev); in svc_i3c_master_do_daa()
958 pm_runtime_put_autosuspend(master->dev); in svc_i3c_master_do_daa()
963 static int svc_i3c_master_read(struct svc_i3c_master *master, in svc_i3c_master_read() argument
973 mstatus = readl(master->regs + SVC_I3C_MSTATUS); in svc_i3c_master_read()
978 dev_dbg(master->dev, "I3C read timeout\n"); in svc_i3c_master_read()
982 mdctrl = readl(master->regs + SVC_I3C_MDATACTRL); in svc_i3c_master_read()
985 dev_err(master->dev, "I3C receive length too long!\n"); in svc_i3c_master_read()
989 in[offset + i] = readl(master->regs + SVC_I3C_MRDATAB); in svc_i3c_master_read()
997 static int svc_i3c_master_write(struct svc_i3c_master *master, in svc_i3c_master_write() argument
1004 ret = readl_poll_timeout(master->regs + SVC_I3C_MDATACTRL, in svc_i3c_master_write()
1016 writel(out[offset++], master->regs + SVC_I3C_MWDATAB); in svc_i3c_master_write()
1018 writel(out[offset++], master->regs + SVC_I3C_MWDATABE); in svc_i3c_master_write()
1024 static int svc_i3c_master_xfer(struct svc_i3c_master *master, in svc_i3c_master_xfer() argument
1033 writel(SVC_I3C_MINT_IBIWON, master->regs + SVC_I3C_MSTATUS); in svc_i3c_master_xfer()
1041 master->regs + SVC_I3C_MCTRL); in svc_i3c_master_xfer()
1043 ret = readl_poll_timeout(master->regs + SVC_I3C_MSTATUS, reg, in svc_i3c_master_xfer()
1048 if (readl(master->regs + SVC_I3C_MERRWARN) & SVC_I3C_MERRWARN_NACK) { in svc_i3c_master_xfer()
1071 ret = svc_i3c_master_read(master, in, xfer_len); in svc_i3c_master_xfer()
1073 ret = svc_i3c_master_write(master, out, xfer_len); in svc_i3c_master_xfer()
1080 ret = readl_poll_timeout(master->regs + SVC_I3C_MSTATUS, reg, in svc_i3c_master_xfer()
1085 writel(SVC_I3C_MINT_COMPLETE, master->regs + SVC_I3C_MSTATUS); in svc_i3c_master_xfer()
1088 svc_i3c_master_emit_stop(master); in svc_i3c_master_xfer()
1091 readl_poll_timeout(master->regs + SVC_I3C_MSTATUS, reg, in svc_i3c_master_xfer()
1098 svc_i3c_master_emit_stop(master); in svc_i3c_master_xfer()
1099 svc_i3c_master_clear_merrwarn(master); in svc_i3c_master_xfer()
1105 svc_i3c_master_alloc_xfer(struct svc_i3c_master *master, unsigned int ncmds) in svc_i3c_master_alloc_xfer() argument
1125 static void svc_i3c_master_dequeue_xfer_locked(struct svc_i3c_master *master, in svc_i3c_master_dequeue_xfer_locked() argument
1128 if (master->xferqueue.cur == xfer) in svc_i3c_master_dequeue_xfer_locked()
1129 master->xferqueue.cur = NULL; in svc_i3c_master_dequeue_xfer_locked()
1134 static void svc_i3c_master_dequeue_xfer(struct svc_i3c_master *master, in svc_i3c_master_dequeue_xfer() argument
1139 spin_lock_irqsave(&master->xferqueue.lock, flags); in svc_i3c_master_dequeue_xfer()
1140 svc_i3c_master_dequeue_xfer_locked(master, xfer); in svc_i3c_master_dequeue_xfer()
1141 spin_unlock_irqrestore(&master->xferqueue.lock, flags); in svc_i3c_master_dequeue_xfer()
1144 static void svc_i3c_master_start_xfer_locked(struct svc_i3c_master *master) in svc_i3c_master_start_xfer_locked() argument
1146 struct svc_i3c_xfer *xfer = master->xferqueue.cur; in svc_i3c_master_start_xfer_locked()
1152 svc_i3c_master_clear_merrwarn(master); in svc_i3c_master_start_xfer_locked()
1153 svc_i3c_master_flush_fifo(master); in svc_i3c_master_start_xfer_locked()
1158 ret = svc_i3c_master_xfer(master, cmd->rnw, xfer->type, in svc_i3c_master_start_xfer_locked()
1170 svc_i3c_master_dequeue_xfer_locked(master, xfer); in svc_i3c_master_start_xfer_locked()
1172 xfer = list_first_entry_or_null(&master->xferqueue.list, in svc_i3c_master_start_xfer_locked()
1178 master->xferqueue.cur = xfer; in svc_i3c_master_start_xfer_locked()
1179 svc_i3c_master_start_xfer_locked(master); in svc_i3c_master_start_xfer_locked()
1182 static void svc_i3c_master_enqueue_xfer(struct svc_i3c_master *master, in svc_i3c_master_enqueue_xfer() argument
1188 ret = pm_runtime_resume_and_get(master->dev); in svc_i3c_master_enqueue_xfer()
1190 dev_err(master->dev, "<%s> Cannot get runtime PM.\n", __func__); in svc_i3c_master_enqueue_xfer()
1195 spin_lock_irqsave(&master->xferqueue.lock, flags); in svc_i3c_master_enqueue_xfer()
1196 if (master->xferqueue.cur) { in svc_i3c_master_enqueue_xfer()
1197 list_add_tail(&xfer->node, &master->xferqueue.list); in svc_i3c_master_enqueue_xfer()
1199 master->xferqueue.cur = xfer; in svc_i3c_master_enqueue_xfer()
1200 svc_i3c_master_start_xfer_locked(master); in svc_i3c_master_enqueue_xfer()
1202 spin_unlock_irqrestore(&master->xferqueue.lock, flags); in svc_i3c_master_enqueue_xfer()
1204 pm_runtime_mark_last_busy(master->dev); in svc_i3c_master_enqueue_xfer()
1205 pm_runtime_put_autosuspend(master->dev); in svc_i3c_master_enqueue_xfer()
1209 svc_i3c_master_supports_ccc_cmd(struct i3c_master_controller *master, in svc_i3c_master_supports_ccc_cmd() argument
1216 static int svc_i3c_master_send_bdcast_ccc_cmd(struct svc_i3c_master *master, in svc_i3c_master_send_bdcast_ccc_cmd() argument
1225 xfer = svc_i3c_master_alloc_xfer(master, 1); in svc_i3c_master_send_bdcast_ccc_cmd()
1249 mutex_lock(&master->lock); in svc_i3c_master_send_bdcast_ccc_cmd()
1250 svc_i3c_master_enqueue_xfer(master, xfer); in svc_i3c_master_send_bdcast_ccc_cmd()
1252 svc_i3c_master_dequeue_xfer(master, xfer); in svc_i3c_master_send_bdcast_ccc_cmd()
1253 mutex_unlock(&master->lock); in svc_i3c_master_send_bdcast_ccc_cmd()
1262 static int svc_i3c_master_send_direct_ccc_cmd(struct svc_i3c_master *master, in svc_i3c_master_send_direct_ccc_cmd() argument
1271 xfer = svc_i3c_master_alloc_xfer(master, 2); in svc_i3c_master_send_direct_ccc_cmd()
1297 mutex_lock(&master->lock); in svc_i3c_master_send_direct_ccc_cmd()
1298 svc_i3c_master_enqueue_xfer(master, xfer); in svc_i3c_master_send_direct_ccc_cmd()
1300 svc_i3c_master_dequeue_xfer(master, xfer); in svc_i3c_master_send_direct_ccc_cmd()
1301 mutex_unlock(&master->lock); in svc_i3c_master_send_direct_ccc_cmd()
1315 struct svc_i3c_master *master = to_svc_i3c_master(m); in svc_i3c_master_send_ccc_cmd() local
1320 ret = svc_i3c_master_send_bdcast_ccc_cmd(master, cmd); in svc_i3c_master_send_ccc_cmd()
1322 ret = svc_i3c_master_send_direct_ccc_cmd(master, cmd); in svc_i3c_master_send_ccc_cmd()
1335 struct svc_i3c_master *master = to_svc_i3c_master(m); in svc_i3c_master_priv_xfers() local
1340 xfer = svc_i3c_master_alloc_xfer(master, nxfers); in svc_i3c_master_priv_xfers()
1349 cmd->addr = master->addrs[data->index]; in svc_i3c_master_priv_xfers()
1358 mutex_lock(&master->lock); in svc_i3c_master_priv_xfers()
1359 svc_i3c_master_enqueue_xfer(master, xfer); in svc_i3c_master_priv_xfers()
1361 svc_i3c_master_dequeue_xfer(master, xfer); in svc_i3c_master_priv_xfers()
1362 mutex_unlock(&master->lock); in svc_i3c_master_priv_xfers()
1375 struct svc_i3c_master *master = to_svc_i3c_master(m); in svc_i3c_master_i2c_xfers() local
1380 xfer = svc_i3c_master_alloc_xfer(master, nxfers); in svc_i3c_master_i2c_xfers()
1389 cmd->addr = master->addrs[data->index]; in svc_i3c_master_i2c_xfers()
1398 mutex_lock(&master->lock); in svc_i3c_master_i2c_xfers()
1399 svc_i3c_master_enqueue_xfer(master, xfer); in svc_i3c_master_i2c_xfers()
1401 svc_i3c_master_dequeue_xfer(master, xfer); in svc_i3c_master_i2c_xfers()
1402 mutex_unlock(&master->lock); in svc_i3c_master_i2c_xfers()
1414 struct svc_i3c_master *master = to_svc_i3c_master(m); in svc_i3c_master_request_ibi() local
1420 dev_err(master->dev, "IBI max payload %d should be < %d\n", in svc_i3c_master_request_ibi()
1429 spin_lock_irqsave(&master->ibi.lock, flags); in svc_i3c_master_request_ibi()
1430 for (i = 0; i < master->ibi.num_slots; i++) { in svc_i3c_master_request_ibi()
1431 if (!master->ibi.slots[i]) { in svc_i3c_master_request_ibi()
1433 master->ibi.slots[i] = dev; in svc_i3c_master_request_ibi()
1437 spin_unlock_irqrestore(&master->ibi.lock, flags); in svc_i3c_master_request_ibi()
1439 if (i < master->ibi.num_slots) in svc_i3c_master_request_ibi()
1451 struct svc_i3c_master *master = to_svc_i3c_master(m); in svc_i3c_master_free_ibi() local
1455 spin_lock_irqsave(&master->ibi.lock, flags); in svc_i3c_master_free_ibi()
1456 master->ibi.slots[data->ibi] = NULL; in svc_i3c_master_free_ibi()
1458 spin_unlock_irqrestore(&master->ibi.lock, flags); in svc_i3c_master_free_ibi()
1466 struct svc_i3c_master *master = to_svc_i3c_master(m); in svc_i3c_master_enable_ibi() local
1469 ret = pm_runtime_resume_and_get(master->dev); in svc_i3c_master_enable_ibi()
1471 dev_err(master->dev, "<%s> Cannot get runtime PM.\n", __func__); in svc_i3c_master_enable_ibi()
1475 svc_i3c_master_enable_interrupts(master, SVC_I3C_MINT_SLVSTART); in svc_i3c_master_enable_ibi()
1483 struct svc_i3c_master *master = to_svc_i3c_master(m); in svc_i3c_master_disable_ibi() local
1486 svc_i3c_master_disable_interrupts(master); in svc_i3c_master_disable_ibi()
1490 pm_runtime_mark_last_busy(master->dev); in svc_i3c_master_disable_ibi()
1491 pm_runtime_put_autosuspend(master->dev); in svc_i3c_master_disable_ibi()
1524 static int svc_i3c_master_prepare_clks(struct svc_i3c_master *master) in svc_i3c_master_prepare_clks() argument
1528 ret = clk_prepare_enable(master->pclk); in svc_i3c_master_prepare_clks()
1532 ret = clk_prepare_enable(master->fclk); in svc_i3c_master_prepare_clks()
1534 clk_disable_unprepare(master->pclk); in svc_i3c_master_prepare_clks()
1538 ret = clk_prepare_enable(master->sclk); in svc_i3c_master_prepare_clks()
1540 clk_disable_unprepare(master->pclk); in svc_i3c_master_prepare_clks()
1541 clk_disable_unprepare(master->fclk); in svc_i3c_master_prepare_clks()
1548 static void svc_i3c_master_unprepare_clks(struct svc_i3c_master *master) in svc_i3c_master_unprepare_clks() argument
1550 clk_disable_unprepare(master->pclk); in svc_i3c_master_unprepare_clks()
1551 clk_disable_unprepare(master->fclk); in svc_i3c_master_unprepare_clks()
1552 clk_disable_unprepare(master->sclk); in svc_i3c_master_unprepare_clks()
1558 struct svc_i3c_master *master; in svc_i3c_master_probe() local
1561 master = devm_kzalloc(dev, sizeof(*master), GFP_KERNEL); in svc_i3c_master_probe()
1562 if (!master) in svc_i3c_master_probe()
1565 master->regs = devm_platform_ioremap_resource(pdev, 0); in svc_i3c_master_probe()
1566 if (IS_ERR(master->regs)) in svc_i3c_master_probe()
1567 return PTR_ERR(master->regs); in svc_i3c_master_probe()
1569 master->pclk = devm_clk_get(dev, "pclk"); in svc_i3c_master_probe()
1570 if (IS_ERR(master->pclk)) in svc_i3c_master_probe()
1571 return PTR_ERR(master->pclk); in svc_i3c_master_probe()
1573 master->fclk = devm_clk_get(dev, "fast_clk"); in svc_i3c_master_probe()
1574 if (IS_ERR(master->fclk)) in svc_i3c_master_probe()
1575 return PTR_ERR(master->fclk); in svc_i3c_master_probe()
1577 master->sclk = devm_clk_get(dev, "slow_clk"); in svc_i3c_master_probe()
1578 if (IS_ERR(master->sclk)) in svc_i3c_master_probe()
1579 return PTR_ERR(master->sclk); in svc_i3c_master_probe()
1581 master->irq = platform_get_irq(pdev, 0); in svc_i3c_master_probe()
1582 if (master->irq < 0) in svc_i3c_master_probe()
1583 return master->irq; in svc_i3c_master_probe()
1585 master->dev = dev; in svc_i3c_master_probe()
1587 ret = svc_i3c_master_prepare_clks(master); in svc_i3c_master_probe()
1591 INIT_WORK(&master->hj_work, svc_i3c_master_hj_work); in svc_i3c_master_probe()
1592 INIT_WORK(&master->ibi_work, svc_i3c_master_ibi_work); in svc_i3c_master_probe()
1593 mutex_init(&master->lock); in svc_i3c_master_probe()
1595 ret = devm_request_irq(dev, master->irq, svc_i3c_master_irq_handler, in svc_i3c_master_probe()
1596 IRQF_NO_SUSPEND, "svc-i3c-irq", master); in svc_i3c_master_probe()
1600 master->free_slots = GENMASK(SVC_I3C_MAX_DEVS - 1, 0); in svc_i3c_master_probe()
1602 spin_lock_init(&master->xferqueue.lock); in svc_i3c_master_probe()
1603 INIT_LIST_HEAD(&master->xferqueue.list); in svc_i3c_master_probe()
1605 spin_lock_init(&master->ibi.lock); in svc_i3c_master_probe()
1606 master->ibi.num_slots = SVC_I3C_MAX_DEVS; in svc_i3c_master_probe()
1607 master->ibi.slots = devm_kcalloc(&pdev->dev, master->ibi.num_slots, in svc_i3c_master_probe()
1608 sizeof(*master->ibi.slots), in svc_i3c_master_probe()
1610 if (!master->ibi.slots) { in svc_i3c_master_probe()
1615 platform_set_drvdata(pdev, master); in svc_i3c_master_probe()
1623 svc_i3c_master_reset(master); in svc_i3c_master_probe()
1625 /* Register the master */ in svc_i3c_master_probe()
1626 ret = i3c_master_register(&master->base, &pdev->dev, in svc_i3c_master_probe()
1643 svc_i3c_master_unprepare_clks(master); in svc_i3c_master_probe()
1650 struct svc_i3c_master *master = platform_get_drvdata(pdev); in svc_i3c_master_remove() local
1652 i3c_master_unregister(&master->base); in svc_i3c_master_remove()
1658 static void svc_i3c_save_regs(struct svc_i3c_master *master) in svc_i3c_save_regs() argument
1660 master->saved_regs.mconfig = readl(master->regs + SVC_I3C_MCONFIG); in svc_i3c_save_regs()
1661 master->saved_regs.mdynaddr = readl(master->regs + SVC_I3C_MDYNADDR); in svc_i3c_save_regs()
1664 static void svc_i3c_restore_regs(struct svc_i3c_master *master) in svc_i3c_restore_regs() argument
1666 if (readl(master->regs + SVC_I3C_MDYNADDR) != in svc_i3c_restore_regs()
1667 master->saved_regs.mdynaddr) { in svc_i3c_restore_regs()
1668 writel(master->saved_regs.mconfig, in svc_i3c_restore_regs()
1669 master->regs + SVC_I3C_MCONFIG); in svc_i3c_restore_regs()
1670 writel(master->saved_regs.mdynaddr, in svc_i3c_restore_regs()
1671 master->regs + SVC_I3C_MDYNADDR); in svc_i3c_restore_regs()
1677 struct svc_i3c_master *master = dev_get_drvdata(dev); in svc_i3c_runtime_suspend() local
1679 svc_i3c_save_regs(master); in svc_i3c_runtime_suspend()
1680 svc_i3c_master_unprepare_clks(master); in svc_i3c_runtime_suspend()
1688 struct svc_i3c_master *master = dev_get_drvdata(dev); in svc_i3c_runtime_resume() local
1691 svc_i3c_master_prepare_clks(master); in svc_i3c_runtime_resume()
1693 svc_i3c_restore_regs(master); in svc_i3c_runtime_resume()
1706 { .compatible = "silvaco,i3c-master" },
1715 .name = "silvaco-i3c-master",
1724 MODULE_DESCRIPTION("Silvaco dual-role I3C master driver");