Lines Matching +full:in +full:- +full:between

1 # SPDX-License-Identifier: GPL-2.0-only
5 	  Mailbox is a framework to control hardware communication between
6 	  on-chip processors through queued messages and interrupt driven
16 	  Apple SoCs have various co-processors required for certain
29 	  used in Secure mode only.
36 	  which provides unidirectional mailboxes between processing elements.
52 	  which can be used in Secure mode only.
60 	  send short messages between Highbank's A9 cores and the EnergyCore
70 	  running on the Cortex-M3 rWTM secure processor of the Armada 37xx
79 	  interprocessor communication involving DSP, IVA1.0 and IVA2 in
80 	  OMAP2/3; or IPU, IVA HD and DSP in OMAP4/5. Say Y here if you
96 	  This driver provides support for inter-processor communication
97 	  between CPU cores and MCU processor on Some Rockchip SOCs.
107 	  between the OS and a platform such as the BMC. This medium
118 	  to send message between processors. Say Y here if you want to use the
144 	  and K3 architecture SoCs. These may be used for communication between
155 	  between application processors and other processors/MCU/DSP. Select
165 	  between application processors and MCU. Say Y here if you want to
184 	  module will be called mailbox-mpfs.
193 	  providing an interface for invoking the inter-process communication
201 	  between different remote processors and host processors on Tegra186
206 	tristate "APM SoC X-Gene SLIMpro Mailbox Controller"
209 	  An implementation of the APM X-Gene Interprocessor Communication
210 	  Mailbox (IPCM) between the ARM 64-bit cores and SLIMpro controller.
211 	  It is used to send short messages between ARM64-bit cores and
213 	  want to use the APM X-Gene SLIMpro IPCM support.
239 	  with hardware for Inter-Processor Communication Controller (IPCC)
240 	  between processors. Say Y here if you want to have this support.
248           between processors with ADSP. It will place the message to share
267 	  between processors with Xilinx ZynqMP IPI. It will place the
276 	  Mailbox implementation for the hardware message box present in
278 	  between the application CPUs and the power management coprocessor.
285 	  to send message between application processors and MCU. Say Y here if
292 	  Qualcomm Technologies, Inc. Inter-Processor Communication Controller