27 	struct rtsx_pcr		*pcr;  member
57 	rtsx_pci_write_register(host->pcr, CARD_STOP,  in sd_clear_error()
74 			rtsx_pci_read_register(host->pcr, start + i + j,  in dump_reg_range()
92 	return rtsx_pci_readl(host->pcr, RTSX_BIPR) & SD_EXIST;  in sd_get_cd_int()
95 static void sd_cmd_set_sd_cmd(struct rtsx_pcr *pcr, struct mmc_command *cmd)  in sd_cmd_set_sd_cmd()  argument
97 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CMD0, 0xFF,  in sd_cmd_set_sd_cmd()
99 	rtsx_pci_write_be32(pcr, SD_CMD1, cmd->arg);  in sd_cmd_set_sd_cmd()
102 static void sd_cmd_set_data_len(struct rtsx_pcr *pcr, u16 blocks, u16 blksz)  in sd_cmd_set_data_len()  argument
104 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_BLOCK_CNT_L, 0xFF, blocks);  in sd_cmd_set_data_len()
105 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_BLOCK_CNT_H, 0xFF, blocks >> 8);  in sd_cmd_set_data_len()
106 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_BYTE_CNT_L, 0xFF, blksz);  in sd_cmd_set_data_len()
107 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_BYTE_CNT_H, 0xFF, blksz >> 8);  in sd_cmd_set_data_len()
150 	struct rtsx_pcr *pcr = host->pcr;  in sd_pre_dma_transfer()  local
163 		count = rtsx_pci_dma_map_sg(pcr, data->sg, data->sg_len, read);  in sd_pre_dma_transfer()
201 	struct rtsx_pcr *pcr = host->pcr;  in sdmmc_post_req()  local
205 	rtsx_pci_dma_unmap_sg(pcr, data->sg, data->sg_len, read);  in sdmmc_post_req()
212 	struct rtsx_pcr *pcr = host->pcr;  in sd_send_cmd_get_rsp()  local
236 		err = rtsx_pci_write_register(pcr, SD_BUS_STAT,  in sd_send_cmd_get_rsp()
244 	rtsx_pci_init_cmd(pcr);  in sd_send_cmd_get_rsp()
245 	sd_cmd_set_sd_cmd(pcr, cmd);  in sd_send_cmd_get_rsp()
246 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CFG2, 0xFF, rsp_type);  in sd_send_cmd_get_rsp()
247 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_DATA_SOURCE,  in sd_send_cmd_get_rsp()
249 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_TRANSFER,  in sd_send_cmd_get_rsp()
251 	rtsx_pci_add_cmd(pcr, CHECK_REG_CMD, SD_TRANSFER,  in sd_send_cmd_get_rsp()
258 			rtsx_pci_add_cmd(pcr, READ_REG_CMD, (u16)i, 0, 0);  in sd_send_cmd_get_rsp()
262 			rtsx_pci_add_cmd(pcr, READ_REG_CMD, (u16)i, 0, 0);  in sd_send_cmd_get_rsp()
265 	rtsx_pci_add_cmd(pcr, READ_REG_CMD, SD_STAT1, 0, 0);  in sd_send_cmd_get_rsp()
267 	err = rtsx_pci_send_cmd(pcr, timeout);  in sd_send_cmd_get_rsp()
282 	ptr = rtsx_pci_get_cmd_data(pcr) + 1;  in sd_send_cmd_get_rsp()
323 		rtsx_pci_write_register(pcr, SD_BUS_STAT,  in sd_send_cmd_get_rsp()
330 	struct rtsx_pcr *pcr = host->pcr;  in sd_read_data()  local
345 	rtsx_pci_init_cmd(pcr);  in sd_read_data()
346 	sd_cmd_set_sd_cmd(pcr, cmd);  in sd_read_data()
347 	sd_cmd_set_data_len(pcr, 1, byte_cnt);  in sd_read_data()
348 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CFG2, 0xFF,  in sd_read_data()
352 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD,  in sd_read_data()
355 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_TRANSFER,  in sd_read_data()
357 	rtsx_pci_add_cmd(pcr, CHECK_REG_CMD, SD_TRANSFER,  in sd_read_data()
360 	err = rtsx_pci_send_cmd(pcr, timeout);  in sd_read_data()
369 		err = rtsx_pci_read_ppbuf(pcr, buf, buf_len);  in sd_read_data()
384 	struct rtsx_pcr *pcr = host->pcr;  in sd_write_data()  local
398 		err = rtsx_pci_write_ppbuf(pcr, buf, buf_len);  in sd_write_data()
406 	rtsx_pci_init_cmd(pcr);  in sd_write_data()
407 	sd_cmd_set_data_len(pcr, 1, byte_cnt);  in sd_write_data()
408 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CFG2, 0xFF,  in sd_write_data()
411 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_TRANSFER, 0xFF,  in sd_write_data()
413 	rtsx_pci_add_cmd(pcr, CHECK_REG_CMD, SD_TRANSFER,  in sd_write_data()
416 	err = rtsx_pci_send_cmd(pcr, timeout);  in sd_write_data()
430 	struct rtsx_pcr *pcr = host->pcr;  in sd_read_long_data()  local
451 	rtsx_pci_init_cmd(pcr);  in sd_read_long_data()
452 	sd_cmd_set_sd_cmd(pcr, cmd);  in sd_read_long_data()
453 	sd_cmd_set_data_len(pcr, data->blocks, data->blksz);  in sd_read_long_data()
454 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, IRQSTAT0,  in sd_read_long_data()
456 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMATC3,  in sd_read_long_data()
458 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMATC2,  in sd_read_long_data()
460 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMATC1,  in sd_read_long_data()
462 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMATC0, 0xFF, (u8)data_len);  in sd_read_long_data()
463 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMACTL,  in sd_read_long_data()
466 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_DATA_SOURCE,  in sd_read_long_data()
468 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CFG2, 0xFF, cfg2 | resp_type);  in sd_read_long_data()
469 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_TRANSFER, 0xFF,  in sd_read_long_data()
471 	rtsx_pci_add_cmd(pcr, CHECK_REG_CMD, SD_TRANSFER,  in sd_read_long_data()
473 	rtsx_pci_send_cmd_no_wait(pcr);  in sd_read_long_data()
475 	err = rtsx_pci_dma_transfer(pcr, data->sg, host->sg_count, 1, 10000);  in sd_read_long_data()
488 	struct rtsx_pcr *pcr = host->pcr;  in sd_write_long_data()  local
511 	rtsx_pci_init_cmd(pcr);  in sd_write_long_data()
512 	sd_cmd_set_data_len(pcr, data->blocks, data->blksz);  in sd_write_long_data()
513 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, IRQSTAT0,  in sd_write_long_data()
515 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMATC3,  in sd_write_long_data()
517 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMATC2,  in sd_write_long_data()
519 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMATC1,  in sd_write_long_data()
521 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMATC0, 0xFF, (u8)data_len);  in sd_write_long_data()
522 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMACTL,  in sd_write_long_data()
525 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_DATA_SOURCE,  in sd_write_long_data()
527 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CFG2, 0xFF, cfg2);  in sd_write_long_data()
528 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_TRANSFER, 0xFF,  in sd_write_long_data()
530 	rtsx_pci_add_cmd(pcr, CHECK_REG_CMD, SD_TRANSFER,  in sd_write_long_data()
532 	rtsx_pci_send_cmd_no_wait(pcr);  in sd_write_long_data()
533 	err = rtsx_pci_dma_transfer(pcr, data->sg, host->sg_count, 0, 10000);  in sd_write_long_data()
544 	rtsx_pci_write_register(host->pcr, SD_CFG1,  in sd_enable_initial_mode()
550 	rtsx_pci_write_register(host->pcr, SD_CFG1,  in sd_disable_initial_mode()
618 	struct rtsx_pcr *pcr = host->pcr;  in sd_change_phase()  local
623 	rtsx_pci_write_register(pcr, CLK_CTL, CHANGE_CLK, CHANGE_CLK);  in sd_change_phase()
626 		rtsx_pci_write_register(pcr, SD_VPRX_CTL,  in sd_change_phase()
630 		rtsx_pci_write_register(pcr, SD_VPTX_CTL,  in sd_change_phase()
633 	rtsx_pci_write_register(pcr, SD_VP_CTL, PHASE_NOT_RESET, 0);  in sd_change_phase()
634 	rtsx_pci_write_register(pcr, SD_VP_CTL, PHASE_NOT_RESET,  in sd_change_phase()
636 	rtsx_pci_write_register(pcr, CLK_CTL, CHANGE_CLK, 0);  in sd_change_phase()
637 	rtsx_pci_write_register(pcr, SD_CFG1, SD_ASYNC_FIFO_NOT_RST, 0);  in sd_change_phase()
692 		rtsx_pci_read_register(host->pcr, SD_DATA_STATE, &val);  in sd_wait_data_idle()
705 	struct rtsx_pcr *pcr = host->pcr;  in sd_tuning_rx_cmd()  local
709 	rtsx_pci_write_register(pcr, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN,  in sd_tuning_rx_cmd()
718 		rtsx_pci_write_register(pcr, SD_CFG3,  in sd_tuning_rx_cmd()
723 	rtsx_pci_write_register(pcr, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN, 0);  in sd_tuning_rx_cmd()
800 	struct rtsx_pcr *pcr = host->pcr;  in sd_request()  local
815 	err = rtsx_pci_card_exclusive_check(host->pcr, RTSX_SD_CARD);  in sd_request()
821 	mutex_lock(&pcr->pcr_mutex);  in sd_request()
823 	rtsx_pci_start_run(pcr);  in sd_request()
825 	rtsx_pci_switch_clock(pcr, host->clock, host->ssc_depth,  in sd_request()
827 	rtsx_pci_write_register(pcr, CARD_SELECT, 0x07, SD_MOD_SEL);  in sd_request()
828 	rtsx_pci_write_register(pcr, CARD_SHARE_MODE,  in sd_request()
858 	mutex_unlock(&pcr->pcr_mutex);  in sd_request()
899 		err = rtsx_pci_write_register(host->pcr, SD_CFG1,  in sd_set_bus_width()
907 	struct rtsx_pcr *pcr = host->pcr;  in sd_power_on()  local
917 		rtsx_pci_write_register(pcr, SD_BUS_STAT, SD_CLK_TOGGLE_EN, 0);  in sd_power_on()
923 	rtsx_pci_init_cmd(pcr);  in sd_power_on()
924 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_SELECT, 0x07, SD_MOD_SEL);  in sd_power_on()
925 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_SHARE_MODE,  in sd_power_on()
927 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_CLK_EN,  in sd_power_on()
929 	err = rtsx_pci_send_cmd(pcr, 100);  in sd_power_on()
933 	err = rtsx_pci_card_pull_ctl_enable(pcr, RTSX_SD_CARD);  in sd_power_on()
937 	err = rtsx_pci_card_power_on(pcr, RTSX_SD_CARD);  in sd_power_on()
943 	err = rtsx_pci_write_register(pcr, CARD_OE, SD_OUTPUT_EN, SD_OUTPUT_EN);  in sd_power_on()
948 	rtsx_pci_write_register(pcr, SD_BUS_STAT, SD_CLK_TOGGLE_EN, SD_CLK_TOGGLE_EN);  in sd_power_on()
950 	if (PCI_PID(pcr) == PID_5261) {  in sd_power_on()
955 		rtsx_pci_read_register(pcr, RTS5261_FW_CFG_INFO0, &test_mode);  in sd_power_on()
960 		if (pcr->extra_caps & EXTRA_CAPS_SD_EXPRESS)  in sd_power_on()
967 		val = rtsx_pci_readl(pcr, RTSX_BIPR);  in sd_power_on()
969 			pcr->extra_caps &= ~EXTRA_CAPS_SD_EXPRESS;  in sd_power_on()
981 	struct rtsx_pcr *pcr = host->pcr;  in sd_power_off()  local
986 	rtsx_pci_init_cmd(pcr);  in sd_power_off()
988 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_CLK_EN, SD_CLK_EN, 0);  in sd_power_off()
989 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_OE, SD_OUTPUT_EN, 0);  in sd_power_off()
991 	err = rtsx_pci_send_cmd(pcr, 100);  in sd_power_off()
995 	err = rtsx_pci_card_power_off(pcr, RTSX_SD_CARD);  in sd_power_off()
999 	return rtsx_pci_card_pull_ctl_disable(pcr, RTSX_SD_CARD);  in sd_power_off()
1017 	struct rtsx_pcr *pcr = host->pcr;  in sd_set_timing()  local
1020 	rtsx_pci_init_cmd(pcr);  in sd_set_timing()
1025 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CFG1,  in sd_set_timing()
1028 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL,  in sd_set_timing()
1030 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,  in sd_set_timing()
1032 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, CLK_LOW_FREQ, 0);  in sd_set_timing()
1037 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CFG1,  in sd_set_timing()
1040 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL,  in sd_set_timing()
1042 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,  in sd_set_timing()
1044 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, CLK_LOW_FREQ, 0);  in sd_set_timing()
1045 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_PUSH_POINT_CTL,  in sd_set_timing()
1047 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL,  in sd_set_timing()
1054 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CFG1,  in sd_set_timing()
1056 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL,  in sd_set_timing()
1058 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,  in sd_set_timing()
1060 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, CLK_LOW_FREQ, 0);  in sd_set_timing()
1061 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_PUSH_POINT_CTL,  in sd_set_timing()
1063 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL,  in sd_set_timing()
1068 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD,  in sd_set_timing()
1070 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL,  in sd_set_timing()
1072 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,  in sd_set_timing()
1074 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, CLK_LOW_FREQ, 0);  in sd_set_timing()
1075 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD,  in sd_set_timing()
1077 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL,  in sd_set_timing()
1082 	err = rtsx_pci_send_cmd(pcr, 100);  in sd_set_timing()
1090 	struct rtsx_pcr *pcr = host->pcr;  in sdmmc_set_ios()  local
1095 	if (rtsx_pci_card_exclusive_check(host->pcr, RTSX_SD_CARD))  in sdmmc_set_ios()
1098 	mutex_lock(&pcr->pcr_mutex);  in sdmmc_set_ios()
1100 	rtsx_pci_start_run(pcr);  in sdmmc_set_ios()
1129 	rtsx_pci_switch_clock(pcr, ios->clock, host->ssc_depth,  in sdmmc_set_ios()
1132 	mutex_unlock(&pcr->pcr_mutex);  in sdmmc_set_ios()
1138 	struct rtsx_pcr *pcr = host->pcr;  in sdmmc_get_ro()  local
1145 	mutex_lock(&pcr->pcr_mutex);  in sdmmc_get_ro()
1147 	rtsx_pci_start_run(pcr);  in sdmmc_get_ro()
1150 	val = rtsx_pci_readl(pcr, RTSX_BIPR);  in sdmmc_get_ro()
1155 	mutex_unlock(&pcr->pcr_mutex);  in sdmmc_get_ro()
1163 	struct rtsx_pcr *pcr = host->pcr;  in sdmmc_get_cd()  local
1170 	mutex_lock(&pcr->pcr_mutex);  in sdmmc_get_cd()
1172 	rtsx_pci_start_run(pcr);  in sdmmc_get_cd()
1175 	val = rtsx_pci_card_exist(pcr);  in sdmmc_get_cd()
1180 	mutex_unlock(&pcr->pcr_mutex);  in sdmmc_get_cd()
1187 	struct rtsx_pcr *pcr = host->pcr;  in sd_wait_voltage_stable_1()  local
1201 	err = rtsx_pci_read_register(pcr, SD_BUS_STAT, &stat);  in sd_wait_voltage_stable_1()
1210 	err = rtsx_pci_write_register(pcr, SD_BUS_STAT,  in sd_wait_voltage_stable_1()
1220 	struct rtsx_pcr *pcr = host->pcr;  in sd_wait_voltage_stable_2()  local
1228 	err = rtsx_pci_write_register(pcr, SD_BUS_STAT, 0xFF, SD_CLK_TOGGLE_EN);  in sd_wait_voltage_stable_2()
1238 	err = rtsx_pci_read_register(pcr, SD_BUS_STAT, &stat);  in sd_wait_voltage_stable_2()
1249 		rtsx_pci_write_register(pcr, SD_BUS_STAT,  in sd_wait_voltage_stable_2()
1251 		rtsx_pci_write_register(pcr, CARD_CLK_EN, 0xFF, 0);  in sd_wait_voltage_stable_2()
1261 	struct rtsx_pcr *pcr = host->pcr;  in sdmmc_switch_voltage()  local
1271 	err = rtsx_pci_card_exclusive_check(host->pcr, RTSX_SD_CARD);  in sdmmc_switch_voltage()
1275 	mutex_lock(&pcr->pcr_mutex);  in sdmmc_switch_voltage()
1277 	rtsx_pci_start_run(pcr);  in sdmmc_switch_voltage()
1290 	err = rtsx_pci_switch_output_voltage(pcr, voltage);  in sdmmc_switch_voltage()
1302 	err = rtsx_pci_write_register(pcr, SD_BUS_STAT,  in sdmmc_switch_voltage()
1305 	mutex_unlock(&pcr->pcr_mutex);  in sdmmc_switch_voltage()
1313 	struct rtsx_pcr *pcr = host->pcr;  in sdmmc_execute_tuning()  local
1319 	err = rtsx_pci_card_exclusive_check(host->pcr, RTSX_SD_CARD);  in sdmmc_execute_tuning()
1323 	mutex_lock(&pcr->pcr_mutex);  in sdmmc_execute_tuning()
1325 	rtsx_pci_start_run(pcr);  in sdmmc_execute_tuning()
1330 		err = sd_change_phase(host, SDR104_TX_PHASE(pcr), false);  in sdmmc_execute_tuning()
1334 		err = sd_change_phase(host, SDR50_TX_PHASE(pcr), false);  in sdmmc_execute_tuning()
1338 		err = sd_change_phase(host, DDR50_TX_PHASE(pcr), false);  in sdmmc_execute_tuning()
1353 		err = sd_change_phase(host, DDR50_RX_PHASE(pcr), true);  in sdmmc_execute_tuning()
1356 	mutex_unlock(&pcr->pcr_mutex);  in sdmmc_execute_tuning()
1365 	struct rtsx_pcr *pcr = host->pcr;  in sdmmc_init_sd_express()  local
1370 	rtsx_pci_write_register(pcr, 0xFF01, 0xFF, relink_time);  in sdmmc_init_sd_express()
1371 	rtsx_pci_write_register(pcr, 0xFF02, 0xFF, relink_time >> 8);  in sdmmc_init_sd_express()
1372 	rtsx_pci_write_register(pcr, 0xFF03, 0x01, relink_time >> 16);  in sdmmc_init_sd_express()
1374 	rtsx_pci_write_register(pcr, PETXCFG, 0x80, 0x80);  in sdmmc_init_sd_express()
1375 	rtsx_pci_write_register(pcr, LDO_VCC_CFG0,  in sdmmc_init_sd_express()
1377 		pcr->option.sd_800mA_ocp_thd);  in sdmmc_init_sd_express()
1379 	if (pcr->ops->disable_auto_blink)  in sdmmc_init_sd_express()
1380 		pcr->ops->disable_auto_blink(pcr);  in sdmmc_init_sd_express()
1383 	pcr->hw_param.interrupt_en &= ~(SD_INT_EN);  in sdmmc_init_sd_express()
1384 	rtsx_pci_writel(pcr, RTSX_BIER, pcr->hw_param.interrupt_en);  in sdmmc_init_sd_express()
1386 	rtsx_pci_write_register(pcr, RTS5260_AUTOLOAD_CFG4,  in sdmmc_init_sd_express()
1388 	rtsx_pci_write_register(pcr, RTS5261_FW_CFG0,  in sdmmc_init_sd_express()
1390 	rtsx_pci_write_register(pcr, RTS5261_FW_CFG1,  in sdmmc_init_sd_express()
1392 	rtsx_pci_write_register(pcr, RTS5261_FW_CFG1,  in sdmmc_init_sd_express()
1415 	struct rtsx_pcr *pcr = host->pcr;  in init_extra_caps()  local
1417 	dev_dbg(sdmmc_dev(host), "pcr->extra_caps = 0x%x\n", pcr->extra_caps);  in init_extra_caps()
1419 	if (pcr->extra_caps & EXTRA_CAPS_SD_SDR50)  in init_extra_caps()
1421 	if (pcr->extra_caps & EXTRA_CAPS_SD_SDR104)  in init_extra_caps()
1423 	if (pcr->extra_caps & EXTRA_CAPS_SD_DDR50)  in init_extra_caps()
1425 	if (pcr->extra_caps & EXTRA_CAPS_MMC_HSDDR)  in init_extra_caps()
1427 	if (pcr->extra_caps & EXTRA_CAPS_MMC_8BIT)  in init_extra_caps()
1429 	if (pcr->extra_caps & EXTRA_CAPS_NO_MMC)  in init_extra_caps()
1431 	if (pcr->extra_caps & EXTRA_CAPS_SD_EXPRESS)  in init_extra_caps()
1438 	struct rtsx_pcr *pcr = host->pcr;  in realtek_init_host()  local
1446 	if (pcr->rtd3_en)  in realtek_init_host()
1475 	struct rtsx_pcr *pcr;  in rtsx_pci_sdmmc_drv_probe()  local
1482 	pcr = handle->pcr;  in rtsx_pci_sdmmc_drv_probe()
1483 	if (!pcr)  in rtsx_pci_sdmmc_drv_probe()
1493 	host->pcr = pcr;  in rtsx_pci_sdmmc_drv_probe()
1501 	pcr->slots[RTSX_SD_CARD].p_dev = pdev;  in rtsx_pci_sdmmc_drv_probe()
1502 	pcr->slots[RTSX_SD_CARD].card_event = rtsx_pci_sdmmc_card_event;  in rtsx_pci_sdmmc_drv_probe()
1529 	struct rtsx_pcr *pcr;  in rtsx_pci_sdmmc_drv_remove()  local
1532 	pcr = host->pcr;  in rtsx_pci_sdmmc_drv_remove()
1533 	pcr->slots[RTSX_SD_CARD].p_dev = NULL;  in rtsx_pci_sdmmc_drv_remove()
1534 	pcr->slots[RTSX_SD_CARD].card_event = NULL;  in rtsx_pci_sdmmc_drv_remove()
1545 		rtsx_pci_complete_unfinished_transfer(pcr);  in rtsx_pci_sdmmc_drv_remove()