14 #include <linux/mdio/mdio-mscc-miim.h>
75 	struct mscc_miim_dev *miim = bus->priv;  in mscc_miim_status()  local
78 	ret = regmap_read(miim->regs,  in mscc_miim_status()
79 			  MSCC_MIIM_REG_STATUS + miim->mii_status_offset, &val);  in mscc_miim_status()
81 		WARN_ONCE(1, "mscc miim status read error %d\n", ret);  in mscc_miim_status()
108 	struct mscc_miim_dev *miim = bus->priv;  in mscc_miim_read()  local
116 	ret = regmap_write(miim->regs,  in mscc_miim_read()
117 			   MSCC_MIIM_REG_CMD + miim->mii_status_offset,  in mscc_miim_read()
124 		WARN_ONCE(1, "mscc miim write cmd reg error %d\n", ret);  in mscc_miim_read()
132 	ret = regmap_read(miim->regs,  in mscc_miim_read()
133 			  MSCC_MIIM_REG_DATA + miim->mii_status_offset, &val);  in mscc_miim_read()
135 		WARN_ONCE(1, "mscc miim read data reg error %d\n", ret);  in mscc_miim_read()
139 	if (!miim->ignore_read_errors && !!(val & MSCC_MIIM_DATA_ERROR)) {  in mscc_miim_read()
152 	struct mscc_miim_dev *miim = bus->priv;  in mscc_miim_write()  local
159 	ret = regmap_write(miim->regs,  in mscc_miim_write()
160 			   MSCC_MIIM_REG_CMD + miim->mii_status_offset,  in mscc_miim_write()
168 		WARN_ONCE(1, "mscc miim write error %d\n", ret);  in mscc_miim_write()
175 	struct mscc_miim_dev *miim = bus->priv;  in mscc_miim_reset()  local
179 	if (!miim->phy_regs)  in mscc_miim_reset()
182 	offset = miim->info->phy_reset_offset;  in mscc_miim_reset()
183 	bits = miim->info->phy_reset_bits;  in mscc_miim_reset()
185 	ret = regmap_update_bits(miim->phy_regs, offset, bits, 0);  in mscc_miim_reset()
191 	ret = regmap_update_bits(miim->phy_regs, offset, bits, bits);  in mscc_miim_reset()
219 	struct mscc_miim_dev *miim;  in mscc_miim_setup()  local
222 	bus = devm_mdiobus_alloc_size(dev, sizeof(*miim));  in mscc_miim_setup()
233 	miim = bus->priv;  in mscc_miim_setup()
237 	miim->regs = mii_regmap;  in mscc_miim_setup()
238 	miim->mii_status_offset = status_offset;  in mscc_miim_setup()
239 	miim->ignore_read_errors = ignore_read_errors;  in mscc_miim_setup()
249 	struct mscc_miim_dev *miim = bus->priv;  in mscc_miim_clk_set()  local
254 	if (!miim->bus_freq)  in mscc_miim_clk_set()
257 	rate = clk_get_rate(miim->clk);  in mscc_miim_clk_set()
259 	div = DIV_ROUND_UP(rate, 2 * miim->bus_freq) - 1;  in mscc_miim_clk_set()
265 	return regmap_update_bits(miim->regs, MSCC_MIIM_REG_CFG,  in mscc_miim_clk_set()
274 	struct mscc_miim_dev *miim;  in mscc_miim_probe()  local
282 				     "Unable to create MIIM regmap\n");  in mscc_miim_probe()
297 	miim = bus->priv;  in mscc_miim_probe()
298 	miim->phy_regs = phy_regmap;  in mscc_miim_probe()
300 	miim->info = device_get_match_data(dev);  in mscc_miim_probe()
301 	if (!miim->info)  in mscc_miim_probe()
304 	miim->clk = devm_clk_get_optional(dev, NULL);  in mscc_miim_probe()
305 	if (IS_ERR(miim->clk))  in mscc_miim_probe()
306 		return PTR_ERR(miim->clk);  in mscc_miim_probe()
308 	of_property_read_u32(np, "clock-frequency", &miim->bus_freq);  in mscc_miim_probe()
310 	if (miim->bus_freq && !miim->clk) {  in mscc_miim_probe()
315 	ret = clk_prepare_enable(miim->clk);  in mscc_miim_probe()
334 	clk_disable_unprepare(miim->clk);  in mscc_miim_probe()
341 	struct mscc_miim_dev *miim = bus->priv;  in mscc_miim_remove()  local
343 	clk_disable_unprepare(miim->clk);  in mscc_miim_remove()
362 		.compatible = "mscc,ocelot-miim",
365 		.compatible = "microchip,lan966x-miim",
376 		.name = "mscc-miim",
383 MODULE_DESCRIPTION("Microsemi MIIM driver");