Lines Matching +full:cgu +full:- +full:xway
1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/drivers/pinctrl/pinmux-xway.c
4 * based on linux/drivers/pinctrl/pinmux-pxa910.c
21 #include "pinctrl-lantiq.h"
110 /* --------- ase related code --------- */
126 MFP_XWAY(GPIO11, GPIO, EBU, CGU, JTAG),
128 MFP_XWAY(GPIO13, GPIO, EBU, MII, CGU),
129 MFP_XWAY(GPIO14, GPIO, EBU, SPI, CGU),
137 MFP_XWAY(GPIO22, GPIO, EBU, MII, CGU),
138 MFP_XWAY(GPIO23, GPIO, EBU, MII, CGU),
198 GRP_MUX("clkout0", CGU, ase_pins_clkout0),
199 GRP_MUX("clkout1", CGU, ase_pins_clkout1),
200 GRP_MUX("clkout2", CGU, ase_pins_clkout2),
228 {"cgu", ARRAY_AND_SIZE(ase_cgu_grps)},
238 /* --------- danube related code --------- */
245 MFP_XWAY(GPIO2, GPIO, CGU, EXIN, MII),
246 MFP_XWAY(GPIO3, GPIO, CGU, SDIO, PCI),
250 MFP_XWAY(GPIO7, GPIO, CGU, CBUS, MII),
251 MFP_XWAY(GPIO8, GPIO, CGU, NMI, MII),
257 MFP_XWAY(GPIO14, GPIO, CGU, CBUS, MII),
361 GRP_MUX("clkout0", CGU, danube_pins_clkout0),
362 GRP_MUX("clkout1", CGU, danube_pins_clkout1),
363 GRP_MUX("clkout2", CGU, danube_pins_clkout2),
364 GRP_MUX("clkout3", CGU, danube_pins_clkout3),
402 {"cgu", ARRAY_AND_SIZE(danube_cgu_grps)},
413 /* --------- xrx100 related code --------- */
420 MFP_XWAY(GPIO2, GPIO, CGU, EXIN, NONE),
421 MFP_XWAY(GPIO3, GPIO, CGU, SDIO, PCI),
425 MFP_XWAY(GPIO7, GPIO, CGU, CBUS, NONE),
426 MFP_XWAY(GPIO8, GPIO, CGU, NMI, NONE),
432 MFP_XWAY(GPIO14, GPIO, CGU, NONE, NONE),
437 MFP_XWAY(GPIO19, GPIO, PCI, SDIO, CGU),
569 GRP_MUX("clkout0", CGU, xrx100_pins_clkout0),
570 GRP_MUX("clkout1", CGU, xrx100_pins_clkout1),
571 GRP_MUX("clkout2", CGU, xrx100_pins_clkout2),
572 GRP_MUX("clkout3", CGU, xrx100_pins_clkout3),
615 {"cgu", ARRAY_AND_SIZE(xrx100_cgu_grps)},
626 /* --------- xrx200 related code --------- */
633 MFP_XWAY(GPIO2, GPIO, CGU, EXIN, GPHY),
634 MFP_XWAY(GPIO3, GPIO, CGU, SDIO, PCI),
638 MFP_XWAY(GPIO7, GPIO, CGU, CBUS, GPHY),
639 MFP_XWAY(GPIO8, GPIO, CGU, NMI, NONE),
645 MFP_XWAY(GPIO14, GPIO, CGU, CBUS, USIF),
650 MFP_XWAY(GPIO19, GPIO, PCI, SDIO, CGU),
653 MFP_XWAY(GPIO22, GPIO, SPI, CGU, EBU),
809 GRP_MUX("clkout0", CGU, xrx200_pins_clkout0),
810 GRP_MUX("clkout1", CGU, xrx200_pins_clkout1),
811 GRP_MUX("clkout2", CGU, xrx200_pins_clkout2),
812 GRP_MUX("clkout3", CGU, xrx200_pins_clkout3),
870 {"cgu", ARRAY_AND_SIZE(xrx200_cgu_grps)},
882 /* --------- xrx300 related code --------- */
890 MFP_XWAY(GPIO3, GPIO, CGU, NONE, NONE),
895 MFP_XWAY(GPIO8, GPIO, CGU, GPHY, EPHY),
901 MFP_XWAY(GPIO14, GPIO, CGU, USIF, EPHY),
1049 GRP_MUX("clkout2", CGU, xrx300_pins_clkout2),
1086 {"cgu", ARRAY_AND_SIZE(xrx300_cgu_grps)},
1095 /* --------- pinconf related code --------- */
1112 !gpio_getbit(info->membase[0], reg, PORT_PIN(pin))); in xway_pinconf_get()
1120 if (!gpio_getbit(info->membase[0], reg, PORT_PIN(pin))) { in xway_pinconf_get()
1129 if (!gpio_getbit(info->membase[0], reg, PORT_PIN(pin))) in xway_pinconf_get()
1138 gpio_getbit(info->membase[0], reg, PORT_PIN(pin))); in xway_pinconf_get()
1141 dev_err(pctldev->dev, "Invalid config param %04x\n", param); in xway_pinconf_get()
1142 return -ENOTSUPP; in xway_pinconf_get()
1170 gpio_setbit(info->membase[0], in xway_pinconf_set()
1174 gpio_clearbit(info->membase[0], in xway_pinconf_set()
1185 gpio_clearbit(info->membase[0], in xway_pinconf_set()
1190 gpio_setbit(info->membase[0], reg, PORT_PIN(pin)); in xway_pinconf_set()
1197 gpio_clearbit(info->membase[0], in xway_pinconf_set()
1201 gpio_setbit(info->membase[0], in xway_pinconf_set()
1205 dev_err(pctldev->dev, in xway_pinconf_set()
1212 gpio_clearbit(info->membase[0], in xway_pinconf_set()
1216 gpio_setbit(info->membase[0], in xway_pinconf_set()
1222 dev_err(pctldev->dev, in xway_pinconf_set()
1224 return -ENOTSUPP; in xway_pinconf_set()
1239 for (i = 0; i < info->grps[selector].npins && !ret; i++) in xway_pinconf_group_set()
1241 info->grps[selector].pins[i], in xway_pinconf_group_set()
1270 gpio_setbit(info->membase[0], GPIO_ALT0(pin), PORT_PIN(pin)); in xway_mux_apply()
1272 gpio_clearbit(info->membase[0], GPIO_ALT0(pin), PORT_PIN(pin)); in xway_mux_apply()
1275 gpio_setbit(info->membase[0], alt1_reg, PORT_PIN(pin)); in xway_mux_apply()
1277 gpio_clearbit(info->membase[0], alt1_reg, PORT_PIN(pin)); in xway_mux_apply()
1284 {"lantiq,open-drain", LTQ_PINCONF_PARAM_OPEN_DRAIN},
1295 /* --------- gpio_chip related code --------- */
1298 struct ltq_pinmux_info *info = dev_get_drvdata(chip->parent); in xway_gpio_set()
1301 gpio_setbit(info->membase[0], GPIO_OUT(pin), PORT_PIN(pin)); in xway_gpio_set()
1303 gpio_clearbit(info->membase[0], GPIO_OUT(pin), PORT_PIN(pin)); in xway_gpio_set()
1308 struct ltq_pinmux_info *info = dev_get_drvdata(chip->parent); in xway_gpio_get()
1310 return !!gpio_getbit(info->membase[0], GPIO_IN(pin), PORT_PIN(pin)); in xway_gpio_get()
1315 struct ltq_pinmux_info *info = dev_get_drvdata(chip->parent); in xway_gpio_dir_in()
1317 gpio_clearbit(info->membase[0], GPIO_DIR(pin), PORT_PIN(pin)); in xway_gpio_dir_in()
1324 struct ltq_pinmux_info *info = dev_get_drvdata(chip->parent); in xway_gpio_dir_out()
1327 gpio_setbit(info->membase[0], GPIO3_OD, PORT_PIN(pin)); in xway_gpio_dir_out()
1329 gpio_setbit(info->membase[0], GPIO_OD(pin), PORT_PIN(pin)); in xway_gpio_dir_out()
1330 gpio_setbit(info->membase[0], GPIO_DIR(pin), PORT_PIN(pin)); in xway_gpio_dir_out()
1342 struct ltq_pinmux_info *info = dev_get_drvdata(chip->parent); in xway_gpio_to_irq()
1345 for (i = 0; i < info->num_exin; i++) in xway_gpio_to_irq()
1346 if (info->exin[i] == offset) in xway_gpio_to_irq()
1349 return -1; in xway_gpio_to_irq()
1353 .label = "gpio-xway",
1361 .base = -1,
1365 /* --------- register the pinctrl layer --------- */
1377 /* XWAY AMAZON Family */
1389 /* XWAY DANUBE Family */
1401 /* XWAY xRX100 Family */
1413 /* XWAY xRX200 Family */
1425 /* XWAY xRX300 Family */
1438 .name = "XWAY GPIO",
1443 { .compatible = "lantiq,ase-pinctrl", .data = &ase_pinctrl},
1444 { .compatible = "lantiq,danube-pinctrl", .data = &danube_pinctrl},
1445 { .compatible = "lantiq,xrx100-pinctrl", .data = &xrx100_pinctrl},
1446 { .compatible = "lantiq,xrx200-pinctrl", .data = &xrx200_pinctrl},
1447 { .compatible = "lantiq,xrx300-pinctrl", .data = &xrx300_pinctrl},
1463 match = of_match_device(xway_match, &pdev->dev); in pinmux_xway_probe()
1465 xway_soc = (const struct pinctrl_xway_soc *) match->data; in pinmux_xway_probe()
1470 xway_chip.ngpio = xway_soc->pin_count; in pinmux_xway_probe()
1473 xway_info.pads = devm_kcalloc(&pdev->dev, in pinmux_xway_probe()
1477 return -ENOMEM; in pinmux_xway_probe()
1480 char *name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "io%d", i); in pinmux_xway_probe()
1483 return -ENOMEM; in pinmux_xway_probe()
1491 xway_pctrl_desc.name = dev_name(&pdev->dev); in pinmux_xway_probe()
1496 xway_info.mfp = xway_soc->mfp; in pinmux_xway_probe()
1497 xway_info.grps = xway_soc->grps; in pinmux_xway_probe()
1498 xway_info.num_grps = xway_soc->num_grps; in pinmux_xway_probe()
1499 xway_info.funcs = xway_soc->funcs; in pinmux_xway_probe()
1500 xway_info.num_funcs = xway_soc->num_funcs; in pinmux_xway_probe()
1501 xway_info.exin = xway_soc->exin; in pinmux_xway_probe()
1502 xway_info.num_exin = xway_soc->num_exin; in pinmux_xway_probe()
1507 dev_err(&pdev->dev, "Failed to register pinctrl driver\n"); in pinmux_xway_probe()
1512 xway_chip.parent = &pdev->dev; in pinmux_xway_probe()
1514 ret = devm_gpiochip_add_data(&pdev->dev, &xway_chip, NULL); in pinmux_xway_probe()
1516 dev_err(&pdev->dev, "Failed to register gpio chip\n"); in pinmux_xway_probe()
1521 * For DeviceTree-supported systems, the gpio core checks the in pinmux_xway_probe()
1522 * pinctrl's device node for the "gpio-ranges" property. in pinmux_xway_probe()
1527 * files which don't set the "gpio-ranges" property or systems that in pinmux_xway_probe()
1530 if (!of_property_read_bool(pdev->dev.of_node, "gpio-ranges")) { in pinmux_xway_probe()
1537 dev_info(&pdev->dev, "Init done\n"); in pinmux_xway_probe()
1544 .name = "pinctrl-xway",