Lines Matching +full:one +full:- +full:to +full:- +full:one
1 // SPDX-License-Identifier: GPL-2.0+
3 * SC16IS7xx tty serial driver - Copyright (C) 2014 GridPoint
47 * - only on 75x/76x
50 * - only on 75x/76x
53 * - only on 75x/76x
56 * - only on 75x/76x
84 /* IER register bits - write only if (EFR[4] == 1) */
97 /* FCR register bits - write only if (EFR[4] == 1) */
107 #define SC16IS7XX_IIR_RTOI_SRC 0x0c /* RX time-out interrupt */
109 * - only on 75x/76x
112 * - only on 75x/76x
117 * to inactive (HIGH)
124 * 00 -> 5 bit words
125 * 01 -> 6 bit words
126 * 10 -> 7 bit words
127 * 11 -> 8 bit words
132 * 0 -> 1 stop bit
133 * 1 -> 1-1.5 stop bits if
139 #define SC16IS7XX_LCR_FORCEPARITY_BIT (1 << 5) /* 9-bit multidrop parity */
153 * - only on 75x/76x
159 * - write enabled
163 * - write enabled
167 * - write enabled
183 #define SC16IS7XX_MSR_DCTS_BIT (1 << 0) /* Delta CTS Clear To Send */
186 * - only on 75x/76x
190 * - only on 75x/76x
194 * - only on 75x/76x
198 * - only on 75x/76x
201 * - only on 75x/76x
204 * - only on 75x/76x
210 * TCR trigger levels are available from 0 to 60 characters with a granularity
213 * no built-in hardware check to make sure this condition is met. Also, the TCR
215 * control is enabled to avoid spurious operation of the device.
224 * trigger levels. Trigger levels from 4 characters to 60 characters are
228 * trigger level setting defined in FCR. If TLR has non-zero trigger level value
229 * the trigger level defined in FCR is discarded. This applies to both transmit
245 #define SC16IS7XX_EFCR_9BIT_MODE_BIT (1 << 0) /* Enable 9-bit or Multidrop
253 * - Only 750/760
255 * - Only 760
263 * and writing to IER[7:4],
270 * 00 -> no transmitter flow
272 * 01 -> transmitter generates
274 * 10 -> transmitter generates
276 * 11 -> transmitter generates
284 * 00 -> no received flow
286 * 01 -> receiver compares
288 * 10 -> receiver compares
290 * 11 -> receiver compares
366 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_port_read() local
369 regmap_read(one->regmap, reg, &val); in sc16is7xx_port_read()
376 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_port_write() local
378 regmap_write(one->regmap, reg, val); in sc16is7xx_port_write()
383 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_fifo_read()
384 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_fifo_read() local
386 regmap_noinc_read(one->regmap, SC16IS7XX_RHR_REG, s->buf, rxlen); in sc16is7xx_fifo_read()
391 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_fifo_write()
392 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_fifo_write() local
395 * Don't send zero-length data, at least on SPI it confuses the chip in sc16is7xx_fifo_write()
401 regmap_noinc_write(one->regmap, SC16IS7XX_THR_REG, s->buf, to_send); in sc16is7xx_fifo_write()
407 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_port_update() local
409 regmap_update_bits(one->regmap, reg, mask, val); in sc16is7xx_port_update()
487 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_set_baud() local
490 unsigned long clk = port->uartclk, div = clk / 16 / baud; in sc16is7xx_set_baud()
499 * switched in by writing a magic value (0xbf) to the Line Control in sc16is7xx_set_baud()
501 * where it expects the IIR to be, leading to "Unexpected interrupt" in sc16is7xx_set_baud()
506 * This is similar to disabling the interrupt, but that doesn't work in sc16is7xx_set_baud()
510 mutex_lock(&one->efr_lock); in sc16is7xx_set_baud()
519 regcache_cache_bypass(one->regmap, true); in sc16is7xx_set_baud()
524 regcache_cache_bypass(one->regmap, false); in sc16is7xx_set_baud()
526 /* Put LCR back to the normal mode */ in sc16is7xx_set_baud()
529 mutex_unlock(&one->efr_lock); in sc16is7xx_set_baud()
540 regcache_cache_bypass(one->regmap, true); in sc16is7xx_set_baud()
543 regcache_cache_bypass(one->regmap, false); in sc16is7xx_set_baud()
545 /* Put LCR back to the normal mode */ in sc16is7xx_set_baud()
554 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_handle_rx()
559 if (unlikely(rxlen >= sizeof(s->buf))) { in sc16is7xx_handle_rx()
560 dev_warn_ratelimited(port->dev, in sc16is7xx_handle_rx()
562 port->line, rxlen); in sc16is7xx_handle_rx()
563 port->icount.buf_overrun++; in sc16is7xx_handle_rx()
565 rxlen = sizeof(s->buf); in sc16is7xx_handle_rx()
578 s->buf[0] = sc16is7xx_port_read(port, SC16IS7XX_RHR_REG); in sc16is7xx_handle_rx()
587 port->icount.rx++; in sc16is7xx_handle_rx()
592 port->icount.brk++; in sc16is7xx_handle_rx()
596 port->icount.parity++; in sc16is7xx_handle_rx()
598 port->icount.frame++; in sc16is7xx_handle_rx()
600 port->icount.overrun++; in sc16is7xx_handle_rx()
602 lsr &= port->read_status_mask; in sc16is7xx_handle_rx()
614 ch = s->buf[i]; in sc16is7xx_handle_rx()
618 if (lsr & port->ignore_status_mask) in sc16is7xx_handle_rx()
624 rxlen -= bytes_read; in sc16is7xx_handle_rx()
627 tty_flip_buffer_push(&port->state->port); in sc16is7xx_handle_rx()
632 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_handle_tx()
633 struct circ_buf *xmit = &port->state->xmit; in sc16is7xx_handle_tx()
637 if (unlikely(port->x_char)) { in sc16is7xx_handle_tx()
638 sc16is7xx_port_write(port, SC16IS7XX_THR_REG, port->x_char); in sc16is7xx_handle_tx()
639 port->icount.tx++; in sc16is7xx_handle_tx()
640 port->x_char = 0; in sc16is7xx_handle_tx()
654 /* Limit to size of TX FIFO */ in sc16is7xx_handle_tx()
657 dev_err_ratelimited(port->dev, in sc16is7xx_handle_tx()
664 /* Convert to linear buffer */ in sc16is7xx_handle_tx()
666 s->buf[i] = xmit->buf[xmit->tail]; in sc16is7xx_handle_tx()
696 static void sc16is7xx_update_mlines(struct sc16is7xx_one *one) in sc16is7xx_update_mlines() argument
698 struct uart_port *port = &one->port; in sc16is7xx_update_mlines()
702 lockdep_assert_held_once(&one->efr_lock); in sc16is7xx_update_mlines()
705 changed = status ^ one->old_mctrl; in sc16is7xx_update_mlines()
710 one->old_mctrl = status; in sc16is7xx_update_mlines()
714 port->icount.rng++; in sc16is7xx_update_mlines()
716 port->icount.dsr++; in sc16is7xx_update_mlines()
722 wake_up_interruptible(&port->state->port.delta_msr_wait); in sc16is7xx_update_mlines()
730 struct uart_port *port = &s->p[portno].port; in sc16is7xx_port_irq()
731 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_port_irq() local
733 mutex_lock(&one->efr_lock); in sc16is7xx_port_irq()
752 * time-out interrupt but no data in the FIFO. This is in sc16is7xx_port_irq()
755 * When this happens, read one byte from the FIFO to in sc16is7xx_port_irq()
767 sc16is7xx_update_mlines(one); in sc16is7xx_port_irq()
773 dev_err_ratelimited(port->dev, in sc16is7xx_port_irq()
775 port->line, iir); in sc16is7xx_port_irq()
780 mutex_unlock(&one->efr_lock); in sc16is7xx_port_irq()
796 for (i = 0; i < s->devtype->nr_uart; ++i) in sc16is7xx_irq()
805 struct uart_port *port = &(to_sc16is7xx_one(ws, tx_work)->port); in sc16is7xx_tx_proc()
806 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_tx_proc() local
808 if ((port->rs485.flags & SER_RS485_ENABLED) && in sc16is7xx_tx_proc()
809 (port->rs485.delay_rts_before_send > 0)) in sc16is7xx_tx_proc()
810 msleep(port->rs485.delay_rts_before_send); in sc16is7xx_tx_proc()
812 mutex_lock(&one->efr_lock); in sc16is7xx_tx_proc()
814 mutex_unlock(&one->efr_lock); in sc16is7xx_tx_proc()
822 struct serial_rs485 *rs485 = &port->rs485; in sc16is7xx_reconf_rs485()
826 if (rs485->flags & SER_RS485_ENABLED) { in sc16is7xx_reconf_rs485()
829 if (rs485->flags & SER_RS485_RTS_AFTER_SEND) in sc16is7xx_reconf_rs485()
839 struct sc16is7xx_one *one = to_sc16is7xx_one(ws, reg_work); in sc16is7xx_reg_proc() local
843 uart_port_lock_irqsave(&one->port, &irqflags); in sc16is7xx_reg_proc()
844 config = one->config; in sc16is7xx_reg_proc()
845 memset(&one->config, 0, sizeof(one->config)); in sc16is7xx_reg_proc()
846 uart_port_unlock_irqrestore(&one->port, irqflags); in sc16is7xx_reg_proc()
852 if (one->port.mctrl & TIOCM_RTS) in sc16is7xx_reg_proc()
855 if (one->port.mctrl & TIOCM_DTR) in sc16is7xx_reg_proc()
858 if (one->port.mctrl & TIOCM_LOOP) in sc16is7xx_reg_proc()
860 sc16is7xx_port_update(&one->port, SC16IS7XX_MCR_REG, in sc16is7xx_reg_proc()
868 sc16is7xx_port_update(&one->port, SC16IS7XX_IER_REG, in sc16is7xx_reg_proc()
872 sc16is7xx_reconf_rs485(&one->port); in sc16is7xx_reg_proc()
877 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_ier_clear()
878 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_ier_clear() local
880 lockdep_assert_held_once(&port->lock); in sc16is7xx_ier_clear()
882 one->config.flags |= SC16IS7XX_RECONF_IER; in sc16is7xx_ier_clear()
883 one->config.ier_mask |= bit; in sc16is7xx_ier_clear()
884 one->config.ier_val &= ~bit; in sc16is7xx_ier_clear()
885 kthread_queue_work(&s->kworker, &one->reg_work); in sc16is7xx_ier_clear()
890 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_ier_set()
891 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_ier_set() local
893 lockdep_assert_held_once(&port->lock); in sc16is7xx_ier_set()
895 one->config.flags |= SC16IS7XX_RECONF_IER; in sc16is7xx_ier_set()
896 one->config.ier_mask |= bit; in sc16is7xx_ier_set()
897 one->config.ier_val |= bit; in sc16is7xx_ier_set()
898 kthread_queue_work(&s->kworker, &one->reg_work); in sc16is7xx_ier_set()
913 struct sc16is7xx_one *one = to_sc16is7xx_one(ws, ms_work.work); in sc16is7xx_ms_proc() local
914 struct sc16is7xx_port *s = dev_get_drvdata(one->port.dev); in sc16is7xx_ms_proc()
916 if (one->port.state) { in sc16is7xx_ms_proc()
917 mutex_lock(&one->efr_lock); in sc16is7xx_ms_proc()
918 sc16is7xx_update_mlines(one); in sc16is7xx_ms_proc()
919 mutex_unlock(&one->efr_lock); in sc16is7xx_ms_proc()
921 kthread_queue_delayed_work(&s->kworker, &one->ms_work, HZ); in sc16is7xx_ms_proc()
927 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_enable_ms() local
928 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_enable_ms()
930 lockdep_assert_held_once(&port->lock); in sc16is7xx_enable_ms()
932 kthread_queue_delayed_work(&s->kworker, &one->ms_work, 0); in sc16is7xx_enable_ms()
937 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_start_tx()
938 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_start_tx() local
940 kthread_queue_work(&s->kworker, &one->tx_work); in sc16is7xx_start_tx()
950 * AutoRTS feature will de-activate RTS output. in sc16is7xx_throttle()
977 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_get_mctrl() local
980 return one->old_mctrl; in sc16is7xx_get_mctrl()
985 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_set_mctrl()
986 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_set_mctrl() local
988 one->config.flags |= SC16IS7XX_RECONF_MD; in sc16is7xx_set_mctrl()
989 kthread_queue_work(&s->kworker, &one->reg_work); in sc16is7xx_set_mctrl()
1003 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_set_termios() local
1008 kthread_cancel_delayed_work_sync(&one->ms_work); in sc16is7xx_set_termios()
1011 termios->c_cflag &= ~CMSPAR; in sc16is7xx_set_termios()
1014 switch (termios->c_cflag & CSIZE) { in sc16is7xx_set_termios()
1029 termios->c_cflag &= ~CSIZE; in sc16is7xx_set_termios()
1030 termios->c_cflag |= CS8; in sc16is7xx_set_termios()
1035 if (termios->c_cflag & PARENB) { in sc16is7xx_set_termios()
1037 if (!(termios->c_cflag & PARODD)) in sc16is7xx_set_termios()
1042 if (termios->c_cflag & CSTOPB) in sc16is7xx_set_termios()
1046 port->read_status_mask = SC16IS7XX_LSR_OE_BIT; in sc16is7xx_set_termios()
1047 if (termios->c_iflag & INPCK) in sc16is7xx_set_termios()
1048 port->read_status_mask |= SC16IS7XX_LSR_PE_BIT | in sc16is7xx_set_termios()
1050 if (termios->c_iflag & (BRKINT | PARMRK)) in sc16is7xx_set_termios()
1051 port->read_status_mask |= SC16IS7XX_LSR_BI_BIT; in sc16is7xx_set_termios()
1054 port->ignore_status_mask = 0; in sc16is7xx_set_termios()
1055 if (termios->c_iflag & IGNBRK) in sc16is7xx_set_termios()
1056 port->ignore_status_mask |= SC16IS7XX_LSR_BI_BIT; in sc16is7xx_set_termios()
1057 if (!(termios->c_cflag & CREAD)) in sc16is7xx_set_termios()
1058 port->ignore_status_mask |= SC16IS7XX_LSR_BRK_ERROR_MASK; in sc16is7xx_set_termios()
1061 mutex_lock(&one->efr_lock); in sc16is7xx_set_termios()
1067 regcache_cache_bypass(one->regmap, true); in sc16is7xx_set_termios()
1068 sc16is7xx_port_write(port, SC16IS7XX_XON1_REG, termios->c_cc[VSTART]); in sc16is7xx_set_termios()
1069 sc16is7xx_port_write(port, SC16IS7XX_XOFF1_REG, termios->c_cc[VSTOP]); in sc16is7xx_set_termios()
1071 port->status &= ~(UPSTAT_AUTOCTS | UPSTAT_AUTORTS); in sc16is7xx_set_termios()
1072 if (termios->c_cflag & CRTSCTS) { in sc16is7xx_set_termios()
1075 port->status |= UPSTAT_AUTOCTS | UPSTAT_AUTORTS; in sc16is7xx_set_termios()
1077 if (termios->c_iflag & IXON) in sc16is7xx_set_termios()
1079 if (termios->c_iflag & IXOFF) in sc16is7xx_set_termios()
1086 regcache_cache_bypass(one->regmap, false); in sc16is7xx_set_termios()
1091 mutex_unlock(&one->efr_lock); in sc16is7xx_set_termios()
1095 port->uartclk / 16 / 4 / 0xffff, in sc16is7xx_set_termios()
1096 port->uartclk / 16); in sc16is7xx_set_termios()
1103 /* Update timeout according to new baud rate */ in sc16is7xx_set_termios()
1104 uart_update_timeout(port, termios->c_cflag, baud); in sc16is7xx_set_termios()
1106 if (UART_ENABLE_MS(port, termios->c_cflag)) in sc16is7xx_set_termios()
1115 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_config_rs485()
1116 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_config_rs485() local
1118 if (rs485->flags & SER_RS485_ENABLED) { in sc16is7xx_config_rs485()
1121 * However, it's sometimes useful to delay TX even without RTS in sc16is7xx_config_rs485()
1122 * control therefore we try to handle .delay_rts_before_send. in sc16is7xx_config_rs485()
1124 if (rs485->delay_rts_after_send) in sc16is7xx_config_rs485()
1125 return -EINVAL; in sc16is7xx_config_rs485()
1128 one->config.flags |= SC16IS7XX_RECONF_RS485; in sc16is7xx_config_rs485()
1129 kthread_queue_work(&s->kworker, &one->reg_work); in sc16is7xx_config_rs485()
1136 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_startup() local
1153 regcache_cache_bypass(one->regmap, true); in sc16is7xx_startup()
1155 /* Enable write access to enhanced features and internal clock div */ in sc16is7xx_startup()
1171 regcache_cache_bypass(one->regmap, false); in sc16is7xx_startup()
1180 one->irda_mode ? in sc16is7xx_startup()
1204 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_shutdown()
1205 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_shutdown() local
1207 kthread_cancel_delayed_work_sync(&one->ms_work); in sc16is7xx_shutdown()
1220 kthread_flush_worker(&s->kworker); in sc16is7xx_shutdown()
1225 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_type()
1227 return (port->type == PORT_SC16IS7XX) ? s->devtype->name : NULL; in sc16is7xx_type()
1239 port->type = PORT_SC16IS7XX; in sc16is7xx_config_port()
1245 if ((s->type != PORT_UNKNOWN) && (s->type != PORT_SC16IS7XX)) in sc16is7xx_verify_port()
1246 return -EINVAL; in sc16is7xx_verify_port()
1247 if (s->irq != port->irq) in sc16is7xx_verify_port()
1248 return -EINVAL; in sc16is7xx_verify_port()
1291 struct uart_port *port = &s->p[0].port; in sc16is7xx_gpio_get()
1301 struct uart_port *port = &s->p[0].port; in sc16is7xx_gpio_set()
1311 struct uart_port *port = &s->p[0].port; in sc16is7xx_gpio_direction_input()
1322 struct uart_port *port = &s->p[0].port; in sc16is7xx_gpio_direction_output()
1332 * transferred to the corresponding I/O pin. in sc16is7xx_gpio_direction_output()
1333 * The datasheet states that each register bit will be transferred to in sc16is7xx_gpio_direction_output()
1334 * the corresponding I/O pin programmed as output when writing to in sc16is7xx_gpio_direction_output()
1351 *valid_mask = s->gpio_valid_mask; in sc16is7xx_gpio_init_valid_mask()
1358 struct device *dev = s->p[0].port.dev; in sc16is7xx_setup_gpio_chip()
1360 if (!s->devtype->nr_gpio) in sc16is7xx_setup_gpio_chip()
1363 switch (s->mctrl_mask) { in sc16is7xx_setup_gpio_chip()
1365 s->gpio_valid_mask = GENMASK(7, 0); in sc16is7xx_setup_gpio_chip()
1368 s->gpio_valid_mask = GENMASK(3, 0); in sc16is7xx_setup_gpio_chip()
1371 s->gpio_valid_mask = GENMASK(7, 4); in sc16is7xx_setup_gpio_chip()
1377 if (s->gpio_valid_mask == 0) in sc16is7xx_setup_gpio_chip()
1380 s->gpio.owner = THIS_MODULE; in sc16is7xx_setup_gpio_chip()
1381 s->gpio.parent = dev; in sc16is7xx_setup_gpio_chip()
1382 s->gpio.label = dev_name(dev); in sc16is7xx_setup_gpio_chip()
1383 s->gpio.init_valid_mask = sc16is7xx_gpio_init_valid_mask; in sc16is7xx_setup_gpio_chip()
1384 s->gpio.direction_input = sc16is7xx_gpio_direction_input; in sc16is7xx_setup_gpio_chip()
1385 s->gpio.get = sc16is7xx_gpio_get; in sc16is7xx_setup_gpio_chip()
1386 s->gpio.direction_output = sc16is7xx_gpio_direction_output; in sc16is7xx_setup_gpio_chip()
1387 s->gpio.set = sc16is7xx_gpio_set; in sc16is7xx_setup_gpio_chip()
1388 s->gpio.base = -1; in sc16is7xx_setup_gpio_chip()
1389 s->gpio.ngpio = s->devtype->nr_gpio; in sc16is7xx_setup_gpio_chip()
1390 s->gpio.can_sleep = 1; in sc16is7xx_setup_gpio_chip()
1392 return gpiochip_add_data(&s->gpio, s); in sc16is7xx_setup_gpio_chip()
1397 * Configure ports designated to operate as modem control lines.
1406 struct device *dev = s->p[0].port.dev; in sc16is7xx_setup_mctrl_ports()
1408 count = device_property_count_u32(dev, "nxp,modem-control-line-ports"); in sc16is7xx_setup_mctrl_ports()
1412 ret = device_property_read_u32_array(dev, "nxp,modem-control-line-ports", in sc16is7xx_setup_mctrl_ports()
1417 s->mctrl_mask = 0; in sc16is7xx_setup_mctrl_ports()
1422 s->mctrl_mask |= SC16IS7XX_IOCONTROL_MODEM_A_BIT; in sc16is7xx_setup_mctrl_ports()
1424 s->mctrl_mask |= SC16IS7XX_IOCONTROL_MODEM_B_BIT; in sc16is7xx_setup_mctrl_ports()
1427 if (s->mctrl_mask) in sc16is7xx_setup_mctrl_ports()
1432 SC16IS7XX_IOCONTROL_MODEM_B_BIT, s->mctrl_mask); in sc16is7xx_setup_mctrl_ports()
1440 .delay_rts_after_send = 1, /* Not supported but keep returning -EINVAL */
1453 for (i = 0; i < devtype->nr_uart; i++) in sc16is7xx_probe()
1459 * tell us if we are really connected to the correct device. in sc16is7xx_probe()
1460 * The best we can do is to check if communication is at all possible. in sc16is7xx_probe()
1462 * Note: regmap[0] is used in the probe function to access registers in sc16is7xx_probe()
1463 * common to all channels/ports, as it is guaranteed to be present on in sc16is7xx_probe()
1468 return -EPROBE_DEFER; in sc16is7xx_probe()
1471 s = devm_kzalloc(dev, struct_size(s, p, devtype->nr_uart), GFP_KERNEL); in sc16is7xx_probe()
1474 return -ENOMEM; in sc16is7xx_probe()
1478 device_property_read_u32(dev, "clock-frequency", &uartclk); in sc16is7xx_probe()
1480 s->clk = devm_clk_get_optional(dev, NULL); in sc16is7xx_probe()
1481 if (IS_ERR(s->clk)) in sc16is7xx_probe()
1482 return PTR_ERR(s->clk); in sc16is7xx_probe()
1484 ret = clk_prepare_enable(s->clk); in sc16is7xx_probe()
1488 freq = clk_get_rate(s->clk); in sc16is7xx_probe()
1497 return -EINVAL; in sc16is7xx_probe()
1500 s->devtype = devtype; in sc16is7xx_probe()
1503 kthread_init_worker(&s->kworker); in sc16is7xx_probe()
1504 s->kworker_task = kthread_run(kthread_worker_fn, &s->kworker, in sc16is7xx_probe()
1506 if (IS_ERR(s->kworker_task)) { in sc16is7xx_probe()
1507 ret = PTR_ERR(s->kworker_task); in sc16is7xx_probe()
1510 sched_set_fifo(s->kworker_task); in sc16is7xx_probe()
1516 for (i = 0; i < devtype->nr_uart; ++i) { in sc16is7xx_probe()
1517 s->p[i].port.line = find_first_zero_bit(&sc16is7xx_lines, in sc16is7xx_probe()
1519 if (s->p[i].port.line >= SC16IS7XX_MAX_DEVS) { in sc16is7xx_probe()
1520 ret = -ERANGE; in sc16is7xx_probe()
1525 s->p[i].port.dev = dev; in sc16is7xx_probe()
1526 s->p[i].port.irq = irq; in sc16is7xx_probe()
1527 s->p[i].port.type = PORT_SC16IS7XX; in sc16is7xx_probe()
1528 s->p[i].port.fifosize = SC16IS7XX_FIFO_SIZE; in sc16is7xx_probe()
1529 s->p[i].port.flags = UPF_FIXED_TYPE | UPF_LOW_LATENCY; in sc16is7xx_probe()
1530 s->p[i].port.iobase = i; in sc16is7xx_probe()
1532 * Use all ones as membase to make sure uart_configure_port() in in sc16is7xx_probe()
1536 s->p[i].port.membase = (void __iomem *)~0; in sc16is7xx_probe()
1537 s->p[i].port.iotype = UPIO_PORT; in sc16is7xx_probe()
1538 s->p[i].port.uartclk = freq; in sc16is7xx_probe()
1539 s->p[i].port.rs485_config = sc16is7xx_config_rs485; in sc16is7xx_probe()
1540 s->p[i].port.rs485_supported = sc16is7xx_rs485_supported; in sc16is7xx_probe()
1541 s->p[i].port.ops = &sc16is7xx_ops; in sc16is7xx_probe()
1542 s->p[i].old_mctrl = 0; in sc16is7xx_probe()
1543 s->p[i].regmap = regmaps[i]; in sc16is7xx_probe()
1545 mutex_init(&s->p[i].efr_lock); in sc16is7xx_probe()
1547 ret = uart_get_rs485_mode(&s->p[i].port); in sc16is7xx_probe()
1552 sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_IER_REG, 0); in sc16is7xx_probe()
1554 sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_EFCR_REG, in sc16is7xx_probe()
1559 kthread_init_work(&s->p[i].tx_work, sc16is7xx_tx_proc); in sc16is7xx_probe()
1560 kthread_init_work(&s->p[i].reg_work, sc16is7xx_reg_proc); in sc16is7xx_probe()
1561 kthread_init_delayed_work(&s->p[i].ms_work, sc16is7xx_ms_proc); in sc16is7xx_probe()
1564 ret = uart_add_one_port(&sc16is7xx_uart, &s->p[i].port); in sc16is7xx_probe()
1568 set_bit(s->p[i].port.line, &sc16is7xx_lines); in sc16is7xx_probe()
1571 sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_LCR_REG, in sc16is7xx_probe()
1576 /* Enable write access to enhanced features */ in sc16is7xx_probe()
1577 sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_EFR_REG, in sc16is7xx_probe()
1582 /* Restore access to general registers */ in sc16is7xx_probe()
1583 sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_LCR_REG, 0x00); in sc16is7xx_probe()
1585 /* Go to suspend mode */ in sc16is7xx_probe()
1586 sc16is7xx_power(&s->p[i].port, 0); in sc16is7xx_probe()
1589 if (dev->of_node) { in sc16is7xx_probe()
1594 of_property_for_each_u32(dev->of_node, "irda-mode-ports", in sc16is7xx_probe()
1596 if (u < devtype->nr_uart) in sc16is7xx_probe()
1597 s->p[u].irda_mode = true; in sc16is7xx_probe()
1611 * Setup interrupt. We first try to acquire the IRQ line as level IRQ. in sc16is7xx_probe()
1614 * back to a non-shared falling-edge trigger. in sc16is7xx_probe()
1630 if (s->gpio_valid_mask) in sc16is7xx_probe()
1631 gpiochip_remove(&s->gpio); in sc16is7xx_probe()
1635 for (i = 0; i < devtype->nr_uart; i++) in sc16is7xx_probe()
1636 if (test_and_clear_bit(s->p[i].port.line, &sc16is7xx_lines)) in sc16is7xx_probe()
1637 uart_remove_one_port(&sc16is7xx_uart, &s->p[i].port); in sc16is7xx_probe()
1639 kthread_stop(s->kworker_task); in sc16is7xx_probe()
1642 clk_disable_unprepare(s->clk); in sc16is7xx_probe()
1653 if (s->gpio_valid_mask) in sc16is7xx_remove()
1654 gpiochip_remove(&s->gpio); in sc16is7xx_remove()
1657 for (i = 0; i < s->devtype->nr_uart; i++) { in sc16is7xx_remove()
1658 kthread_cancel_delayed_work_sync(&s->p[i].ms_work); in sc16is7xx_remove()
1659 if (test_and_clear_bit(s->p[i].port.line, &sc16is7xx_lines)) in sc16is7xx_remove()
1660 uart_remove_one_port(&sc16is7xx_uart, &s->p[i].port); in sc16is7xx_remove()
1661 sc16is7xx_power(&s->p[i].port, 0); in sc16is7xx_remove()
1664 kthread_flush_worker(&s->kworker); in sc16is7xx_remove()
1665 kthread_stop(s->kworker_task); in sc16is7xx_remove()
1667 clk_disable_unprepare(s->clk); in sc16is7xx_remove()
1721 spi->bits_per_word = 8; in sc16is7xx_spi_probe()
1723 if ((spi->mode & SPI_MODE_X_MASK) != SPI_MODE_0) in sc16is7xx_spi_probe()
1724 return dev_err_probe(&spi->dev, -EINVAL, "Unsupported SPI mode\n"); in sc16is7xx_spi_probe()
1726 spi->mode = spi->mode ? : SPI_MODE_0; in sc16is7xx_spi_probe()
1727 spi->max_speed_hz = spi->max_speed_hz ? : 4 * HZ_PER_MHZ; in sc16is7xx_spi_probe()
1732 if (spi->dev.of_node) { in sc16is7xx_spi_probe()
1733 devtype = device_get_match_data(&spi->dev); in sc16is7xx_spi_probe()
1735 return -ENODEV; in sc16is7xx_spi_probe()
1739 devtype = (struct sc16is7xx_devtype *)id_entry->driver_data; in sc16is7xx_spi_probe()
1742 for (i = 0; i < devtype->nr_uart; i++) { in sc16is7xx_spi_probe()
1745 * If read_flag_mask is 0, the regmap code sets it to a default in sc16is7xx_spi_probe()
1755 return sc16is7xx_probe(&spi->dev, devtype, regmaps, spi->irq); in sc16is7xx_spi_probe()
1760 sc16is7xx_remove(&spi->dev); in sc16is7xx_spi_remove()
1797 if (i2c->dev.of_node) { in sc16is7xx_i2c_probe()
1798 devtype = device_get_match_data(&i2c->dev); in sc16is7xx_i2c_probe()
1800 return -ENODEV; in sc16is7xx_i2c_probe()
1802 devtype = (struct sc16is7xx_devtype *)id->driver_data; in sc16is7xx_i2c_probe()
1805 for (i = 0; i < devtype->nr_uart; i++) { in sc16is7xx_i2c_probe()
1812 return sc16is7xx_probe(&i2c->dev, devtype, regmaps, i2c->irq); in sc16is7xx_i2c_probe()
1817 sc16is7xx_remove(&client->dev); in sc16is7xx_i2c_remove()
1857 pr_err("failed to init sc16is7xx i2c --> %d\n", ret); in sc16is7xx_init()
1865 pr_err("failed to init sc16is7xx spi --> %d\n", ret); in sc16is7xx_init()