Lines Matching +full:clip +full:- +full:x +full:- +full:high
1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 1998-2000 Russell King
32 #define debug_printf(x...) do { } while (0) argument
80 #define PCI_BM_CTL_ENABLE 0x01 /* enable bus-master */
247 #define HOR_PHASE_SHIFT 0xc2 /* high 3 bits */
249 #define EXT_SRC_HEIGHT 0xc4 /* high 6 bits */
250 #define EXT_X_START 0xc5 /* ext->screen, 16 bits */
251 #define EXT_X_END 0xc7 /* ext->screen, 16 bits */
252 #define EXT_Y_START 0xc9 /* ext->screen, 16 bits */
253 #define EXT_Y_END 0xcb /* ext->screen, 16 bits */
256 #define EXT_DDA_X_INIT 0xd1 /* ext->screen 16 bits */
257 #define EXT_DDA_X_INC 0xd3 /* ext->screen 16 bits */
258 #define EXT_DDA_Y_INIT 0xd5 /* ext->screen 16 bits */
259 #define EXT_DDA_Y_INC 0xd7 /* ext->screen 16 bits */
264 #define EXT_VID_FMT_YUV422 0x00 /* formats - does this cause conversion? */
280 #define EXT_VID_DISP_CTL1_NOCLIP 0x04 /* do not clip to 16235,16240 */
299 #define VFAC_CTL1_CAPTURE 0x01 /* capture enable (only when VSYNC high)*/
328 #define CAP_MAP_WIDTH 0xed /* high 6 bits */
349 * Bus-master
360 #define BM_COUNT 0xbc090 /* read-only */
397 #define TV_CTL 0xbe4dc /* reflects a previous register- MVFCLR, MVPCLR etc P241*/
405 * Graphics Co-processor