Lines Matching +full:6 +full:- +full:11
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * rt5651.h -- RT5651 ALSA SoC audio driver
12 #include <dt-bindings/sound/rt5651.h>
19 /* I/O - Output */
23 /* I/O - Input */
28 /* I/O - ADC/DAC/DMIC */
35 /* Mixer - D-D */
48 /* Mixer - ADC */
53 /* Mixer - DAC */
72 /* Format - ADC/DAC */
82 /* Function - Analog */
99 /* Function - Digital */
182 #define RT5651_VOL_R_MUTE (0x1 << 6)
183 #define RT5651_VOL_R_SFT 6
200 #define RT5651_IN_DF2 (0x1 << 6)
201 #define RT5651_IN_SFT2 6
235 #define RT5651_SEL_DAC_L2 (0x1 << 11)
236 #define RT5651_IF2_DAC_L2 (0x1 << 11)
237 #define RT5651_IF1_DAC_L2 (0x0 << 11)
238 #define RT5651_SEL_DAC_L2_SFT 11
240 #define RT5651_IF2_DAC_R2 (0x1 << 11)
241 #define RT5651_IF1_DAC_R2 (0x0 << 11)
277 #define RT5651_STO1_ADC_2_SRC_MASK (0x1 << 11)
278 #define RT5651_STO1_ADC_2_SRC_SFT 11
279 #define RT5651_STO1_ADC_2_SRC_DMIC (0x0 << 11)
280 #define RT5651_STO1_ADC_2_SRC_DACMIXR (0x1 << 11)
281 #define RT5651_M_STO1_ADC_R1 (0x1 << 6)
282 #define RT5651_M_STO1_ADC_R1_SFT 6
295 #define RT5651_STO2_ADC_L2_SRC_MASK (0x1 << 11)
296 #define RT5651_STO2_ADC_L2_SRC_SFT 11
297 #define RT5651_STO2_ADC_L2_SRC_DMIC (0x0 << 11)
298 #define RT5651_STO2_ADC_L2_SRC_DACMIXR (0x1 << 11)
299 #define RT5651_M_STO2_ADC_R1 (0x1 << 6)
300 #define RT5651_M_STO2_ADC_R1_SFT 6
319 #define RT5651_M_IF1_DAC_R (0x1 << 6)
320 #define RT5651_M_IF1_DAC_R_SFT 6
329 #define RT5651_DAC_L2_STO_L_VOL_MASK (0x1 << 11)
330 #define RT5651_DAC_L2_STO_L_VOL_SFT 11
335 #define RT5651_M_DAC_R1_MIXR (0x1 << 6)
336 #define RT5651_M_DAC_R1_MIXR_SFT 6
355 #define RT5651_STO_DD_L2_VOL_MASK (0x1 << 11)
356 #define RT5651_STO_DD_L2_VOL_SFT 11
361 #define RT5651_M_STO_DD_R1 (0x1 << 6)
362 #define RT5651_M_STO_DD_R1_SFT 6
383 #define RT5651_M_STO_R_DAC_R (0x1 << 11)
384 #define RT5651_M_STO_R_DAC_R_SFT 11
414 #define RT5651_IF2_ADC_L_SEL_MASK (0x1 << 11)
415 #define RT5651_IF2_ADC_L_SEL_SFT 11
416 #define RT5651_IF2_ADC_L_SEL_TXDP (0x0 << 11)
417 #define RT5651_IF2_ADC_L_SEL_PASS (0x1 << 11)
428 #define RT5651_RXDP_SEL_MASK (0x3 << 6)
429 #define RT5651_RXDP_SEL_SFT 6
430 #define RT5651_RXDP_SEL_NOR (0x0 << 6)
431 #define RT5651_RXDP_SEL_L2R (0x1 << 6)
432 #define RT5651_RXDP_SEL_R2L (0x2 << 6)
433 #define RT5651_RXDP_SEL_SWAP (0x3 << 6)
478 #define RT5651_PDM_BUSY (0x1 << 6)
479 #define RT5651_PDM_BUSY_SFT 6
494 #define PT5631_PDM_CMD_EXE (0x1 << 11)
522 #define RT5651_M_IN2_L_RM_L (0x1 << 6)
523 #define RT5651_M_IN2_L_RM_L_SFT 6
550 #define RT5651_M_IN2_R_RM_R (0x1 << 6)
551 #define RT5651_M_IN2_R_RM_R_SFT 6
580 #define RT5651_G_OM_L_SM_L_MASK (0x3 << 6)
581 #define RT5651_G_OM_L_SM_L_SFT 6
602 #define RT5651_G_OM_R_SM_R_MASK (0x3 << 6)
603 #define RT5651_G_OM_R_SM_R_SFT 6
624 #define RT5651_M_BST1_SPM_L (0x1 << 11)
625 #define RT5651_M_BST1_SPM_L_SFT 11
632 #define RT5651_M_BST1_SPM_R (0x1 << 11)
633 #define RT5651_M_BST1_SPM_R_SFT 11
648 #define RT5651_M_BST1_MM (0x1 << 11)
649 #define RT5651_M_BST1_MM_SFT 11
672 #define RT5651_M_BST2_OM_L (0x1 << 6)
673 #define RT5651_M_BST2_OM_L_SFT 6
702 #define RT5651_M_BST2_OM_R (0x1 << 6)
703 #define RT5651_M_BST2_OM_R_SFT 6
722 #define RT5651_G_LOUTMIX_MASK (0x1 << 11)
723 #define RT5651_G_LOUTMIX_SFT 11
732 #define RT5651_PWR_DAC_R1 (0x1 << 11)
733 #define RT5651_PWR_DAC_R1_BIT 11
744 #define RT5651_PWR_DAC_STO1_F (0x1 << 11)
745 #define RT5651_PWR_DAC_STO1_F_BIT 11
760 #define RT5651_PWR_BG (0x1 << 11)
761 #define RT5651_PWR_BG_BIT 11
764 #define RT5651_PWR_HP_R (0x1 << 6)
765 #define RT5651_PWR_HP_R_BIT 6
787 #define RT5651_PWR_MB1 (0x1 << 11)
788 #define RT5651_PWR_MB1_BIT 11
809 #define RT5651_PWR_RM_L (0x1 << 11)
810 #define RT5651_PWR_RM_L_BIT 11
819 #define RT5651_PWR_HV_L (0x1 << 11)
820 #define RT5651_PWR_HV_L_BIT 11
829 #define RT5651_PWR_IN2_R (0x1 << 6)
830 #define RT5651_PWR_IN2_R_BIT 6
875 #define RT5651_I2S_BCLK_MS2_MASK (0x1 << 11)
876 #define RT5651_I2S_BCLK_MS2_SFT 11
877 #define RT5651_I2S_BCLK_MS2_32 (0x0 << 11)
878 #define RT5651_I2S_BCLK_MS2_64 (0x1 << 11)
903 #define RT5651_DAHPF_EN (0x1 << 11)
904 #define RT5651_DAHPF_EN_SFT 11
958 #define RT5651_TDM_I2S_CH2_SEL_MASK (0x3 << 6)
959 #define RT5651_TDM_I2S_CH2_SEL_SFT 6
960 #define RT5651_TDM_I2S_CH2_SEL_LR (0x0 << 6)
961 #define RT5651_TDM_I2S_CH2_SEL_RL (0x1 << 6)
962 #define RT5651_TDM_I2S_CH2_SEL_LL (0x2 << 6)
963 #define RT5651_TDM_I2S_CH2_SEL_RR (0x3 << 6)
996 #define RT5651_TDM_LRCK_PULSE_SEL_MASK (0x1 << 11)
997 #define RT5651_TDM_LRCK_PULSE_SEL_SFT 11
998 #define RT5651_TDM_LRCK_PULSE_SEL_BCLK (0x0 << 11)
999 #define RT5651_TDM_LRCK_PULSE_SEL_CH (0x1 << 11)
1012 #define RT5651_M_TDM2_R (0x1 << 6)
1013 #define RT5651_M_TDM2_R_SFT 6
1091 #define RT5651_PLL_M_BP (0x1 << 11)
1092 #define RT5651_PLL_M_BP_SFT 11
1103 #define RT5651_ASRC2_REF_MASK (0x1 << 11)
1104 #define RT5651_ASRC2_REF_SFT 11
1105 #define RT5651_ASRC2_REF_LRCK2 (0x0 << 11)
1106 #define RT5651_ASRC2_REF_LRCK1 (0x1 << 11)
1125 #define RT5651_ADC_M_MASK (0x1 << 11)
1126 #define RT5651_ADC_M_SFT 11
1127 #define RT5651_ADC_M_NOR (0x0 << 11)
1128 #define RT5651_ADC_M_ASRC (0x1 << 11)
1161 /*PLL tracking mode 6 (0x89) */
1202 #define RT5651_RSTN_MASK (0x1 << 6)
1203 #define RT5651_RSTN_SFT 6
1204 #define RT5651_RSTN_DIS (0x0 << 6)
1205 #define RT5651_RSTN_EN (0x1 << 6)
1240 #define RT5651_BPS_MASK (0x1 << 11)
1241 #define RT5651_BPS_SFT 11
1242 #define RT5651_BPS_DIS (0x0 << 11)
1243 #define RT5651_BPS_EN (0x1 << 11)
1258 #define RT5651_DIG_DP_MASK (0x1 << 6)
1259 #define RT5651_DIG_DP_SFT 6
1260 #define RT5651_DIG_DP_DIS (0x0 << 6)
1261 #define RT5651_DIG_DP_EN (0x1 << 6)
1280 #define RT5651_CP_FQ_96_KHZ 6
1284 #define RT5651_OSW_L_MASK (0x1 << 11)
1285 #define RT5651_OSW_L_SFT 11
1286 #define RT5651_OSW_L_DIS (0x0 << 11)
1287 #define RT5651_OSW_L_EN (0x1 << 11)
1297 #define RT5651_IB_HP_MASK (0x3 << 6)
1298 #define RT5651_IB_HP_SFT 6
1299 #define RT5651_IB_HP_125IL (0x0 << 6)
1300 #define RT5651_IB_HP_25IL (0x1 << 6)
1301 #define RT5651_IB_HP_5IL (0x2 << 6)
1302 #define RT5651_IB_HP_1IL (0x3 << 6)
1313 #define RT5651_MIC1_OVCD_MASK (0x1 << 11)
1314 #define RT5651_MIC1_OVCD_SFT 11
1315 #define RT5651_MIC1_OVCD_DIS (0x0 << 11)
1316 #define RT5651_MIC1_OVCD_EN (0x1 << 11)
1334 #define RT5651_JD_PU (0x1 << 11)
1335 #define RT5651_JD_PU_SFT 11
1378 #define RT5651_EQ_STA_HP2 (0x1 << 6)
1379 #define RT5651_EQ_STA_HP2_BIT 6
1402 #define RT5651_EQ_HPF2_MASK (0x1 << 6)
1403 #define RT5651_EQ_HPF2_SFT 6
1404 #define RT5651_EQ_HPF2_DIS (0x0 << 6)
1405 #define RT5651_EQ_HPF2_EN (0x1 << 6)
1483 #define RT5651_ALC_NG_MASK (0x1 << 6)
1484 #define RT5651_ALC_NG_SFT 6
1485 #define RT5651_ALC_NG_DIS (0x0 << 6)
1486 #define RT5651_ALC_NG_EN (0x1 << 6)
1504 #define RT5651_JD_HP_MASK (0x1 << 11)
1505 #define RT5651_JD_HP_SFT 11
1506 #define RT5651_JD_HP_DIS (0x0 << 11)
1507 #define RT5651_JD_HP_EN (0x1 << 11)
1524 #define RT5651_JD_SPR_TRG_MASK (0x1 << 6)
1525 #define RT5651_JD_SPR_TRG_SFT 6
1526 #define RT5651_JD_SPR_TRG_LO (0x0 << 6)
1527 #define RT5651_JD_SPR_TRG_HI (0x1 << 6)
1549 #define RT5651_JD3_INV (0x1 << 6)
1550 #define RT5651_JD3_INV_SFT 6
1561 #define RT5651_JD_P_MASK (0x1 << 11)
1562 #define RT5651_JD_P_SFT 11
1563 #define RT5651_JD_P_NOR (0x0 << 11)
1564 #define RT5651_JD_P_INV (0x1 << 11)
1571 #define RT5651_JD1_2_IRQ_EN (0x1 << 6)
1572 #define RT5651_JD1_2_IRQ_EN_SFT 6
1589 #define RT5651_MB1_OC_STKY_MASK (0x1 << 11)
1590 #define RT5651_MB1_OC_STKY_SFT 11
1591 #define RT5651_MB1_OC_STKY_DIS (0x0 << 11)
1592 #define RT5651_MB1_OC_STKY_EN (0x1 << 11)
1597 #define RT5651_MB2_OC_P_MASK (0x1 << 6)
1612 #define RT5651_STA_GP7 (0x1 << 11)
1613 #define RT5651_STA_GP7_BIT 11
1622 #define RT5651_STA_GP3 (0x1 << 6)
1623 #define RT5651_STA_GP3_BIT 6
1650 #define RT5651_GP6_PIN_MASK (0x1 << 6)
1651 #define RT5651_GP6_PIN_SFT 6
1652 #define RT5651_GP6_PIN_GPIO6 (0x0 << 6)
1653 #define RT5651_GP6_PIN_DMIC_SDA (0x1 << 6)
1680 #define RT5651_GP4_DR_MASK (0x1 << 11)
1681 #define RT5651_GP4_DR_SFT 11
1682 #define RT5651_GP4_DR_IN (0x0 << 11)
1683 #define RT5651_GP4_DR_OUT (0x1 << 11)
1700 #define RT5651_GP3_P_MASK (0x1 << 6)
1701 #define RT5651_GP3_P_SFT 6
1702 #define RT5651_GP3_P_NOR (0x0 << 6)
1703 #define RT5651_GP3_P_INV (0x1 << 6)
1738 #define RT5651_GP8_P_MASK (0x1 << 6)
1739 #define RT5651_GP8_P_SFT 6
1740 #define RT5651_GP8_P_NOR (0x0 << 6)
1741 #define RT5651_GP8_P_INV (0x1 << 6)
1794 #define RT5651_M_BB_HPF_R_MASK (0x1 << 6)
1795 #define RT5651_M_BB_HPF_R_SFT 6
1814 #define RT5651_M_MP3_ORG_L_MASK (0x1 << 6)
1815 #define RT5651_M_MP3_ORG_L_SFT 6
1842 #define RT5651_3D_1F_MIX_MASK (0x3 << 11)
1843 #define RT5651_3D_1F_MIX_SFT 11
1854 #define RT5651_M_3D_REVB_MASK (0x1 << 6)
1855 #define RT5651_M_3D_REVB_SFT 6
1866 #define RT5651_ZD_T_MASK (0x3 << 6)
1867 #define RT5651_ZD_T_SFT 6
1882 #define RT5651_SI_DAC_MASK (0x1 << 11)
1883 #define RT5651_SI_DAC_SFT 11
1884 #define RT5651_SI_DAC_AUTO (0x0 << 11)
1885 #define RT5651_SI_DAC_TEST (0x1 << 11)
1894 #define RT5651_HPD_RCV_MASK (0x7 << 6)
1895 #define RT5651_HPD_RCV_SFT 6
1931 #define RT5651_ZCD_DIG_MASK (0x1 << 11)
1932 #define RT5651_ZCD_DIG_SFT 11
1933 #define RT5651_ZCD_DIG_DIS (0x0 << 11)
1934 #define RT5651_ZCD_DIG_EN (0x1 << 11)
1942 #define RT5651_M_ZCD_OM_R (0x1 << 6)
2001 #define RT5651_HPF_FC_MASK (0x3f << 6)
2002 #define RT5651_HPF_FC_SFT 6
2015 #define RT5651_WND_WIND_MASK (0x1 << 13) /* Read-Only */
2017 #define RT5651_WND_STRONG_MASK (0x1 << 12) /* Read-Only */