Lines Matching +full:0 +full:x20010000
73 UINT32 g_loopCycle = 0xFFFFF;
75 UINT32 g_passResult = 0;
76 UINT32 g_failResult = 0;
80 UINT32 g_testTaskIdArray[LOSCFG_BASE_CORE_TSK_LIMIT] = {0};
81 UINT32 g_uwGetTickConsume = 0;
85 #define TST_RAMADDRSTART 0x20000000
86 #define TST_RAMADDREND 0x20010000
92 UINT32 swTmrCnt = 0; in SwtmrCountGetTest()
98 for (loop = 0; loop < LOSCFG_BASE_CORE_SWTMR_LIMIT; loop++, swTmrCB++) { in SwtmrCountGetTest()
116 UINT32 count = 0; in QueueUsedCountGet()
120 for (index = 0; index < LOSCFG_BASE_IPC_QUEUE_LIMIT; index++) { in QueueUsedCountGet()
128 for (index = 0; index < LOSCFG_BASE_IPC_STATIC_QUEUE_LIMIT; index++) { in QueueUsedCountGet()
145 UINT32 count = 0; in TaskUsedCountGet()
148 for (UINT32 index = 0; index < LOSCFG_BASE_CORE_TSK_LIMIT; index++) { in TaskUsedCountGet()
264 TSK_INIT_PARAM_S osTaskInitParam = { 0 }; in los_TestInit()
292 #define HWI_TRIG_BASE 0x20c20
293 #define HWI_CLEAN_TRI 0x20c20
296 #define HWI_TRIG_BASE 0xF8B31000
297 #define HWI_CLEAN_TRI (HWI_TRIG_BASE + 0x04)
298 #define HWI_MASK_IRQ (HWI_TRIG_BASE + 0x0c)
327 #define OS_NVIC_SETPEND 0xE000E200
328 #define OS_NVIC_CLRPEND 0xE000E280
340 #define OS_NVIC_CLRENA_BASE 0xE000E180
343 … *)(OS_NVIC_CLRENA_BASE + (((uwHwiNum) >> HWI_SHIFT_NUM) << HWI_BIT)) = 1 << ((uwHwiNum) & 0x1F); \
344 } while (0)