1 /* 2 * Copyright (c) 2023 Huawei Device Co., Ltd. 3 * Licensed under the Apache License, Version 2.0 (the "License"); 4 * you may not use this file except in compliance with the License. 5 * You may obtain a copy of the License at 6 * 7 * http://www.apache.org/licenses/LICENSE-2.0 8 * 9 * Unless required by applicable law or agreed to in writing, software 10 * distributed under the License is distributed on an "AS IS" BASIS, 11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 * See the License for the specific language governing permissions and 13 * limitations under the License. 14 */ 15 16 #ifndef MAPLEBE_INCLUDE_CG_AARCH64_AARCH64_OBJ_EMIT_H 17 #define MAPLEBE_INCLUDE_CG_AARCH64_AARCH64_OBJ_EMIT_H 18 19 #include "obj_emit.h" 20 #include "aarch64_insn.h" 21 #include "aarch64_cg.h" 22 23 namespace maplebe { 24 enum AArch64FixupKind { 25 kAArch64PCRelAdrImm21 = kFirstTargetFixupKind, 26 kAArch64PCRelAdrpImm21, 27 kAArch64LoadPCRelImm19, 28 kAArch64CondBranchPCRelImm19, 29 kAArch64UnCondBranchPCRelImm26, 30 kAArch64CompareBranchPCRelImm19, 31 kAArch64TestBranchPCRelImm14, 32 kAArch64CallPCRelImm26, 33 kAArch64AddPCRelLo12, 34 kAArch64LdrPCRelLo12, 35 }; 36 37 class AArch64ObjFuncEmitInfo : public ObjFuncEmitInfo { 38 public: AArch64ObjFuncEmitInfo(CGFunc & func,MemPool & memPool)39 AArch64ObjFuncEmitInfo(CGFunc &func, MemPool &memPool) : ObjFuncEmitInfo(func, memPool) {} 40 ~AArch64ObjFuncEmitInfo() = default; 41 void HandleLocalBranchFixup(const std::vector<uint32> &label2Offset, 42 const std::vector<uint32> &symbol2Offset) override; 43 }; 44 45 class AArch64ObjEmitter : public ObjEmitter { 46 public: AArch64ObjEmitter(CG & cg,const std::string & objFileName)47 AArch64ObjEmitter(CG &cg, const std::string &objFileName) : ObjEmitter(cg, objFileName) {} 48 ~AArch64ObjEmitter() = default; 49 EncodeInstruction(const Insn & insn,const std::vector<uint32> & label2Offset,ObjFuncEmitInfo & objFuncEmitInfo)50 void EncodeInstruction(const Insn &insn, const std::vector<uint32> &label2Offset, 51 ObjFuncEmitInfo &objFuncEmitInfo) override 52 { 53 uint32 binInsn = GetBinaryCodeForInsn(insn, label2Offset, objFuncEmitInfo); 54 objFuncEmitInfo.AppendTextData(binInsn, k4ByteSize); 55 if (insn.GetMachineOpcode() == MOP_xbl || insn.GetMachineOpcode() == MOP_xblr) { 56 if (insn.GetStackMap() == nullptr) { 57 return; 58 } 59 objFuncEmitInfo.RecordOffset2StackMapInfo(objFuncEmitInfo.GetTextDataSize(), 60 insn.GetStackMap()->GetReferenceMap().SerializeInfo(), 61 insn.GetStackMap()->GetDeoptInfo().SerializeInfo()); 62 } 63 } 64 GetInsnSize(const Insn & insn)65 uint32 GetInsnSize(const Insn &insn) const override 66 { 67 (void)insn; 68 return k4ByteSize; 69 } 70 CreateFuncEmitInfo(CGFunc & cgFunc)71 FuncEmitInfo &CreateFuncEmitInfo(CGFunc &cgFunc) 72 { 73 MemPool *memPool = cgFunc.GetCG()->GetMIRModule()->GetMemPool(); 74 AArch64ObjFuncEmitInfo *content = memPool->New<AArch64ObjFuncEmitInfo>(cgFunc, *memPool); 75 contents.insert(contents.begin() + cgFunc.GetFunction().GetPuidxOrigin(), content); 76 return *content; 77 } 78 79 void HandleTextSectionGlobalFixup() override; 80 void HandleTextSectionFixup(); 81 void AppendTextSectionData() override; 82 void AppendGlobalLabel() override; 83 void AppendSymsToSymTabSec() override; 84 void InitSections() override; 85 void LayoutSections() override; 86 void UpdateMachineAndFlags(FileHeader &header) override; 87 void EmitDataToDynamic(); 88 void EmitDataToHash(); 89 void EmitIntrinsicInsn(const Insn &insn, ObjFuncEmitInfo &objFuncEmitInfo) override; 90 void EmitSpinIntrinsicInsn(const Insn &insn, ObjFuncEmitInfo &objFuncEmitInfo) override; 91 92 uint32 GetBinaryCodeForInsn(const Insn &insn, const std::vector<uint32> &label2Offset, 93 ObjFuncEmitInfo &objFuncEmitInfo) const; 94 uint32 GetOpndMachineValue(const Operand &opnd) const; 95 uint32 GetAdrLabelOpndValue(const Insn &insn, const Operand &opnd, ObjFuncEmitInfo &objFuncEmitInfo) const; 96 uint32 GetLoadLiteralOpndValue(const Operand &opnd, ObjFuncEmitInfo &objFuncEmitInfo) const; 97 uint32 GetCondBranchOpndValue(const Operand &opnd, ObjFuncEmitInfo &objFuncEmitInfo) const; 98 uint32 GetUnCondBranchOpndValue(const Operand &opnd, const std::vector<uint32> &label2Offset, 99 ObjFuncEmitInfo &objFuncEmitInfo) const; 100 uint32 GetCallFuncOpndValue(const Operand &opnd, ObjFuncEmitInfo &objFuncEmitInfo) const; 101 uint32 GetTestBranchOpndValue(const Operand &opnd, ObjFuncEmitInfo &objFuncEmitInfo) const; 102 uint32 GetCompareBranchOpndValue(const Operand &opnd, ObjFuncEmitInfo &objFuncEmitInfo) const; 103 uint32 GetLo12LitrealOpndValue(MOperator mOp, const Operand &opnd, ObjFuncEmitInfo &objFuncEmitInfo) const; 104 void InsertNopInsn(ObjFuncEmitInfo &objFuncEmitInfo) const override; 105 106 private: 107 uint32 GenAddSubExtendRegInsn(const Insn &insn) const; 108 uint32 GenAddSubImmInsn(const Insn &insn) const; 109 uint32 GenAddSubShiftImmInsn(const Insn &insn) const; 110 uint32 GenAddSubRegInsn(const Insn &insn) const; 111 uint32 GenAddSubShiftRegInsn(const Insn &insn) const; 112 uint32 GenBitfieldInsn(const Insn &insn) const; 113 uint32 GenExtractInsn(const Insn &insn) const; 114 uint32 GenBranchImmInsn(const Insn &insn, const std::vector<uint32> &label2Offset, 115 ObjFuncEmitInfo &objFuncEmitInfo) const; 116 uint32 GenBranchRegInsn(const Insn &insn) const; 117 uint32 GenCompareBranchInsn(const Insn &insn, ObjFuncEmitInfo &objFuncEmitInfo) const; 118 uint32 GenCondCompareImmInsn(const Insn &insn) const; 119 uint32 GenCondCompareRegInsn(const Insn &insn) const; 120 uint32 GenConditionalSelectInsn(const Insn &insn) const; 121 uint32 GenDataProcess1SrcInsn(const Insn &insn) const; 122 uint32 GenDataProcess2SrcInsn(const Insn &insn) const; 123 uint32 GenDataProcess3SrcInsn(const Insn &insn) const; 124 uint32 GenFloatIntConversionsInsn(const Insn &insn) const; 125 uint32 GenFloatCompareInsn(const Insn &insn) const; 126 uint32 GenFloatDataProcessing1Insn(const Insn &insn) const; 127 uint32 GenFloatDataProcessing2Insn(const Insn &insn) const; 128 uint32 GenFloatImmInsn(const Insn &insn) const; 129 uint32 GenFloatCondSelectInsn(const Insn &insn) const; 130 uint32 GenLoadStoreModeLiteral(const Insn &insn, ObjFuncEmitInfo &objFuncEmitInfo) const; 131 uint32 GenLoadStoreModeBOi(const Insn &insn) const; 132 uint32 GenLoadStoreModeBOrX(const Insn &insn) const; 133 uint32 GenLoadStoreRegInsn(const Insn &insn, ObjFuncEmitInfo &objFuncEmitInfo) const; 134 uint32 GenLoadStoreARInsn(const Insn &insn) const; 135 uint32 GenLoadExclusiveInsn(const Insn &insn) const; 136 uint32 GenLoadExclusivePairInsn(const Insn &insn) const; 137 uint32 GenStoreExclusiveInsn(const Insn &insn) const; 138 uint32 GenStoreExclusivePairInsn(const Insn &insn) const; 139 uint32 GenLoadPairInsn(const Insn &insn) const; 140 uint32 GenStorePairInsn(const Insn &insn) const; 141 uint32 GenLoadStoreFloatInsn(const Insn &insn, ObjFuncEmitInfo &objFuncEmitInfo) const; 142 uint32 GenLoadPairFloatInsn(const Insn &insn) const; 143 uint32 GenStorePairFloatInsn(const Insn &insn) const; 144 uint32 GenLoadLiteralRegInsn(const Insn &insn, ObjFuncEmitInfo &objFuncEmitInfo) const; 145 uint32 GenLogicalRegInsn(const Insn &insn) const; 146 uint32 GenLogicalImmInsn(const Insn &insn) const; 147 uint32 GenMoveWideInsn(const Insn &insn) const; 148 uint32 GenPCRelAddrInsn(const Insn &insn, ObjFuncEmitInfo &objFuncEmitInfo) const; 149 uint32 GenAddPCRelAddrInsn(const Insn &insn, ObjFuncEmitInfo &objFuncEmitInfo) const; 150 uint32 GenSystemInsn(const Insn &insn) const; 151 uint32 GenTestBranchInsn(const Insn &insn, ObjFuncEmitInfo &objFuncEmitInfo) const; 152 uint32 GenCondBranchInsn(const Insn &insn, ObjFuncEmitInfo &objFuncEmitInfo) const; 153 uint32 GenMovReg(const Insn &insn) const; 154 uint32 GenMovImm(const Insn &insn) const; 155 uint32 EncodeLogicaImm(uint64 imm, uint32 size) const; 156 void HandleCallFixup(ObjFuncEmitInfo &objFuncEmitInfo, const Fixup &fixup); 157 void HandleAdrFixup(ObjFuncEmitInfo &objFuncEmitInfo, const Fixup &fixup); 158 void HandleLSDAFixup(ObjFuncEmitInfo &objFuncEmitInfo, const Fixup &fixup); 159 160 /* emit intrinsic insn */ 161 void EmitMCCStackMapCall(const Insn &insn, std::vector<uint32> &label2Offset, ObjFuncEmitInfo &objFuncEmitInfo); 162 void EmitEnv(const Insn &insn, std::vector<uint32> &label2Offset, ObjFuncEmitInfo &objFuncEmitInfo); 163 void EmitClinit(const Insn &insn, std::vector<uint32> &label2Offset, ObjFuncEmitInfo &objFuncEmitInfo); 164 void EmitCounter(const Insn &insn, std::vector<uint32> &label2Offset, ObjFuncEmitInfo &objFuncEmitInfo); 165 void EmitLazyLoad(const Insn &insn, std::vector<uint32> &label2Offset, ObjFuncEmitInfo &objFuncEmitInfo); 166 void EmitLazyLoadStatic(const Insn &insn, std::vector<uint32> &label2Offset, ObjFuncEmitInfo &objFuncEmitInfo); 167 void EmitAdrpLdr(const Insn &insn, std::vector<uint32> &label2Offset, ObjFuncEmitInfo &objFuncEmitInfo); 168 void EmitArrayClassCacheLoad(const Insn &insn, std::vector<uint32> &label2Offset, ObjFuncEmitInfo &objFuncEmitInfo); 169 void EmitClinitTail(const Insn &insn, std::vector<uint32> &label2Offset, ObjFuncEmitInfo &objFuncEmitInfo); 170 void EmitGetAndAddInt(const Insn &insn, std::vector<uint32> &label2Offset, ObjFuncEmitInfo &objFuncEmitInfo); 171 void EmitGetAndSetInt(const Insn &insn, std::vector<uint32> &label2Offset, ObjFuncEmitInfo &objFuncEmitInfo); 172 void EmitCompareAndSwapInt(const Insn &insn, std::vector<uint32> &label2Offset, ObjFuncEmitInfo &objFuncEmitInfo); 173 void EmitStringIndexOf(const Insn &insn, std::vector<uint32> &label2Offset, ObjFuncEmitInfo &objFuncEmitInfo); 174 void EmitStringIndexOf2(const Insn &insn, std::vector<uint32> &label2Offset, ObjFuncEmitInfo &objFuncEmitInfo); 175 void EmitStringIndexOf3(const Insn &insn, std::vector<uint32> &label2Offset, ObjFuncEmitInfo &objFuncEmitInfo); 176 void EmitCheckCastNoArray(const Insn &insn, std::vector<uint32> &label2Offset, ObjFuncEmitInfo &objFuncEmitInfo); 177 void EmitCheckCastIsAssignable(const Insn &insn, std::vector<uint32> &label2Offset, 178 ObjFuncEmitInfo &objFuncEmitInfo); 179 void EmitCheckCastNoSubIsAssignable(const Insn &insn, std::vector<uint32> &label2Offset, 180 ObjFuncEmitInfo &objFuncEmitInfo); 181 void EmitInstanceOfIsAssignable(const Insn &insn, std::vector<uint32> &label2Offset, 182 ObjFuncEmitInfo &objFuncEmitInfo); 183 void EmitInstanceOfNoSubIsAssignable(const Insn &insn, std::vector<uint32> &label2Offset, 184 ObjFuncEmitInfo &objFuncEmitInfo); 185 void EmitMovMovkri16(const Insn &insn, std::vector<uint32> &label2Offset, ObjFuncEmitInfo &objFuncEmitInfo); 186 void EmitMovMovk64ri16(const Insn &insn, std::vector<uint32> &label2Offset, ObjFuncEmitInfo &objFuncEmitInfo); 187 EmitInsn(MOperator mOp,Operand & opnd1,std::vector<uint32> & label2Offset,ObjFuncEmitInfo & objFuncEmitInfo)188 void EmitInsn(MOperator mOp, Operand &opnd1, std::vector<uint32> &label2Offset, ObjFuncEmitInfo &objFuncEmitInfo) 189 { 190 Insn &insn = objFuncEmitInfo.GetCGFunc().GetInsnBuilder()->BuildInsn(mOp, opnd1); 191 EncodeInstruction(insn, label2Offset, objFuncEmitInfo); 192 } 193 EmitInsn(MOperator mOp,Operand & opnd1,Operand & opnd2,std::vector<uint32> & label2Offset,ObjFuncEmitInfo & objFuncEmitInfo)194 void EmitInsn(MOperator mOp, Operand &opnd1, Operand &opnd2, std::vector<uint32> &label2Offset, 195 ObjFuncEmitInfo &objFuncEmitInfo) 196 { 197 Insn &insn = objFuncEmitInfo.GetCGFunc().GetInsnBuilder()->BuildInsn(mOp, opnd1, opnd2); 198 EncodeInstruction(insn, label2Offset, objFuncEmitInfo); 199 } 200 EmitInsn(MOperator mOp,Operand & opnd1,Operand & opnd2,Operand & opnd3,std::vector<uint32> & label2Offset,ObjFuncEmitInfo & objFuncEmitInfo)201 void EmitInsn(MOperator mOp, Operand &opnd1, Operand &opnd2, Operand &opnd3, std::vector<uint32> &label2Offset, 202 ObjFuncEmitInfo &objFuncEmitInfo) 203 { 204 Insn &insn = objFuncEmitInfo.GetCGFunc().GetInsnBuilder()->BuildInsn(mOp, opnd1, opnd2, opnd3); 205 EncodeInstruction(insn, label2Offset, objFuncEmitInfo); 206 } 207 }; 208 } /* namespace maplebe */ 209 210 #endif /* MAPLEBE_INCLUDE_CG_AARCH64_AARCH64_OBJ_EMIT_H */ 211