| /third_party/node/deps/npm/docs/content/using-npm/ |
| D | scripts.md | 107 #### [`npm cache add`](/commands/npm-cache)
111 #### [`npm ci`](/commands/npm-ci)
124 #### [`npm diff`](/commands/npm-diff)
128 #### [`npm install`](/commands/npm-install)
147 #### [`npm pack`](/commands/npm-pack)
153 #### [`npm publish`](/commands/npm-publish)
162 #### [`npm rebuild`](/commands/npm-rebuild)
172 #### [`npm restart`](/commands/npm-restart)
182 #### [`npm run <user defined>`](/commands/npm-run-script)
188 #### [`npm start`](/commands/npm-start)
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| /third_party/icu/icu4c/source/test/intltest/ |
| D | tscoll.h | 28 struct Order struct
53 Order *getOrders(CollationElementIterator &iter, int32_t &orderLength); argument
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| D | ssearch.cpp | 334 struct Order struct
350 const Order *get(int32_t index) const; argument
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| /third_party/typescript/tests/cases/conformance/salsa/ |
| D | enumMergeWithExpando.ts | 7 export enum Order { ASC, DESC } enum
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SDNodeDbgValue.h | 51 unsigned Order; variable
77 bool IsIndirect, DebugLoc DL, unsigned Order, in SDDbgValue()
147 unsigned Order; variable
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| D | ScheduleDAGSDNodes.cpp | 734 DenseMap<SDValue, unsigned> &VRBaseMap, unsigned Order) { in ProcessSDDbgValues()
764 unsigned Order = N->getIROrder(); in ProcessSourceNode() local
951 unsigned Order = Orders[i].first; in EmitSchedule() local
997 unsigned Order = InstrOrder.first; in EmitSchedule() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | RegAllocGreedy.cpp | 763 AllocationOrder &Order, in tryAssign()
810 AllocationOrder Order(VirtReg.reg, *VRM, RegClassInfo, Matrix); in canReassign() local
1022 unsigned RAGreedy::getCheapestEvicteeWeight(const AllocationOrder &Order, in getCheapestEvicteeWeight()
1107 AllocationOrder &Order, in tryEvict()
1486 const AllocationOrder &Order) { in splitCanCauseEvictionChain()
1546 const AllocationOrder &Order) { in splitCanCauseLocalSpill()
1584 const AllocationOrder &Order, in calcGlobalSplitCost()
1829 unsigned RAGreedy::tryRegionSplit(LiveInterval &VirtReg, AllocationOrder &Order, in tryRegionSplit()
1873 AllocationOrder &Order, in calculateRegionSplitCost()
2019 unsigned RAGreedy::tryBlockSplit(LiveInterval &VirtReg, AllocationOrder &Order, in tryBlockSplit()
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| D | AllocationOrder.h | 31 ArrayRef<MCPhysReg> Order; variable
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| D | LocalStackSlotAllocation.cpp | 59 unsigned Order; member in __anon565840880111::FrameRef
302 unsigned Order = 0; in insertFrameReferenceRegisters() local
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| D | RegAllocBasic.cpp | 262 AllocationOrder Order(VirtReg.reg, *VRM, RegClassInfo, Matrix); in selectOrSplit() local
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| D | BreakFalseDeps.cpp | 144 ArrayRef<MCPhysReg> Order = RegClassInfo.getOrder(OpRC); in pickBestRegisterForUndef() local
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| D | TargetRegisterInfo.cpp | 212 ArrayRef<MCPhysReg> Order = RC->getRawAllocationOrder(MF); in getAllocatableSetForRC() local
384 ArrayRef<MCPhysReg> Order, in getRegAllocationHints()
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| /third_party/lzma/CPP/7zip/Compress/ |
| D | PpmdEncoder.h | 21 int Order; member
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| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/ |
| D | IceIntrinsics.cpp | 32 bool Intrinsics::isMemoryOrderValid(IntrinsicID ID, uint64_t Order, in isMemoryOrderValid()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Support/ |
| D | DynamicLibrary.cpp | 76 void *LibLookup(const char *Symbol, DynamicLibrary::SearchOrdering Order) { in LibLookup()
91 void *Lookup(const char *Symbol, DynamicLibrary::SearchOrdering Order) { in Lookup()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.h | 1543 X86StoreSDNode(unsigned Opcode, unsigned Order, const DebugLoc &dl, in X86StoreSDNode()
1561 X86MaskedStoreSDNode(unsigned Opcode, unsigned Order, in X86MaskedStoreSDNode()
1579 TruncSStoreSDNode(unsigned Order, const DebugLoc &dl, in TruncSStoreSDNode()
1591 TruncUSStoreSDNode(unsigned Order, const DebugLoc &dl, in TruncUSStoreSDNode()
1603 MaskedTruncSStoreSDNode(unsigned Order, in MaskedTruncSStoreSDNode()
1616 MaskedTruncUSStoreSDNode(unsigned Order, in MaskedTruncUSStoreSDNode()
1631 X86MaskedGatherScatterSDNode(unsigned Opc, unsigned Order, in X86MaskedGatherScatterSDNode()
1649 X86MaskedGatherSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs, in X86MaskedGatherSDNode()
1663 X86MaskedScatterSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs, in X86MaskedScatterSDNode()
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| /third_party/python/Doc/library/ |
| D | struct.rst | 192 .. _format-characters:
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| D | SystemZRegisterInfo.cpp | 59 static void addHints(ArrayRef<MCPhysReg> Order, in addHints()
78 ArrayRef<MCPhysReg> Order, in getRegAllocationHints()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | RegisterClassInfo.h | 37 std::unique_ptr<MCPhysReg[]> Order; member
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| /third_party/lzma/CS/7zip/ |
| D | ICoder.cs | 95 Order, enumerator
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| /third_party/vk-gl-cts/external/vulkan-docs/src/chapters/ |
| D | primsrast.adoc | 526 [[primsrast-multisampling]]
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| /third_party/python/Doc/whatsnew/ |
| D | 3.6.rst | 564 .. _whatsnew36-pep468:
578 .. _whatsnew36-compactdict:
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| /third_party/jsframework/runtime/main/extend/systemplugin/napi/ |
| D | ohos_update.js | 269 Order, property
339 const Order = { variable
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/IR/ |
| D | Instructions.h | 228 AtomicOrdering Order, SyncScope::ID SSID, BasicBlock *InsertAtEnd) in LoadInst()
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| /third_party/lzma/CPP/7zip/UI/Common/ |
| D | ZipRegistry.h | 85 UInt32 Order; member
|