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/kernel/linux/linux-6.6/arch/arm/boot/dts/broadcom/
Dbcm-ns.dtsi19 ranges = <0x00000000 0x18000000 0x00001000>;
25 reg = <0x0300 0x100>;
33 reg = <0x0400 0x100>;
37 pinctrl-0 = <&pinmux_uart1>;
44 ranges = <0x00000000 0x19000000 0x00023000>;
50 reg = <0x20000 0x100>;
55 reg = <0x20200 0x100>;
62 reg = <0x20600 0x20>;
71 #address-cells = <0>;
73 reg = <0x21000 0x1000>,
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dbcm5301x.dtsi24 ranges = <0x00000000 0x18000000 0x00001000>;
30 reg = <0x0300 0x100>;
38 reg = <0x0400 0x100>;
42 pinctrl-0 = <&pinmux_uart1>;
49 ranges = <0x00000000 0x19000000 0x00023000>;
53 a9pll: arm_clk@0 {
54 #clock-cells = <0>;
57 reg = <0x00000 0x1000>;
62 reg = <0x20000 0x100>;
67 reg = <0x20200 0x100>;
[all …]
/kernel/linux/linux-6.6/sound/soc/tegra/
Dtegra210_adx.c25 { TEGRA210_ADX_RX_INT_MASK, 0x00000001},
26 { TEGRA210_ADX_RX_CIF_CTRL, 0x00007000},
27 { TEGRA210_ADX_TX_INT_MASK, 0x0000000f },
28 { TEGRA210_ADX_TX1_CIF_CTRL, 0x00007000},
29 { TEGRA210_ADX_TX2_CIF_CTRL, 0x00007000},
30 { TEGRA210_ADX_TX3_CIF_CTRL, 0x00007000},
31 { TEGRA210_ADX_TX4_CIF_CTRL, 0x00007000},
32 { TEGRA210_ADX_CG, 0x1},
33 { TEGRA210_ADX_CFG_RAM_CTRL, 0x00004000},
45 for (i = 0; i < TEGRA210_ADX_RAM_DEPTH; i++) in tegra210_adx_write_map_ram()
[all …]
Dtegra210_amx.c34 #define TEGRA194_MAX_FRAME_IDLE_COUNT 0x1800
39 { TEGRA210_AMX_RX_INT_MASK, 0x0000000f},
40 { TEGRA210_AMX_RX1_CIF_CTRL, 0x00007000},
41 { TEGRA210_AMX_RX2_CIF_CTRL, 0x00007000},
42 { TEGRA210_AMX_RX3_CIF_CTRL, 0x00007000},
43 { TEGRA210_AMX_RX4_CIF_CTRL, 0x00007000},
44 { TEGRA210_AMX_TX_INT_MASK, 0x00000001},
45 { TEGRA210_AMX_TX_CIF_CTRL, 0x00007000},
46 { TEGRA210_AMX_CG, 0x1},
47 { TEGRA210_AMX_CFG_RAM_CTRL, 0x00004000},
[all …]
/kernel/linux/linux-6.6/arch/sparc/include/uapi/asm/
Dperfctr.h58 #define PRIV 0x00000001
59 #define SYS 0x00000002
60 #define USR 0x00000004
63 #define CYCLE_CNT 0x00000000
64 #define INSTR_CNT 0x00000010
65 #define DISPATCH0_IC_MISS 0x00000020
66 #define DISPATCH0_STOREBUF 0x00000030
67 #define IC_REF 0x00000080
68 #define DC_RD 0x00000090
69 #define DC_WR 0x000000A0
[all …]
/kernel/linux/linux-5.10/arch/sparc/include/uapi/asm/
Dperfctr.h58 #define PRIV 0x00000001
59 #define SYS 0x00000002
60 #define USR 0x00000004
63 #define CYCLE_CNT 0x00000000
64 #define INSTR_CNT 0x00000010
65 #define DISPATCH0_IC_MISS 0x00000020
66 #define DISPATCH0_STOREBUF 0x00000030
67 #define IC_REF 0x00000080
68 #define DC_RD 0x00000090
69 #define DC_WR 0x000000A0
[all …]
/kernel/linux/linux-5.10/include/linux/bcma/
Dbcma_driver_arm_c9.h6 #define BCMA_DMU_CRU_USB2_CONTROL 0x0164
7 #define BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_NDIV_MASK 0x00000FFC
9 #define BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_PDIV_MASK 0x00007000
11 #define BCMA_DMU_CRU_CLKSET_KEY 0x0180
12 #define BCMA_DMU_CRU_STRAPS_CTRL 0x02A0
13 #define BCMA_DMU_CRU_STRAPS_CTRL_USB3 0x00000010
14 #define BCMA_DMU_CRU_STRAPS_CTRL_4BYTE 0x00008000
/kernel/linux/linux-6.6/include/linux/bcma/
Dbcma_driver_arm_c9.h6 #define BCMA_DMU_CRU_USB2_CONTROL 0x0164
7 #define BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_NDIV_MASK 0x00000FFC
9 #define BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_PDIV_MASK 0x00007000
11 #define BCMA_DMU_CRU_CLKSET_KEY 0x0180
12 #define BCMA_DMU_CRU_STRAPS_CTRL 0x02A0
13 #define BCMA_DMU_CRU_STRAPS_CTRL_USB3 0x00000010
14 #define BCMA_DMU_CRU_STRAPS_CTRL_4BYTE 0x00008000
/kernel/linux/patches/linux-5.10/prebuilts/usr/include/linux/
Dvbox_vmmdev_types.h25 VMMDEVREQ_INVALID_REQUEST = 0,
83 VMMDEVREQ_SIZEHACK = 0x7fffffff
90 #define VMMDEV_REQUESTOR_USR_NOT_GIVEN 0x00000000
91 #define VMMDEV_REQUESTOR_USR_DRV 0x00000001
92 #define VMMDEV_REQUESTOR_USR_DRV_OTHER 0x00000002
93 #define VMMDEV_REQUESTOR_USR_ROOT 0x00000003
94 #define VMMDEV_REQUESTOR_USR_USER 0x00000006
95 #define VMMDEV_REQUESTOR_USR_MASK 0x00000007
96 #define VMMDEV_REQUESTOR_KERNEL 0x00000000
97 #define VMMDEV_REQUESTOR_USERMODE 0x00000008
[all …]
/kernel/linux/patches/linux-6.6/prebuilts/usr/include/linux/
Dvbox_vmmdev_types.h25 VMMDEVREQ_INVALID_REQUEST = 0,
83 VMMDEVREQ_SIZEHACK = 0x7fffffff
90 #define VMMDEV_REQUESTOR_USR_NOT_GIVEN 0x00000000
91 #define VMMDEV_REQUESTOR_USR_DRV 0x00000001
92 #define VMMDEV_REQUESTOR_USR_DRV_OTHER 0x00000002
93 #define VMMDEV_REQUESTOR_USR_ROOT 0x00000003
94 #define VMMDEV_REQUESTOR_USR_USER 0x00000006
95 #define VMMDEV_REQUESTOR_USR_MASK 0x00000007
96 #define VMMDEV_REQUESTOR_KERNEL 0x00000000
97 #define VMMDEV_REQUESTOR_USERMODE 0x00000008
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/mga/
Dmga_state.c55 MGA_LEN + MGA_EXEC, 0x80000000, in mga_emit_clip_rect()
57 MGA_LEN + MGA_EXEC, 0x80000000); in mga_emit_clip_rect()
59 DMA_BLOCK(MGA_DMAPAD, 0x00000000, in mga_emit_clip_rect()
83 MGA_DMAPAD, 0x00000000, in mga_g200_emit_context()
84 MGA_DMAPAD, 0x00000000, MGA_DMAPAD, 0x00000000); in mga_g200_emit_context()
111 MGA_DMAPAD, 0x00000000, MGA_DMAPAD, 0x00000000); in mga_g400_emit_context()
119 drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[0]; in mga_g200_emit_tex0()
138 MGA_TEXTRANS, 0x0000ffff, in mga_g200_emit_tex0()
139 MGA_TEXTRANSHIGH, 0x0000ffff, MGA_DMAPAD, 0x00000000); in mga_g200_emit_tex0()
147 drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[0]; in mga_g400_emit_tex0()
[all …]
/kernel/linux/linux-5.10/include/uapi/linux/
Dvbox_vmmdev_types.h24 VMMDEVREQ_INVALID_REQUEST = 0,
39 VMMDEVREQ_REPORT_GUEST_INFO2 = 58, /* since version 3.2.0 */
64 VMMDEVREQ_VIDEMODE_SUPPORTED2 = 57, /* since version 3.2.0 */
99 VMMDEVREQ_SIZEHACK = 0x7fffffff
111 #define VMMDEV_REQUESTOR_USR_NOT_GIVEN 0x00000000
113 #define VMMDEV_REQUESTOR_USR_DRV 0x00000001
115 #define VMMDEV_REQUESTOR_USR_DRV_OTHER 0x00000002
117 #define VMMDEV_REQUESTOR_USR_ROOT 0x00000003
119 #define VMMDEV_REQUESTOR_USR_USER 0x00000006
121 #define VMMDEV_REQUESTOR_USR_MASK 0x00000007
[all …]
/kernel/linux/linux-6.6/include/uapi/linux/
Dvbox_vmmdev_types.h24 VMMDEVREQ_INVALID_REQUEST = 0,
39 VMMDEVREQ_REPORT_GUEST_INFO2 = 58, /* since version 3.2.0 */
64 VMMDEVREQ_VIDEMODE_SUPPORTED2 = 57, /* since version 3.2.0 */
99 VMMDEVREQ_SIZEHACK = 0x7fffffff
111 #define VMMDEV_REQUESTOR_USR_NOT_GIVEN 0x00000000
113 #define VMMDEV_REQUESTOR_USR_DRV 0x00000001
115 #define VMMDEV_REQUESTOR_USR_DRV_OTHER 0x00000002
117 #define VMMDEV_REQUESTOR_USR_ROOT 0x00000003
119 #define VMMDEV_REQUESTOR_USR_USER 0x00000006
121 #define VMMDEV_REQUESTOR_USR_MASK 0x00000007
[all …]
/kernel/linux/linux-5.10/drivers/media/pci/cx88/
Dcx88-tvaudio.c52 "Radio deemphasis time constant, 0=None, 1=50us (elsewhere), 2=75us (USA)");
58 } while (0)
96 for (i = 0; l[i].reg; i++) { in set_audio_registers()
120 cx_write(AUD_INIT_LD, 0x0001); in set_audio_start()
121 cx_write(AUD_SOFT_RESET, 0x0001); in set_audio_start()
130 cx_write(AUD_RATE_THRES_DMD, 0x000000C0); in set_audio_finish()
142 cx_write(AUD_I2SCNTL, 0); in set_audio_finish()
143 /* cx_write(AUD_APB_IN_RATE_ADJ, 0); */ in set_audio_finish()
151 cx_write(AUD_SOFT_RESET, 0x0000); in set_audio_finish()
166 {AUD_AFE_12DB_EN, 0x00000001}, in set_audio_standard_BTSC()
[all …]
/kernel/linux/linux-6.6/drivers/media/pci/cx88/
Dcx88-tvaudio.c52 "Radio deemphasis time constant, 0=None, 1=50us (elsewhere), 2=75us (USA)");
58 } while (0)
96 for (i = 0; l[i].reg; i++) { in set_audio_registers()
120 cx_write(AUD_INIT_LD, 0x0001); in set_audio_start()
121 cx_write(AUD_SOFT_RESET, 0x0001); in set_audio_start()
130 cx_write(AUD_RATE_THRES_DMD, 0x000000C0); in set_audio_finish()
142 cx_write(AUD_I2SCNTL, 0); in set_audio_finish()
143 /* cx_write(AUD_APB_IN_RATE_ADJ, 0); */ in set_audio_finish()
151 cx_write(AUD_SOFT_RESET, 0x0000); in set_audio_finish()
166 {AUD_AFE_12DB_EN, 0x00000001}, in set_audio_standard_BTSC()
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/mcde/
Dmcde_drm.h13 #define MCDE_CR 0x00000000
14 #define MCDE_CR_IFIFOEMPTYLINECOUNT_V422_SHIFT 0
15 #define MCDE_CR_IFIFOEMPTYLINECOUNT_V422_MASK 0x0000003F
22 #define MCDE_CONF0 0x00000004
23 #define MCDE_CONF0_SYNCMUX0 BIT(0)
32 #define MCDE_CONF0_IFIFOCTRLWTRMRKLVL_MASK 0x00007000
34 #define MCDE_CONF0_OUTMUX0_MASK 0x00070000
36 #define MCDE_CONF0_OUTMUX1_MASK 0x00380000
38 #define MCDE_CONF0_OUTMUX2_MASK 0x01C00000
40 #define MCDE_CONF0_OUTMUX3_MASK 0x0E000000
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/
Dgm200.c29 nvkm_falcon_wr32(falcon, 0x200, 0x0000030e); in gm200_pmu_flcn_bind_stat()
30 return (nvkm_falcon_rd32(falcon, 0x20c) & 0x00007000) >> 12; in gm200_pmu_flcn_bind_stat()
36 nvkm_falcon_wr32(falcon, 0xe00, 4); /* DMAIDX_UCODE */ in gm200_pmu_flcn_bind_inst()
37 nvkm_falcon_wr32(falcon, 0xe04, 0); /* DMAIDX_VIRT */ in gm200_pmu_flcn_bind_inst()
38 nvkm_falcon_wr32(falcon, 0xe08, 4); /* DMAIDX_PHYS_VID */ in gm200_pmu_flcn_bind_inst()
39 nvkm_falcon_wr32(falcon, 0xe0c, 5); /* DMAIDX_PHYS_SYS_COH */ in gm200_pmu_flcn_bind_inst()
40 nvkm_falcon_wr32(falcon, 0xe10, 6); /* DMAIDX_PHYS_SYS_NCOH */ in gm200_pmu_flcn_bind_inst()
41 nvkm_falcon_mask(falcon, 0x090, 0x00010000, 0x00010000); in gm200_pmu_flcn_bind_inst()
42 nvkm_falcon_wr32(falcon, 0x480, (1 << 30) | (target << 28) | (addr >> 12)); in gm200_pmu_flcn_bind_inst()
51 .debug = 0xc08,
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/mcde/
Dmcde_drm.h13 #define MCDE_CR 0x00000000
14 #define MCDE_CR_IFIFOEMPTYLINECOUNT_V422_SHIFT 0
15 #define MCDE_CR_IFIFOEMPTYLINECOUNT_V422_MASK 0x0000003F
22 #define MCDE_CONF0 0x00000004
23 #define MCDE_CONF0_SYNCMUX0 BIT(0)
32 #define MCDE_CONF0_IFIFOCTRLWTRMRKLVL_MASK 0x00007000
34 #define MCDE_CONF0_OUTMUX0_MASK 0x00070000
36 #define MCDE_CONF0_OUTMUX1_MASK 0x00380000
38 #define MCDE_CONF0_OUTMUX2_MASK 0x01C00000
40 #define MCDE_CONF0_OUTMUX3_MASK 0x0E000000
[all …]
/kernel/linux/linux-6.6/drivers/net/wireless/realtek/rtw89/
Drtw8852a_rfk_table.c8 RTW89_DECL_RFK_WM(0x12a8, 0x00000001, 0x00000001),
9 RTW89_DECL_RFK_WM(0x12a8, 0x0000000e, 0x00000002),
10 RTW89_DECL_RFK_WM(0x32a8, 0x00000001, 0x00000001),
11 RTW89_DECL_RFK_WM(0x32a8, 0x0000000e, 0x00000002),
12 RTW89_DECL_RFK_WM(0x12bc, 0x000000f0, 0x00000005),
13 RTW89_DECL_RFK_WM(0x12bc, 0x00000f00, 0x00000005),
14 RTW89_DECL_RFK_WM(0x12bc, 0x000f0000, 0x00000005),
15 RTW89_DECL_RFK_WM(0x12bc, 0x0000f000, 0x00000005),
16 RTW89_DECL_RFK_WM(0x120c, 0x000000ff, 0x00000033),
17 RTW89_DECL_RFK_WM(0x12c0, 0x0ff00000, 0x00000033),
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/ata/
Dnvidia,tegra-ahci.yaml67 - const: sata-0
164 reg = <0x70027000 0x00002000>, /* AHCI */
165 <0x70020000 0x00007000>, /* SATA */
166 <0x70001100 0x00010000>; /* SATA AUX */
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/engine/sec2/
Dgp102.c36 return 0; in gp102_sec2_nofw()
55 return 0; in gp102_sec2_acr_bootstrap_falcon_callback()
82 falcon->func->emem_addr, sizeof(args), 0); in gp102_sec2_acr_boot()
84 return 0; in gp102_sec2_acr_boot()
146 for (i = 0; i < ARRAY_SIZE(msg.queue_info); i++) { in gp102_sec2_initmsg()
160 return 0; in gp102_sec2_initmsg()
168 u32 disp = nvkm_falcon_rd32(falcon, 0x01c); in gp102_sec2_intr()
169 u32 intr = nvkm_falcon_rd32(falcon, 0x008) & disp & ~(disp >> 16); in gp102_sec2_intr()
171 if (intr & 0x00000040) { in gp102_sec2_intr()
173 nvkm_falcon_wr32(falcon, 0x004, 0x00000040); in gp102_sec2_intr()
[all …]
/kernel/linux/linux-6.6/drivers/net/ethernet/intel/iavf/
Diavf_register.h7 #define IAVF_VF_ARQBAH1 0x00006000 /* Reset: EMPR */
8 #define IAVF_VF_ARQBAL1 0x00006C00 /* Reset: EMPR */
9 #define IAVF_VF_ARQH1 0x00007400 /* Reset: EMPR */
10 #define IAVF_VF_ARQH1_ARQH_SHIFT 0
11 #define IAVF_VF_ARQH1_ARQH_MASK IAVF_MASK(0x3FF, IAVF_VF_ARQH1_ARQH_SHIFT)
12 #define IAVF_VF_ARQLEN1 0x00008000 /* Reset: EMPR */
14 #define IAVF_VF_ARQLEN1_ARQVFE_MASK IAVF_MASK(0x1, IAVF_VF_ARQLEN1_ARQVFE_SHIFT)
16 #define IAVF_VF_ARQLEN1_ARQOVFL_MASK IAVF_MASK(0x1, IAVF_VF_ARQLEN1_ARQOVFL_SHIFT)
18 #define IAVF_VF_ARQLEN1_ARQCRIT_MASK IAVF_MASK(0x1, IAVF_VF_ARQLEN1_ARQCRIT_SHIFT)
20 #define IAVF_VF_ARQLEN1_ARQENABLE_MASK IAVF_MASK(0x1, IAVF_VF_ARQLEN1_ARQENABLE_SHIFT)
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/intel/iavf/
Diavf_register.h7 #define IAVF_VF_ARQBAH1 0x00006000 /* Reset: EMPR */
8 #define IAVF_VF_ARQBAL1 0x00006C00 /* Reset: EMPR */
9 #define IAVF_VF_ARQH1 0x00007400 /* Reset: EMPR */
10 #define IAVF_VF_ARQH1_ARQH_SHIFT 0
11 #define IAVF_VF_ARQH1_ARQH_MASK IAVF_MASK(0x3FF, IAVF_VF_ARQH1_ARQH_SHIFT)
12 #define IAVF_VF_ARQLEN1 0x00008000 /* Reset: EMPR */
14 #define IAVF_VF_ARQLEN1_ARQVFE_MASK IAVF_MASK(0x1, IAVF_VF_ARQLEN1_ARQVFE_SHIFT)
16 #define IAVF_VF_ARQLEN1_ARQOVFL_MASK IAVF_MASK(0x1, IAVF_VF_ARQLEN1_ARQOVFL_SHIFT)
18 #define IAVF_VF_ARQLEN1_ARQCRIT_MASK IAVF_MASK(0x1, IAVF_VF_ARQLEN1_ARQCRIT_SHIFT)
20 #define IAVF_VF_ARQLEN1_ARQENABLE_MASK IAVF_MASK(0x1, IAVF_VF_ARQLEN1_ARQENABLE_SHIFT)
[all …]
/kernel/linux/linux-5.10/arch/arm/nwfpe/
Dfpsr.h32 #define MASK_SYSID 0xff000000
33 #define BIT_HARDWARE 0x80000000
34 #define FP_EMULATOR 0x01000000 /* System ID for emulator */
35 #define FP_ACCELERATOR 0x81000000 /* System ID for FPA11 */
40 #define MASK_TRAP_ENABLE 0x00ff0000
41 #define MASK_TRAP_ENABLE_STRICT 0x001f0000
42 #define BIT_IXE 0x00100000 /* inexact exception enable */
43 #define BIT_UFE 0x00080000 /* underflow exception enable */
44 #define BIT_OFE 0x00040000 /* overflow exception enable */
45 #define BIT_DZE 0x00020000 /* divide by zero exception enable */
[all …]
/kernel/linux/linux-6.6/arch/arm/nwfpe/
Dfpsr.h32 #define MASK_SYSID 0xff000000
33 #define BIT_HARDWARE 0x80000000
34 #define FP_EMULATOR 0x01000000 /* System ID for emulator */
35 #define FP_ACCELERATOR 0x81000000 /* System ID for FPA11 */
40 #define MASK_TRAP_ENABLE 0x00ff0000
41 #define MASK_TRAP_ENABLE_STRICT 0x001f0000
42 #define BIT_IXE 0x00100000 /* inexact exception enable */
43 #define BIT_UFE 0x00080000 /* underflow exception enable */
44 #define BIT_OFE 0x00040000 /* overflow exception enable */
45 #define BIT_DZE 0x00020000 /* divide by zero exception enable */
[all …]

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