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/kernel/linux/linux-5.10/arch/arm/mach-s3c/
Danubis.h17 #define ANUBIS_CTRL1_NANDSEL (0x3)
21 #define ANUBIS_IDREG_REVMASK (0x7)
33 #define ANUBIS_IOADDR(x) (S3C2410_ADDR((x) + 0x01800000))
39 #define ANUBIS_VA_CTRL1 ANUBIS_IOADDR(0x00000000)
42 #define ANUBIS_VA_IDREG ANUBIS_IOADDR(0x00300000)
45 #define ANUBIS_IDEPRI ANUBIS_IOADDR(0x01000000)
46 #define ANUBIS_IDEPRIAUX ANUBIS_IOADDR(0x01100000)
47 #define ANUBIS_IDESEC ANUBIS_IOADDR(0x01200000)
48 #define ANUBIS_IDESECAUX ANUBIS_IOADDR(0x01300000)
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/cache/
Dqcom,llcc.yaml162 reg = <0 0x01100000 0 0x50000>, <0 0x01180000 0 0x50000>,
163 <0 0x01200000 0 0x50000>, <0 0x01280000 0 0x50000>,
164 <0 0x01300000 0 0x50000>;
/kernel/linux/linux-5.10/arch/arm/probes/
Ddecode.h42 if (pcv & 0x1) { in bx_write_pc()
44 pcv &= ~0x1; in bx_write_pc()
47 pcv &= ~0x2; /* Avoid UNPREDICTABLE address allignment */ in bx_write_pc()
107 * if P (bit 24) == 0 or W (bit 21) == 1
109 #define is_writeback(insn) ((insn ^ 0x01000000) & 0x01200000)
189 * REGS(0, ANY, NOPC, 0, ANY)
197 * bits 3.. 0 any register allowed here
212 * DECODE_EMULATEX (0x0e000090, 0x00000010, PROBES_DATA_PROCESSING_REG,
213 * REGS(ANY, ANY, NOPC, 0, ANY)),
242 REG_TYPE_NONE = 0, /* Not a register, ignore */
[all …]
/kernel/linux/linux-6.6/arch/arm/probes/
Ddecode.h42 if (pcv & 0x1) { in bx_write_pc()
44 pcv &= ~0x1; in bx_write_pc()
47 pcv &= ~0x2; /* Avoid UNPREDICTABLE address allignment */ in bx_write_pc()
107 * if P (bit 24) == 0 or W (bit 21) == 1
109 #define is_writeback(insn) ((insn ^ 0x01000000) & 0x01200000)
189 * REGS(0, ANY, NOPC, 0, ANY)
197 * bits 3.. 0 any register allowed here
212 * DECODE_EMULATEX (0x0e000090, 0x00000010, PROBES_DATA_PROCESSING_REG,
213 * REGS(ANY, ANY, NOPC, 0, ANY)),
242 REG_TYPE_NONE = 0, /* Not a register, ignore */
[all …]
/kernel/linux/linux-5.10/sound/soc/sh/rcar/
Dsrc.c41 for ((i) = 0; \
59 rsnd_mod_write(mod, SRC_SWRSR, 0); in rsnd_src_activation()
66 rsnd_mod_write(mod, SRC_SWRSR, 0); in rsnd_src_halt()
88 return 0; in rsnd_src_convert_rate()
110 unsigned int rate = 0; in rsnd_src_get_rate()
138 0x01800000, /* 6 - 1/6 */
139 0x01000000, /* 6 - 1/4 */
140 0x00c00000, /* 6 - 1/3 */
141 0x00800000, /* 6 - 1/2 */
142 0x00600000, /* 6 - 2/3 */
[all …]
/kernel/linux/linux-6.6/sound/soc/sh/rcar/
Dsrc.c50 for ((i) = 0; \
68 rsnd_mod_write(mod, SRC_SWRSR, 0); in rsnd_src_activation()
75 rsnd_mod_write(mod, SRC_SWRSR, 0); in rsnd_src_halt()
97 return 0; in rsnd_src_convert_rate()
119 unsigned int rate = 0; in rsnd_src_get_rate()
147 0x01800000, /* 6 - 1/6 */
148 0x01000000, /* 6 - 1/4 */
149 0x00c00000, /* 6 - 1/3 */
150 0x00800000, /* 6 - 1/2 */
151 0x00600000, /* 6 - 2/3 */
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dsun8i-r40.dtsi63 #clock-cells = <0>;
71 #clock-cells = <0>;
81 #size-cells = <0>;
83 cpu0: cpu@0 {
86 reg = <0>;
117 polling-delay-passive = <0>;
118 polling-delay = <0>;
119 thermal-sensors = <&ths 0>;
124 polling-delay-passive = <0>;
125 polling-delay = <0>;
[all …]
Dsun8i-a83t.dtsi62 #size-cells = <0>;
64 cpu0: cpu@0 {
71 reg = <0>;
115 reg = <0x100>;
126 reg = <0x101>;
137 reg = <0x102>;
148 reg = <0x103>;
168 #clock-cells = <0>;
181 #clock-cells = <0>;
188 #clock-cells = <0>;
[all …]
Dqcom-apq8064.dtsi24 reg = <0x80000000 0x200000>;
29 reg = <0x8f000000 0x700000>;
36 #size-cells = <0>;
38 CPU0: cpu@0 {
42 reg = <0>;
100 reg = <0x0 0x0>;
109 coefficients = <1199 0>;
130 coefficients = <1132 0>;
151 coefficients = <1199 0>;
172 coefficients = <1132 0>;
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/allwinner/
Dsun8i-a83t.dtsi62 #size-cells = <0>;
64 cpu0: cpu@0 {
71 reg = <0>;
115 reg = <0x100>;
126 reg = <0x101>;
137 reg = <0x102>;
148 reg = <0x103>;
168 #clock-cells = <0>;
181 #clock-cells = <0>;
188 #clock-cells = <0>;
[all …]
Dsun8i-r40.dtsi64 #clock-cells = <0>;
72 #clock-cells = <0>;
82 #size-cells = <0>;
84 cpu0: cpu@0 {
87 reg = <0>;
130 polling-delay-passive = <0>;
131 polling-delay = <0>;
132 thermal-sensors = <&ths 0>;
143 hysteresis = <0>;
161 polling-delay-passive = <0>;
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/qcom/
Dqcom-apq8064.dtsi25 reg = <0x80000000 0x200000>;
30 reg = <0x8f000000 0x700000>;
37 #size-cells = <0>;
39 CPU0: cpu@0 {
43 reg = <0>;
100 memory@0 {
102 reg = <0x0 0x0>;
111 coefficients = <1199 0>;
132 coefficients = <1132 0>;
153 coefficients = <1199 0>;
[all …]
/kernel/linux/linux-6.6/drivers/ptp/
Dptp_ocp.c27 #define PCI_VENDOR_ID_FACEBOOK 0x1d9b
28 #define PCI_DEVICE_ID_FACEBOOK_TIMECARD 0x0400
30 #define PCI_VENDOR_ID_CELESTICA 0x18d4
31 #define PCI_DEVICE_ID_CELESTICA_TIMECARD 0x1008
33 #define PCI_VENDOR_ID_OROLIA 0x1ad7
34 #define PCI_DEVICE_ID_OROLIA_ARTCARD 0xa000
65 #define OCP_CTRL_ENABLE BIT(0)
73 #define OCP_STATUS_IN_SYNC BIT(0)
76 #define OCP_SELECT_CLK_NONE 0
77 #define OCP_SELECT_CLK_REG 0xfe
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/qcom/
Dsdm845.dtsi76 #clock-cells = <0>;
83 #clock-cells = <0>;
90 #size-cells = <0>;
92 CPU0: cpu@0 {
95 reg = <0x0 0x0>;
96 clocks = <&cpufreq_hw 0>;
100 qcom,freq-domain = <&cpufreq_hw 0>;
124 reg = <0x0 0x100>;
125 clocks = <&cpufreq_hw 0>;
129 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]