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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/spi/
Dst,stm32-qspi.yaml65 reg = <0x58003000 0x1000>, <0x70000000 0x10000000>;
68 dmas = <&mdma1 22 0x10 0x100002 0x0 0x0>,
69 <&mdma1 22 0x10 0x100008 0x0 0x0>;
75 #size-cells = <0>;
77 flash@0 {
79 reg = <0>;
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/spi/
Dst,stm32-qspi.yaml65 reg = <0x58003000 0x1000>, <0x70000000 0x10000000>;
68 dmas = <&mdma1 22 0x10 0x100002 0x0 0x0>,
69 <&mdma1 22 0x10 0x100008 0x0 0x0>;
75 #size-cells = <0>;
77 flash@0 {
79 reg = <0>;
/kernel/linux/linux-5.10/arch/arm/mach-pxa/
Dviper.h28 #define VIPER_CPLD_BASE (0xf0000000)
29 #define VIPER_PC104IO_BASE (0xf1000000)
30 #define VIPER_USB_BASE (0xf1800000)
32 #define VIPER_ETH_GPIO (0)
63 #define _VIPER_LO_IRQ_STATUS (VIPER_CPLD_PHYS + 0x100000)
64 #define _VIPER_ICR_PHYS (VIPER_CPLD_PHYS + 0x100002)
65 #define _VIPER_HI_IRQ_STATUS (VIPER_CPLD_PHYS + 0x100004)
66 #define _VIPER_VERSION_PHYS (VIPER_CPLD_PHYS + 0x100006)
67 #define VIPER_UARTA_PHYS (VIPER_CPLD_PHYS + 0x300010)
68 #define VIPER_UARTB_PHYS (VIPER_CPLD_PHYS + 0x300000)
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/kernel/linux/linux-5.10/arch/m68k/include/asm/
Dm523xsim.h24 #define MCFICM_INTC0 (MCF_IPSBAR + 0x0c00) /* Base for Interrupt Ctrl 0 */
25 #define MCFICM_INTC1 (MCF_IPSBAR + 0x0d00) /* Base for Interrupt Ctrl 0 */
27 #define MCFINTC_IPRH 0x00 /* Interrupt pending 32-63 */
28 #define MCFINTC_IPRL 0x04 /* Interrupt pending 1-31 */
29 #define MCFINTC_IMRH 0x08 /* Interrupt mask 32-63 */
30 #define MCFINTC_IMRL 0x0c /* Interrupt mask 1-31 */
31 #define MCFINTC_INTFRCH 0x10 /* Interrupt force 32-63 */
32 #define MCFINTC_INTFRCL 0x14 /* Interrupt force 1-31 */
33 #define MCFINTC_IRLR 0x18 /* */
34 #define MCFINTC_IACKL 0x19 /* */
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Dm527xsim.h24 #define MCFICM_INTC0 (MCF_IPSBAR + 0x0c00) /* Base for Interrupt Ctrl 0 */
25 #define MCFICM_INTC1 (MCF_IPSBAR + 0x0d00) /* Base for Interrupt Ctrl 1 */
27 #define MCFINTC_IPRH 0x00 /* Interrupt pending 32-63 */
28 #define MCFINTC_IPRL 0x04 /* Interrupt pending 1-31 */
29 #define MCFINTC_IMRH 0x08 /* Interrupt mask 32-63 */
30 #define MCFINTC_IMRL 0x0c /* Interrupt mask 1-31 */
31 #define MCFINTC_INTFRCH 0x10 /* Interrupt force 32-63 */
32 #define MCFINTC_INTFRCL 0x14 /* Interrupt force 1-31 */
33 #define MCFINTC_IRLR 0x18 /* */
34 #define MCFINTC_IACKL 0x19 /* */
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/kernel/linux/linux-6.6/arch/m68k/include/asm/
Dm523xsim.h24 #define MCFICM_INTC0 (MCF_IPSBAR + 0x0c00) /* Base for Interrupt Ctrl 0 */
25 #define MCFICM_INTC1 (MCF_IPSBAR + 0x0d00) /* Base for Interrupt Ctrl 0 */
27 #define MCFINTC_IPRH 0x00 /* Interrupt pending 32-63 */
28 #define MCFINTC_IPRL 0x04 /* Interrupt pending 1-31 */
29 #define MCFINTC_IMRH 0x08 /* Interrupt mask 32-63 */
30 #define MCFINTC_IMRL 0x0c /* Interrupt mask 1-31 */
31 #define MCFINTC_INTFRCH 0x10 /* Interrupt force 32-63 */
32 #define MCFINTC_INTFRCL 0x14 /* Interrupt force 1-31 */
33 #define MCFINTC_IRLR 0x18 /* */
34 #define MCFINTC_IACKL 0x19 /* */
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Dm527xsim.h24 #define MCFICM_INTC0 (MCF_IPSBAR + 0x0c00) /* Base for Interrupt Ctrl 0 */
25 #define MCFICM_INTC1 (MCF_IPSBAR + 0x0d00) /* Base for Interrupt Ctrl 1 */
27 #define MCFINTC_IPRH 0x00 /* Interrupt pending 32-63 */
28 #define MCFINTC_IPRL 0x04 /* Interrupt pending 1-31 */
29 #define MCFINTC_IMRH 0x08 /* Interrupt mask 32-63 */
30 #define MCFINTC_IMRL 0x0c /* Interrupt mask 1-31 */
31 #define MCFINTC_INTFRCH 0x10 /* Interrupt force 32-63 */
32 #define MCFINTC_INTFRCL 0x14 /* Interrupt force 1-31 */
33 #define MCFINTC_IRLR 0x18 /* */
34 #define MCFINTC_IACKL 0x19 /* */
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/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dstm32mp151.dtsi16 #size-cells = <0>;
18 cpu0: cpu@0 {
22 reg = <0>;
42 reg = <0xa0021000 0x1000>,
43 <0xa0022000 0x2000>;
57 #clock-cells = <0>;
63 #clock-cells = <0>;
69 #clock-cells = <0>;
75 #clock-cells = <0>;
81 #clock-cells = <0>;
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/kernel/linux/linux-5.10/sound/pci/hda/
Dpatch_realtek.c159 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_COEF_INDEX, coef_idx); in __alc_read_coefex_idx()
160 val = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PROC_COEF, 0); in __alc_read_coefex_idx()
176 alc_read_coefex_idx(codec, 0x20, coef_idx)
181 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_COEF_INDEX, coef_idx); in __alc_write_coefex_idx()
182 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_PROC_COEF, coef_val); in __alc_write_coefex_idx()
194 alc_write_coefex_idx(codec, 0x20, coef_idx, coef_val)
217 alc_update_coefex_idx(codec, 0x20, coef_idx, mask, bits_set)
219 /* a special bypass for COEF 0; read the cached value at the second time */
225 spec->coef0 = alc_read_coef_idx(codec, 0); in alc_get_coef0()
240 #define WRITE_COEF(_idx, _val) WRITE_COEFEX(0x20, _idx, _val)
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/kernel/linux/linux-6.6/sound/pci/hda/
Dpatch_realtek.c164 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_COEF_INDEX, coef_idx); in __alc_read_coefex_idx()
165 val = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PROC_COEF, 0); in __alc_read_coefex_idx()
181 alc_read_coefex_idx(codec, 0x20, coef_idx)
186 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_COEF_INDEX, coef_idx); in __alc_write_coefex_idx()
187 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_PROC_COEF, coef_val); in __alc_write_coefex_idx()
199 alc_write_coefex_idx(codec, 0x20, coef_idx, coef_val)
222 alc_update_coefex_idx(codec, 0x20, coef_idx, mask, bits_set)
224 /* a special bypass for COEF 0; read the cached value at the second time */
230 spec->coef0 = alc_read_coef_idx(codec, 0); in alc_get_coef0()
245 #define WRITE_COEF(_idx, _val) WRITE_COEFEX(0x20, _idx, _val)
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