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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/thermal/
Dexynos-thermal.txt11 "samsung,exynos5420-tmu" for TMU channel 0, 1 on Exynos5420
27 TRIMINFO at 0x1006c000 contains data for TMU channel 3
28 TRIMINFO at 0x100a0000 contains data for TMU channel 4
29 TRIMINFO at 0x10068000 contains data for TMU channel 2
61 reg = <0x100C0000 0x100>;
66 #thermal-sensor-cells = <0>;
72 reg = <0x10068000 0x100>, <0x1006c000 0x4>;
73 interrupts = <0 184 0>;
76 #thermal-sensor-cells = <0>;
81 reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/thermal/
Dsamsung,exynos-thermal.yaml24 # For TMU channel 0, 1 on Exynos5420:
59 TRIMINFO at 0x1006c000 contains data for TMU channel 3
60 TRIMINFO at 0x100a0000 contains data for TMU channel 4
61 TRIMINFO at 0x10068000 contains data for TMU channel 2
150 reg = <0x100C0000 0x100>;
153 #thermal-sensor-cells = <0>;
164 reg = <0x10068000 0x100>, <0x1006c000 0x4>;
166 #thermal-sensor-cells = <0>;
177 reg = <0x10060000 0x200>;
179 #thermal-sensor-cells = <0>;
/kernel/linux/linux-6.6/arch/arm/boot/dts/samsung/
Dexynos5410.dtsi31 #size-cells = <0>;
33 cpu0: cpu@0 {
36 reg = <0x0>;
43 reg = <0x1>;
50 reg = <0x2>;
57 reg = <0x3>;
70 reg = <0x10040000 0x5000>;
78 reg = <0x10010000 0x30000>;
84 reg = <0x03810000 0x0c>;
92 reg = <0x10060000 0x100>;
[all …]
Dexynos5420.dtsi153 cluster_a15_opp_table: opp-table-0 {
270 reg = <0x10d20000 0x1000>;
271 ranges = <0x0 0x10d20000 0x6000>;
276 reg = <0x4000 0x1000>;
281 reg = <0x5000 0x1000>;
287 reg = <0x10010000 0x30000>;
293 reg = <0x03810000 0x0c>;
303 reg = <0x11000000 0x10000>;
316 #size-cells = <0>;
317 reg = <0x12200000 0x2000>;
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dexynos5410.dtsi31 #size-cells = <0>;
33 cpu0: cpu@0 {
36 reg = <0x0>;
43 reg = <0x1>;
50 reg = <0x2>;
57 reg = <0x3>;
70 reg = <0x10040000 0x5000>;
78 reg = <0x10010000 0x30000>;
84 reg = <0x03810000 0x0C>;
92 reg = <0x10060000 0x100>;
[all …]
Dexynos5420.dtsi162 reg = <0x10d20000 0x1000>;
163 ranges = <0x0 0x10d20000 0x6000>;
168 reg = <0x4000 0x1000>;
173 reg = <0x5000 0x1000>;
179 reg = <0x10010000 0x30000>;
185 reg = <0x03810000 0x0C>;
195 reg = <0x11000000 0x10000>;
208 #size-cells = <0>;
209 reg = <0x12200000 0x2000>;
212 fifo-depth = <0x40>;
[all …]
/kernel/linux/linux-6.6/drivers/net/ethernet/microchip/sparx5/
Dsparx5_main.c55 { TARGET_CPU, 0, 0 }, /* 0x600000000 */
56 { TARGET_FDMA, 0x80000, 0 }, /* 0x600080000 */
57 { TARGET_PCEP, 0x400000, 0 }, /* 0x600400000 */
58 { TARGET_DEV2G5, 0x10004000, 1 }, /* 0x610004000 */
59 { TARGET_DEV5G, 0x10008000, 1 }, /* 0x610008000 */
60 { TARGET_PCS5G_BR, 0x1000c000, 1 }, /* 0x61000c000 */
61 { TARGET_DEV2G5 + 1, 0x10010000, 1 }, /* 0x610010000 */
62 { TARGET_DEV5G + 1, 0x10014000, 1 }, /* 0x610014000 */
63 { TARGET_PCS5G_BR + 1, 0x10018000, 1 }, /* 0x610018000 */
64 { TARGET_DEV2G5 + 2, 0x1001c000, 1 }, /* 0x61001c000 */
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/exynos/
Dexynos5433.dtsi48 #clock-cells = <0>;
53 #size-cells = <0>;
59 reg = <0x100>;
71 reg = <0x101>;
81 reg = <0x102>;
91 reg = <0x103>;
97 cpu4: cpu@0 {
101 reg = <0x0>;
113 reg = <0x1>;
123 reg = <0x2>;
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/exynos/
Dexynos5433.dtsi48 #clock-cells = <0>;
53 #size-cells = <0>;
91 reg = <0x100>;
96 i-cache-size = <0x8000>;
99 d-cache-size = <0x8000>;
109 reg = <0x101>;
112 i-cache-size = <0x8000>;
115 d-cache-size = <0x8000>;
125 reg = <0x102>;
128 i-cache-size = <0x8000>;
[all …]