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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mfd/
Dsamsung,exynos5433-lpass.txt18 UART, SLIMBUS, PCM, I2S, DMAC, Timers 0...4, VIC, WDT 0...1 devices.
30 reg = <0x11400000 0x100>, <0x11500000 0x08>;
39 reg = <0x11420000 0x1000>;
40 interrupts = <0 73 0>;
50 reg = <0x11440000 0x100>;
51 dmas = <&adma 0 &adma 2>;
53 interrupts = <0 70 0>;
59 pinctrl-0 = <&i2s0_bus>;
64 reg = <0x11460000 0x100>;
65 interrupts = <0 67 0>;
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mfd/
Dsamsung,exynos5433-lpass.yaml40 "^dma-controller@[0-9a-f]+$":
43 "^i2s@[0-9a-f]+$":
46 "^serial@[0-9a-f]+$":
67 reg = <0x11400000 0x100>, <0x11500000 0x08>;
77 reg = <0x11420000 0x1000>;
89 reg = <0x11440000 0x100>;
90 dmas = <&adma 0>, <&adma 2>;
94 #size-cells = <0>;
101 pinctrl-0 = <&i2s0_bus>;
108 reg = <0x11460000 0x100>;
[all …]
/kernel/linux/linux-6.6/drivers/net/ethernet/microchip/sparx5/
Dsparx5_main.c55 { TARGET_CPU, 0, 0 }, /* 0x600000000 */
56 { TARGET_FDMA, 0x80000, 0 }, /* 0x600080000 */
57 { TARGET_PCEP, 0x400000, 0 }, /* 0x600400000 */
58 { TARGET_DEV2G5, 0x10004000, 1 }, /* 0x610004000 */
59 { TARGET_DEV5G, 0x10008000, 1 }, /* 0x610008000 */
60 { TARGET_PCS5G_BR, 0x1000c000, 1 }, /* 0x61000c000 */
61 { TARGET_DEV2G5 + 1, 0x10010000, 1 }, /* 0x610010000 */
62 { TARGET_DEV5G + 1, 0x10014000, 1 }, /* 0x610014000 */
63 { TARGET_PCS5G_BR + 1, 0x10018000, 1 }, /* 0x610018000 */
64 { TARGET_DEV2G5 + 2, 0x1001c000, 1 }, /* 0x61001c000 */
[all …]
/kernel/linux/linux-5.10/arch/mips/include/asm/mach-au1x00/
Dau1000.h105 * 0..au1000 1..au1500 2..au1100 3..au1550 4..au1200 5..au1300
108 #define AU1000_AC97_PHYS_ADDR 0x10000000 /* 012 */
109 #define AU1300_ROM_PHYS_ADDR 0x10000000 /* 5 */
110 #define AU1300_OTP_PHYS_ADDR 0x10002000 /* 5 */
111 #define AU1300_VSS_PHYS_ADDR 0x10003000 /* 5 */
112 #define AU1300_UART0_PHYS_ADDR 0x10100000 /* 5 */
113 #define AU1300_UART1_PHYS_ADDR 0x10101000 /* 5 */
114 #define AU1300_UART2_PHYS_ADDR 0x10102000 /* 5 */
115 #define AU1300_UART3_PHYS_ADDR 0x10103000 /* 5 */
116 #define AU1000_USB_OHCI_PHYS_ADDR 0x10100000 /* 012 */
[all …]
/kernel/linux/linux-6.6/arch/mips/include/asm/mach-au1x00/
Dau1000.h105 * 0..au1000 1..au1500 2..au1100 3..au1550 4..au1200 5..au1300
108 #define AU1000_AC97_PHYS_ADDR 0x10000000 /* 012 */
109 #define AU1300_ROM_PHYS_ADDR 0x10000000 /* 5 */
110 #define AU1300_OTP_PHYS_ADDR 0x10002000 /* 5 */
111 #define AU1300_VSS_PHYS_ADDR 0x10003000 /* 5 */
112 #define AU1300_UART0_PHYS_ADDR 0x10100000 /* 5 */
113 #define AU1300_UART1_PHYS_ADDR 0x10101000 /* 5 */
114 #define AU1300_UART2_PHYS_ADDR 0x10102000 /* 5 */
115 #define AU1300_UART3_PHYS_ADDR 0x10103000 /* 5 */
116 #define AU1000_USB_OHCI_PHYS_ADDR 0x10100000 /* 012 */
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/exynos/
Dexynos5433.dtsi48 #clock-cells = <0>;
53 #size-cells = <0>;
59 reg = <0x100>;
71 reg = <0x101>;
81 reg = <0x102>;
91 reg = <0x103>;
97 cpu4: cpu@0 {
101 reg = <0x0>;
113 reg = <0x1>;
123 reg = <0x2>;
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/exynos/
Dexynos5433.dtsi48 #clock-cells = <0>;
53 #size-cells = <0>;
91 reg = <0x100>;
96 i-cache-size = <0x8000>;
99 d-cache-size = <0x8000>;
109 reg = <0x101>;
112 i-cache-size = <0x8000>;
115 d-cache-size = <0x8000>;
125 reg = <0x102>;
128 i-cache-size = <0x8000>;
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/qcom/
Dsa8775p.dtsi25 #clock-cells = <0>;
30 #clock-cells = <0>;
36 #size-cells = <0>;
38 CPU0: cpu@0 {
41 reg = <0x0 0x0>;
43 qcom,freq-domain = <&cpufreq_hw 0>;
61 reg = <0x0 0x100>;
63 qcom,freq-domain = <&cpufreq_hw 0>;
76 reg = <0x0 0x200>;
78 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
/kernel/linux/patches/linux-4.19/hispark_taurus_patch/
Dhispark_taurus.patch2 index 1877da816..0b45060b7 100644
188 @@ -0,0 +1,240 @@
218 + #size-cells = <0>;
220 + cpu@0 {
223 + reg = <0>;
261 + opp-freq = <0 1 2 3 4>;
271 + reg = <0x80000000 0x40000000>;
309 + spidev@0 {
311 + reg = <0>;
312 + pl022,interface = <0>;
[all …]
/kernel/linux/patches/linux-5.10/hispark_taurus_patch/
Dhispark_taurus.patch47 index 0b3cd7a33..763d37e86 100644
118 @@ -0,0 +1,270 @@
148 + reg = <0x82000000 0x20000000>;
233 + spidev@0 {
235 + reg = <0>;
236 + pl022,interface = <0>;
237 + pl022,com-mode = <0>;
245 + spidev@0 {
247 + reg = <0>;
248 + pl022,interface = <0>;
[all …]