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/kernel/linux/linux-5.10/sound/pci/echoaudio/
Dmona.c21 #define PX_ANALOG_OUT 0 /* 6 */
28 #define BX_ANALOG_OUT 0 /* 6 */
63 #define FW_361_LOADER 0
73 {0, "loader_dsp.fw"},
74 {0, "mona_301_dsp.fw"},
75 {0, "mona_361_dsp.fw"},
76 {0, "mona_301_1_asic_48.fw"},
77 {0, "mona_301_1_asic_96.fw"},
78 {0, "mona_361_1_asic_48.fw"},
79 {0, "mona_361_1_asic_96.fw"},
[all …]
Ddarla24.c17 #define PX_ANALOG_OUT 0 /* 8 */
18 #define PX_DIGITAL_OUT 8 /* 0 */
20 #define PX_DIGITAL_IN 10 /* 0 */
24 #define BX_ANALOG_OUT 0 /* 8 */
25 #define BX_DIGITAL_OUT 8 /* 0 */
27 #define BX_DIGITAL_IN 10 /* 0 */
52 #define FW_DARLA24_DSP 0
55 {0, "darla24_dsp.fw"}
59 {0x1057, 0x1801, 0xECC0, 0x0040, 0, 0, 0}, /* DSP 56301 Darla24 rev.0 */
60 {0x1057, 0x1801, 0xECC0, 0x0041, 0, 0, 0}, /* DSP 56301 Darla24 rev.1 */
[all …]
Dlayla20.c22 #define PX_ANALOG_OUT 0 /* 10 */
29 #define BX_ANALOG_OUT 0 /* 10 */
59 #define FW_LAYLA20_DSP 0
63 {0, "layla20_dsp.fw"},
64 {0, "layla20_asic.fw"}
68 {0x1057, 0x1801, 0xECC0, 0x0030, 0, 0, 0}, /* DSP 56301 Layla20 rev.0 */
69 {0x1057, 0x1801, 0xECC0, 0x0031, 0, 0, 0}, /* DSP 56301 Layla20 rev.1 */
70 {0,}
Dgina24.c23 #define PX_ANALOG_OUT 0 /* 8 */
30 #define BX_ANALOG_OUT 0 /* 8 */
62 #define FW_361_LOADER 0
69 {0, "loader_dsp.fw"},
70 {0, "gina24_301_dsp.fw"},
71 {0, "gina24_361_dsp.fw"},
72 {0, "gina24_301_asic.fw"},
73 {0, "gina24_361_asic.fw"}
77 {0x1057, 0x1801, 0xECC0, 0x0050, 0, 0, 0}, /* DSP 56301 Gina24 rev.0 */
78 {0x1057, 0x1801, 0xECC0, 0x0051, 0, 0, 0}, /* DSP 56301 Gina24 rev.1 */
[all …]
Ddarla20.c13 #define PX_ANALOG_OUT 0 /* 8 */
14 #define PX_DIGITAL_OUT 8 /* 0 */
16 #define PX_DIGITAL_IN 10 /* 0 */
20 #define BX_ANALOG_OUT 0 /* 8 */
21 #define BX_DIGITAL_OUT 8 /* 0 */
23 #define BX_DIGITAL_IN 10 /* 0 */
48 #define FW_DARLA20_DSP 0
51 {0, "darla20_dsp.fw"}
55 {0x1057, 0x1801, 0xECC0, 0x0010, 0, 0, 0}, /* DSP 56301 Darla20 rev.0 */
56 {0,}
Dgina20.c17 #define PX_ANALOG_OUT 0 /* 8 */
24 #define BX_ANALOG_OUT 0 /* 8 */
52 #define FW_GINA20_DSP 0
55 {0, "gina20_dsp.fw"}
59 {0x1057, 0x1801, 0xECC0, 0x0020, 0, 0, 0}, /* DSP 56301 Gina20 rev.0 */
60 {0,}
/kernel/linux/linux-6.6/sound/pci/echoaudio/
Dmona.c21 #define PX_ANALOG_OUT 0 /* 6 */
28 #define BX_ANALOG_OUT 0 /* 6 */
63 #define FW_361_LOADER 0
73 {0, "loader_dsp.fw"},
74 {0, "mona_301_dsp.fw"},
75 {0, "mona_361_dsp.fw"},
76 {0, "mona_301_1_asic_48.fw"},
77 {0, "mona_301_1_asic_96.fw"},
78 {0, "mona_361_1_asic_48.fw"},
79 {0, "mona_361_1_asic_96.fw"},
[all …]
Ddarla24.c17 #define PX_ANALOG_OUT 0 /* 8 */
18 #define PX_DIGITAL_OUT 8 /* 0 */
20 #define PX_DIGITAL_IN 10 /* 0 */
24 #define BX_ANALOG_OUT 0 /* 8 */
25 #define BX_DIGITAL_OUT 8 /* 0 */
27 #define BX_DIGITAL_IN 10 /* 0 */
52 #define FW_DARLA24_DSP 0
55 {0, "darla24_dsp.fw"}
59 {0x1057, 0x1801, 0xECC0, 0x0040, 0, 0, 0}, /* DSP 56301 Darla24 rev.0 */
60 {0x1057, 0x1801, 0xECC0, 0x0041, 0, 0, 0}, /* DSP 56301 Darla24 rev.1 */
[all …]
Dlayla20.c22 #define PX_ANALOG_OUT 0 /* 10 */
29 #define BX_ANALOG_OUT 0 /* 10 */
59 #define FW_LAYLA20_DSP 0
63 {0, "layla20_dsp.fw"},
64 {0, "layla20_asic.fw"}
68 {0x1057, 0x1801, 0xECC0, 0x0030, 0, 0, 0}, /* DSP 56301 Layla20 rev.0 */
69 {0x1057, 0x1801, 0xECC0, 0x0031, 0, 0, 0}, /* DSP 56301 Layla20 rev.1 */
70 {0,}
Dgina24.c23 #define PX_ANALOG_OUT 0 /* 8 */
30 #define BX_ANALOG_OUT 0 /* 8 */
62 #define FW_361_LOADER 0
69 {0, "loader_dsp.fw"},
70 {0, "gina24_301_dsp.fw"},
71 {0, "gina24_361_dsp.fw"},
72 {0, "gina24_301_asic.fw"},
73 {0, "gina24_361_asic.fw"}
77 {0x1057, 0x1801, 0xECC0, 0x0050, 0, 0, 0}, /* DSP 56301 Gina24 rev.0 */
78 {0x1057, 0x1801, 0xECC0, 0x0051, 0, 0, 0}, /* DSP 56301 Gina24 rev.1 */
[all …]
Ddarla20.c13 #define PX_ANALOG_OUT 0 /* 8 */
14 #define PX_DIGITAL_OUT 8 /* 0 */
16 #define PX_DIGITAL_IN 10 /* 0 */
20 #define BX_ANALOG_OUT 0 /* 8 */
21 #define BX_DIGITAL_OUT 8 /* 0 */
23 #define BX_DIGITAL_IN 10 /* 0 */
48 #define FW_DARLA20_DSP 0
51 {0, "darla20_dsp.fw"}
55 {0x1057, 0x1801, 0xECC0, 0x0010, 0, 0, 0}, /* DSP 56301 Darla20 rev.0 */
56 {0,}
Dgina20.c17 #define PX_ANALOG_OUT 0 /* 8 */
24 #define BX_ANALOG_OUT 0 /* 8 */
52 #define FW_GINA20_DSP 0
55 {0, "gina20_dsp.fw"}
59 {0x1057, 0x1801, 0xECC0, 0x0020, 0, 0, 0}, /* DSP 56301 Gina20 rev.0 */
60 {0,}
Dechoaudio.h99 0-7 Analog outputs (0 .. FirstDigitalBusOut-1)
169 #define VENDOR_ID 0x1057
170 #define DEVICE_ID_56301 0x1801
171 #define DEVICE_ID_56361 0x3410
172 #define SUBVENDOR_ID 0xECC0
178 #define DARLA20 0x0010
179 #define GINA20 0x0020
180 #define LAYLA20 0x0030
181 #define DARLA24 0x0040
182 #define GINA24 0x0050
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/sound/
Dqcom,q6apm-dai.yaml33 iommus = <&apps_smmu 0x1801 0x0>;
Dqcom,q6apm.yaml35 const: 0
50 #size-cells = <0>;
55 #sound-dai-cells = <0>;
60 iommus = <&apps_smmu 0x1801 0x0>;
/kernel/linux/linux-5.10/arch/arm64/boot/dts/renesas/
Dhihope-rev4.dtsi15 * This is same as <&rcar_sound 0>
19 #clock-cells = <0>;
34 x1801_clk: x1801-clock {
36 #clock-cells = <0>;
49 pinctrl-0 = <&i2c2_pins>;
54 #clock-cells = <0>;
56 reg = <0x4f>;
83 pinctrl-0 = <&sound_pins &sound_clk_pins>;
88 #sound-dai-cells = <0>;
/kernel/linux/linux-6.6/arch/arm64/boot/dts/renesas/
Dhihope-rev4.dtsi15 * This is same as <&rcar_sound 0>
19 #clock-cells = <0>;
34 x1801_clk: x1801-clock {
36 #clock-cells = <0>;
49 pinctrl-0 = <&i2c2_pins>;
54 #clock-cells = <0>;
56 reg = <0x4f>;
83 pinctrl-0 = <&sound_pins>, <&sound_clk_pins>;
88 #sound-dai-cells = <0>;
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/soc/qcom/
Dqcom,apr.yaml89 const: 0
156 #size-cells = <0>;
177 #size-cells = <0>;
193 #size-cells = <0>;
198 #sound-dai-cells = <0>;
203 iommus = <&apps_smmu 0x1801 0x0>;
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/perf/
Driscv,pmu.yaml78 value of variant must be 0xffffffff_ffffffff.
104 riscv,event-to-mhpmevent = <0x0000B 0x0000 0x0001>;
105 riscv,event-to-mhpmcounters = <0x00001 0x00001 0x00000001>,
106 <0x00002 0x00002 0x00000004>,
107 <0x00003 0x0000A 0x00000ff8>,
108 <0x10000 0x10033 0x000ff000>;
110 /* For event ID 0x0002 */
111 <0x0000 0x0002 0xffffffff 0xffffffff 0x00000f8>,
112 /* For event ID 0-4 */
113 <0x0 0x0 0xffffffff 0xfffffff0 0x00000ff0>,
[all …]
/kernel/linux/linux-6.6/arch/powerpc/boot/
Dcuboot-pq2.c73 if (!dt_xlate_reg(bus_node, 0, (unsigned long *)&ctrl_addr, in update_cs_ranges()
79 for (i = 0; i < len / sizeof(struct cs_range); i++) { in update_cs_ranges()
85 if (cs_ranges_buf[i].base != 0) in update_cs_ranges()
94 base &= 0x7fff; in update_cs_ranges()
95 option = in_be32(&ctrl_addr[cs * 2 + 1]) & 0x7fff; in update_cs_ranges()
97 base = 0x1801; in update_cs_ranges()
98 option = 0x10; in update_cs_ranges()
101 out_be32(&ctrl_addr[cs * 2], 0); in update_cs_ranges()
134 for (i = 0; i < 3; i++) in fixup_pci()
158 for (i = 0; i < len / sizeof(struct pci_range); i++) { in fixup_pci()
[all …]
/kernel/linux/linux-5.10/arch/powerpc/boot/
Dcuboot-pq2.c73 if (!dt_xlate_reg(bus_node, 0, (unsigned long *)&ctrl_addr, in update_cs_ranges()
79 for (i = 0; i < len / sizeof(struct cs_range); i++) { in update_cs_ranges()
85 if (cs_ranges_buf[i].base != 0) in update_cs_ranges()
94 base &= 0x7fff; in update_cs_ranges()
95 option = in_be32(&ctrl_addr[cs * 2 + 1]) & 0x7fff; in update_cs_ranges()
97 base = 0x1801; in update_cs_ranges()
98 option = 0x10; in update_cs_ranges()
101 out_be32(&ctrl_addr[cs * 2], 0); in update_cs_ranges()
134 for (i = 0; i < 3; i++) in fixup_pci()
158 for (i = 0; i < len / sizeof(struct pci_range); i++) { in fixup_pci()
[all …]
/kernel/linux/linux-5.10/sound/soc/codecs/
Dwm8961.c30 #define WM8961_MAX_REGISTER 0xFC
33 { 0, 0x009F }, /* R0 - Left Input volume */
34 { 1, 0x009F }, /* R1 - Right Input volume */
35 { 2, 0x0000 }, /* R2 - LOUT1 volume */
36 { 3, 0x0000 }, /* R3 - ROUT1 volume */
37 { 4, 0x0020 }, /* R4 - Clocking1 */
38 { 5, 0x0008 }, /* R5 - ADC & DAC Control 1 */
39 { 6, 0x0000 }, /* R6 - ADC & DAC Control 2 */
40 { 7, 0x000A }, /* R7 - Audio Interface 0 */
41 { 8, 0x01F4 }, /* R8 - Clocking2 */
[all …]
/kernel/linux/linux-6.6/sound/soc/codecs/
Dwm8961.c30 #define WM8961_MAX_REGISTER 0xFC
33 { 0, 0x009F }, /* R0 - Left Input volume */
34 { 1, 0x009F }, /* R1 - Right Input volume */
35 { 2, 0x0000 }, /* R2 - LOUT1 volume */
36 { 3, 0x0000 }, /* R3 - ROUT1 volume */
37 { 4, 0x0020 }, /* R4 - Clocking1 */
38 { 5, 0x0008 }, /* R5 - ADC & DAC Control 1 */
39 { 6, 0x0000 }, /* R6 - ADC & DAC Control 2 */
40 { 7, 0x000A }, /* R7 - Audio Interface 0 */
41 { 8, 0x01F4 }, /* R8 - Clocking2 */
[all …]
/kernel/linux/linux-5.10/arch/x86/pci/
Dolpc.c33 * the size of the region by writing ~0 to a base address register
38 * ~0 to a base address register.
41 static const uint32_t lxnb_hdr[] = { /* dev 1 function 0 - devfn = 8 */
42 0x0, 0x0, 0x0, 0x0,
43 0x0, 0x0, 0x0, 0x0,
45 0x281022, 0x2200005, 0x6000021, 0x80f808, /* AMD Vendor ID */
46 0x0, 0x0, 0x0, 0x0, /* No virtual registers, hence no BAR */
47 0x0, 0x0, 0x0, 0x28100b,
48 0x0, 0x0, 0x0, 0x0,
49 0x0, 0x0, 0x0, 0x0,
[all …]
/kernel/linux/linux-6.6/arch/x86/pci/
Dolpc.c33 * the size of the region by writing ~0 to a base address register
38 * ~0 to a base address register.
41 static const uint32_t lxnb_hdr[] = { /* dev 1 function 0 - devfn = 8 */
42 0x0, 0x0, 0x0, 0x0,
43 0x0, 0x0, 0x0, 0x0,
45 0x281022, 0x2200005, 0x6000021, 0x80f808, /* AMD Vendor ID */
46 0x0, 0x0, 0x0, 0x0, /* No virtual registers, hence no BAR */
47 0x0, 0x0, 0x0, 0x28100b,
48 0x0, 0x0, 0x0, 0x0,
49 0x0, 0x0, 0x0, 0x0,
[all …]

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