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/kernel/linux/linux-6.6/arch/arm64/boot/dts/freescale/
Dqoriq-fman3-0.dtsi14 cell-index = <0>;
16 ranges = <0x0 0x0 0x1a00000 0xfe000>;
17 reg = <0x0 0x1a00000 0x0 0xfe000>;
20 clocks = <&clockgen QORIQ_CLK_FMAN 0>;
22 fsl,qman-channel-range = <0x800 0x10>;
26 muram@0 {
28 reg = <0x0 0x60000>;
32 cell-index = <0x2>;
34 reg = <0x82000 0x1000>;
38 cell-index = <0x3>;
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/freescale/
Dqoriq-fman3-0.dtsi12 cell-index = <0>;
14 ranges = <0x0 0x0 0x1a00000 0xfe000>;
15 reg = <0x0 0x1a00000 0x0 0xfe000>;
18 clocks = <&clockgen 3 0>;
20 fsl,qman-channel-range = <0x800 0x10>;
24 muram@0 {
26 reg = <0x0 0x60000>;
30 cell-index = <0x2>;
32 reg = <0x82000 0x1000>;
36 cell-index = <0x3>;
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/msm/
Dmdp5.txt63 Port 0 -> MDP_INTF0 (eDP)
69 Port 0 -> MDP_INTF1 (DSI1)
72 Port 0 -> MDP_INTF1 (DSI1)
89 reg = <0x1a00000 0x1000>,
90 <0x1ac8000 0x3000>;
102 interrupts = <0 72 0>;
113 reg = <0x1a01000 0x90000>;
117 interrupts = <0 0>;
130 #size-cells = <0>;
132 port@0 {
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/msm/
Dqcom,mdss.yaml19 pattern: "^display-subsystem@[0-9a-f]+$"
102 "^display-controller@[1-9a-f][0-9a-f]*$":
110 "^dsi@[1-9a-f][0-9a-f]*$":
118 "^phy@[1-9a-f][0-9a-f]*$":
137 "^hdmi-tx@[1-9a-f][0-9a-f]*$":
158 reg = <0x1a00000 0x1000>,
159 <0x1ac8000 0x3000>;
182 reg = <0x01a01000 0x89000>;
186 interrupts = <0>;
201 #size-cells = <0>;
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/airoha/
Den7523.dtsi20 reg = <0x84000000 0xA00000>;
25 reg = <0x84B00000 0x100000>;
30 reg = <0x85000000 0x1A00000>;
35 reg = <0x86B00000 0x100000>;
40 reg = <0x86D00000 0x100000>;
51 #size-cells = <0>;
64 cpu0: cpu@0 {
67 reg = <0x0>;
76 reg = <0x1>;
91 reg = <0x1fa20000 0x400>,
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/qcom/
Dmsm8992-lg-bullhead.dtsi26 qcom,msm-id = <251 0>, <252 0>;
27 qcom,pmic-id = <0x10009 0x1000A 0x0 0x0>;
47 reg = <0x0 0x1ff00000 0x0 0x40000>;
48 console-size = <0x10000>;
49 record-size = <0x10000>;
50 ftrace-size = <0x10000>;
51 pmsg-size = <0x20000>;
55 reg = <0 0x03400000 0 0xc00000>;
60 reg = <0x0 0x05000000 0x0 0x1a00000>;
71 pm8994_regulators: regulators-0 {
Dsdm850-lenovo-yoga-c630.dts44 pinctrl-0 = <&lid_pin_active>, <&mode_pin_active>;
64 reg = <0 0x8c400000 0 0x100000>;
69 reg = <0 0x8c515000 0 0x2000>;
74 reg = <0 0x8c517000 0 0x5a000>;
79 reg = <0 0x8c600000 0 0x1a00000>;
91 pinctrl-0 = <&sw_edp_1p2_en>;
102 #clock-cells = <0>;
139 regulators-0 {
378 /* Overwrite pinctrl-0 from sdm845.dtsi */
379 pinctrl-0 = <&qup_i2c3_default &i2c3_hid_active>;
[all …]
Dmsm8996-sony-xperia-tone.dtsi24 qcom,msm-id = <246 0x30001>; /* MSM8996 V3.1 (Final) */
25 qcom,board-id = <8 0>;
34 reg = <0 0xa7f00000 0 0x100000>;
35 record-size = <0x20000>;
36 console-size = <0x40000>;
37 ftrace-size = <0x20000>;
38 pmsg-size = <0x20000>;
43 reg = <0x0 0x8ea00000 0x0 0x1a00000>;
49 reg = <0x0 0x90400000 0x0 0x2000>;
54 reg = <0 0x90500000 0 0xa00000>;
[all …]
Dqcs404.dtsi24 #clock-cells = <0>;
30 #clock-cells = <0>;
37 #size-cells = <0>;
42 reg = <0x100>;
56 reg = <0x101>;
70 reg = <0x102>;
84 reg = <0x103>;
104 CPU_SLEEP_0: cpu-sleep-0 {
107 arm,psci-suspend-param = <0x40000003>;
161 reg = <0 0x80000000 0 0>;
[all …]
Dmsm8998.dtsi15 qcom,msm-id = <292 0x0>;
25 reg = <0x0 0x80000000 0x0 0x0>;
34 reg = <0x0 0x85800000 0x0 0x600000>;
39 reg = <0x0 0x85e00000 0x0 0x100000>;
44 reg = <0x0 0x86000000 0x0 0x200000>;
49 reg = <0x0 0x86200000 0x0 0x2d00000>;
55 reg = <0x0 0x88f00000 0x0 0x200000>;
63 reg = <0x0 0x8ab00000 0x0 0x700000>;
68 reg = <0x0 0x8b200000 0x0 0x1a00000>;
73 reg = <0x0 0x8cc00000 0x0 0x7000000>;
[all …]
Dsm8150.dtsi30 #clock-cells = <0>;
37 #clock-cells = <0>;
45 #size-cells = <0>;
47 CPU0: cpu@0 {
50 reg = <0x0 0x0>;
51 clocks = <&cpufreq_hw 0>;
56 qcom,freq-domain = <&cpufreq_hw 0>;
58 interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
79 reg = <0x0 0x100>;
80 clocks = <&cpufreq_hw 0>;
[all …]
Dsdm845.dtsi76 #clock-cells = <0>;
83 #clock-cells = <0>;
90 #size-cells = <0>;
92 CPU0: cpu@0 {
95 reg = <0x0 0x0>;
96 clocks = <&cpufreq_hw 0>;
100 qcom,freq-domain = <&cpufreq_hw 0>;
124 reg = <0x0 0x100>;
125 clocks = <&cpufreq_hw 0>;
129 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
/kernel/linux/linux-5.10/arch/mips/include/asm/sn/sn0/
Dkldir.h28 * 0x2000000 (32M) +-----------------------------------------+
30 * 0x1F80000 (31.5M) +-----------------------------------------+
32 * 0x1C00000 (30M) +-----------------------------------------+
34 * 0x0800000 (28M) +-----------------------------------------+
36 * 0x1B00000 (27M) +-----------------------------------------+
38 * 0x1A00000 (26M) +-----------------------------------------+
40 * 0x1800000 (24M) +-----------------------------------------+
42 * 0x1600000 (22M) +-----------------------------------------+
48 * 0x190000 (2M--) +-----------------------------------------+
51 * 0x34000 (208K) +-----------------------------------------+
[all …]
/kernel/linux/linux-6.6/arch/mips/include/asm/sn/sn0/
Dkldir.h28 * 0x2000000 (32M) +-----------------------------------------+
30 * 0x1F80000 (31.5M) +-----------------------------------------+
32 * 0x1C00000 (30M) +-----------------------------------------+
34 * 0x0800000 (28M) +-----------------------------------------+
36 * 0x1B00000 (27M) +-----------------------------------------+
38 * 0x1A00000 (26M) +-----------------------------------------+
40 * 0x1800000 (24M) +-----------------------------------------+
42 * 0x1600000 (22M) +-----------------------------------------+
48 * 0x190000 (2M--) +-----------------------------------------+
51 * 0x34000 (208K) +-----------------------------------------+
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/marvell/octeontx2/af/
Drvu_reg.h15 #define RVU_AF_MSIXTR_BASE (0x10)
16 #define RVU_AF_ECO (0x20)
17 #define RVU_AF_BLK_RST (0x30)
18 #define RVU_AF_PF_BAR4_ADDR (0x40)
19 #define RVU_AF_RAS (0x100)
20 #define RVU_AF_RAS_W1S (0x108)
21 #define RVU_AF_RAS_ENA_W1S (0x110)
22 #define RVU_AF_RAS_ENA_W1C (0x118)
23 #define RVU_AF_GEN_INT (0x120)
24 #define RVU_AF_GEN_INT_W1S (0x128)
[all …]
/kernel/linux/linux-6.6/drivers/net/ethernet/marvell/octeontx2/af/
Drvu_reg.h12 #define RVU_AF_MSIXTR_BASE (0x10)
13 #define RVU_AF_ECO (0x20)
14 #define RVU_AF_BLK_RST (0x30)
15 #define RVU_AF_PF_BAR4_ADDR (0x40)
16 #define RVU_AF_RAS (0x100)
17 #define RVU_AF_RAS_W1S (0x108)
18 #define RVU_AF_RAS_ENA_W1S (0x110)
19 #define RVU_AF_RAS_ENA_W1C (0x118)
20 #define RVU_AF_GEN_INT (0x120)
21 #define RVU_AF_GEN_INT_W1S (0x128)
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/qcom/
Dqcs404.dtsi22 #clock-cells = <0>;
28 #clock-cells = <0>;
35 #size-cells = <0>;
40 reg = <0x100>;
54 reg = <0x101>;
68 reg = <0x102>;
82 reg = <0x103>;
101 CPU_SLEEP_0: cpu-sleep-0 {
104 arm,psci-suspend-param = <0x40000003>;
158 reg = <0 0x80000000 0 0>;
[all …]
Dsm8150.dtsi28 #clock-cells = <0>;
35 #clock-cells = <0>;
43 #size-cells = <0>;
45 CPU0: cpu@0 {
48 reg = <0x0 0x0>;
51 qcom,freq-domain = <&cpufreq_hw 0>;
65 reg = <0x0 0x100>;
68 qcom,freq-domain = <&cpufreq_hw 0>;
80 reg = <0x0 0x200>;
83 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
Dmsm8998.dtsi14 qcom,msm-id = <292 0x0>;
24 reg = <0 0 0 0>;
33 reg = <0x0 0x85800000 0x0 0x600000>;
38 reg = <0x0 0x85e00000 0x0 0x100000>;
43 reg = <0x0 0x86000000 0x0 0x200000>;
48 reg = <0x0 0x86200000 0x0 0x2d00000>;
54 reg = <0x0 0x88f00000 0x0 0x200000>;
62 reg = <0x0 0x8ab00000 0x0 0x700000>;
67 reg = <0x0 0x8b200000 0x0 0x1a00000>;
72 reg = <0x0 0x8cc00000 0x0 0x7000000>;
[all …]
Dmsm8996.dtsi22 #clock-cells = <0>;
29 #clock-cells = <0>;
37 #size-cells = <0>;
39 CPU0: cpu@0 {
42 reg = <0x0 0x0>;
56 reg = <0x0 0x1>;
66 reg = <0x0 0x100>;
80 reg = <0x0 0x101>;
112 CPU_SLEEP_0: cpu-sleep-0 {
115 arm,psci-suspend-param = <0x00000004>;
[all …]
Dsdm845.dtsi73 reg = <0 0x80000000 0 0>;
82 reg = <0 0x85700000 0 0x600000>;
87 reg = <0 0x85e00000 0 0x100000>;
92 reg = <0 0x85fc0000 0 0x20000>;
98 reg = <0x0 0x85fe0000 0 0x20000>;
103 reg = <0x0 0x86000000 0 0x200000>;
108 reg = <0 0x86200000 0 0x2d00000>;
114 reg = <0 0x88f00000 0 0x200000>;
122 reg = <0 0x8ab00000 0 0x1400000>;
127 reg = <0 0x8bf00000 0 0x500000>;
[all …]