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12

/kernel/linux/linux-6.6/drivers/video/backlight/
Dlms283gf05.c33 { 0x07, 0x0000, 0 },
34 { 0x13, 0x0000, 10 },
36 { 0x11, 0x3004, 0 },
37 { 0x14, 0x200F, 0 },
38 { 0x10, 0x1a20, 0 },
39 { 0x13, 0x0040, 50 },
41 { 0x13, 0x0060, 0 },
42 { 0x13, 0x0070, 200 },
44 { 0x01, 0x0127, 0 },
45 { 0x02, 0x0700, 0 },
[all …]
/kernel/linux/linux-5.10/drivers/video/backlight/
Dlms283gf05.c33 { 0x07, 0x0000, 0 },
34 { 0x13, 0x0000, 10 },
36 { 0x11, 0x3004, 0 },
37 { 0x14, 0x200F, 0 },
38 { 0x10, 0x1a20, 0 },
39 { 0x13, 0x0040, 50 },
41 { 0x13, 0x0060, 0 },
42 { 0x13, 0x0070, 200 },
44 { 0x01, 0x0127, 0 },
45 { 0x02, 0x0700, 0 },
[all …]
/kernel/linux/linux-5.10/drivers/net/wireless/realtek/rtw88/
Drtw8822c.h11 u8 res0[0x30]; /* 0x120 */
12 u8 vid[2]; /* 0x150 */
15 u8 mac_addr[ETH_ALEN]; /* 0x157 */
16 u8 res2[0x3d];
20 u8 mac_addr[ETH_ALEN]; /* 0x120 */
28 u8 ltr_cap; /* 0x133 */
33 u8 res0:2; /* 0x144 */
57 u8 res0[0x0e];
62 u8 channel_plan; /* 0xb8 */
66 u8 res2[5]; /* 0xbc */
[all …]
/kernel/linux/linux-5.10/include/video/
Daty128.h13 #define CLOCK_CNTL_INDEX 0x0008
14 #define CLOCK_CNTL_DATA 0x000c
15 #define BIOS_0_SCRATCH 0x0010
16 #define BUS_CNTL 0x0030
17 #define BUS_CNTL1 0x0034
18 #define GEN_INT_CNTL 0x0040
19 #define CRTC_GEN_CNTL 0x0050
20 #define CRTC_EXT_CNTL 0x0054
21 #define DAC_CNTL 0x0058
22 #define I2C_CNTL_1 0x0094
[all …]
/kernel/linux/linux-6.6/include/video/
Daty128.h13 #define CLOCK_CNTL_INDEX 0x0008
14 #define CLOCK_CNTL_DATA 0x000c
15 #define BIOS_0_SCRATCH 0x0010
16 #define BUS_CNTL 0x0030
17 #define BUS_CNTL1 0x0034
18 #define GEN_INT_CNTL 0x0040
19 #define CRTC_GEN_CNTL 0x0050
20 #define CRTC_EXT_CNTL 0x0054
21 #define DAC_CNTL 0x0058
22 #define I2C_CNTL_1 0x0094
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/pinctrl/
Dsamsung,pinctrl.yaml78 "^[a-z]+[0-9]*-gpio-bank$":
143 reg = <0x7f008000 0x1000>;
149 interrupts-extended = <&vic0 0>,
151 <&vic1 0>,
166 samsung,pins = "gpa-0", "gpa-1";
168 samsung,pin-pud = <0>;
179 reg = <0x11400000 0x1000>;
183 pinctrl-0 = <&sleep0>;
196 samsung,pins = "gpa0-0", "gpa0-1";
198 samsung,pin-pud = <0>;
[all …]
/kernel/linux/linux-6.6/drivers/media/pci/cx25821/
Dcx25821-medusa-reg.h13 #define HOST_REGISTER1 0x0000
14 #define HOST_REGISTER2 0x0001
17 #define CHIP_CTRL 0x0100
18 #define AFE_AB_CTRL 0x0104
19 #define AFE_CD_CTRL 0x0108
20 #define AFE_EF_CTRL 0x010C
21 #define AFE_GH_CTRL 0x0110
22 #define DENC_AB_CTRL 0x0114
23 #define BYP_AB_CTRL 0x0118
24 #define MON_A_CTRL 0x011C
[all …]
/kernel/linux/linux-5.10/drivers/media/pci/cx25821/
Dcx25821-medusa-reg.h13 #define HOST_REGISTER1 0x0000
14 #define HOST_REGISTER2 0x0001
17 #define CHIP_CTRL 0x0100
18 #define AFE_AB_CTRL 0x0104
19 #define AFE_CD_CTRL 0x0108
20 #define AFE_EF_CTRL 0x010C
21 #define AFE_GH_CTRL 0x0110
22 #define DENC_AB_CTRL 0x0114
23 #define BYP_AB_CTRL 0x0118
24 #define MON_A_CTRL 0x011C
[all …]
/kernel/linux/linux-6.6/drivers/net/wireless/realtek/rtw88/
Drtw8822c.h11 u8 res0[0x30]; /* 0x120 */
12 u8 vid[2]; /* 0x150 */
15 u8 mac_addr[ETH_ALEN]; /* 0x157 */
16 u8 res2[0x3d];
20 u8 res0[0x4a]; /* 0x120 */
21 u8 mac_addr[ETH_ALEN]; /* 0x16a */
25 u8 mac_addr[ETH_ALEN]; /* 0x120 */
33 u8 ltr_cap; /* 0x133 */
38 u8 res0:2; /* 0x144 */
62 u8 res0[0x0e];
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/loongson/
Dlsdc_regs.h24 #define LS7A1000_PIXPLL0_REG 0x04B0
25 #define LS7A1000_PIXPLL1_REG 0x04C0
28 #define LS7A1000_PLL_GFX_REG 0x0490
30 #define LS7A1000_CONF_REG_BASE 0x10010000
34 #define LS7A2000_PIXPLL0_REG 0x04B0
35 #define LS7A2000_PIXPLL1_REG 0x04C0
38 #define LS7A2000_PLL_GFX_REG 0x0490
40 #define LS7A2000_CONF_REG_BASE 0x10010000
43 #define CFG_PIX_FMT_MASK GENMASK(2, 0)
46 LSDC_PF_NONE = 0,
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/
Dsamsung-pinctrl.txt39 reg = <0x10580000 0x1a20>, <0x11090000 0x100>;
43 interrupts = <0 16 0>;
56 Eg: <&gpx2 6 0>
62 - Pin number: is a value between 0 to 7.
63 - Flags: 0 - Active High
82 as "gpa0-0", "gpa0-1", "gpa0-2" and so on. The names should be in lower case.
212 reg = <0x11400000 0x1000>;
213 interrupts = <0 47 0>;
243 interrupts = <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
244 <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>;
[all …]
/kernel/linux/linux-5.10/drivers/net/usb/
Daqc111.c33 if (unlikely(ret < 0)) in aqc111_read_cmd_nopm()
35 "Failed to read(0x%x) reg index 0x%04x: %d\n", in aqc111_read_cmd_nopm()
49 if (unlikely(ret < 0)) in aqc111_read_cmd()
51 "Failed to read(0x%x) reg index 0x%04x: %d\n", in aqc111_read_cmd()
60 int ret = 0; in aqc111_read16_cmd_nopm()
71 int ret = 0; in aqc111_read16_cmd()
95 err = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0), in __aqc111_write_cmd()
100 if (unlikely(err < 0)) in __aqc111_write_cmd()
102 "Failed to write(0x%x) reg index 0x%04x: %d\n", in __aqc111_write_cmd()
126 if (usb_autopm_get_interface(dev->intf) < 0) in aqc111_write_cmd()
[all …]
/kernel/linux/linux-6.6/drivers/net/usb/
Daqc111.c33 if (unlikely(ret < 0)) in aqc111_read_cmd_nopm()
35 "Failed to read(0x%x) reg index 0x%04x: %d\n", in aqc111_read_cmd_nopm()
49 if (unlikely(ret < 0)) in aqc111_read_cmd()
51 "Failed to read(0x%x) reg index 0x%04x: %d\n", in aqc111_read_cmd()
60 int ret = 0; in aqc111_read16_cmd_nopm()
71 int ret = 0; in aqc111_read16_cmd()
95 err = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0), in __aqc111_write_cmd()
100 if (unlikely(err < 0)) in __aqc111_write_cmd()
102 "Failed to write(0x%x) reg index 0x%04x: %d\n", in __aqc111_write_cmd()
126 if (usb_autopm_get_interface(dev->intf) < 0) in aqc111_write_cmd()
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/marvell/octeontx2/af/
Drvu_reg.h15 #define RVU_AF_MSIXTR_BASE (0x10)
16 #define RVU_AF_ECO (0x20)
17 #define RVU_AF_BLK_RST (0x30)
18 #define RVU_AF_PF_BAR4_ADDR (0x40)
19 #define RVU_AF_RAS (0x100)
20 #define RVU_AF_RAS_W1S (0x108)
21 #define RVU_AF_RAS_ENA_W1S (0x110)
22 #define RVU_AF_RAS_ENA_W1C (0x118)
23 #define RVU_AF_GEN_INT (0x120)
24 #define RVU_AF_GEN_INT_W1S (0x128)
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/mediatek/
Dmtk_eth_soc.h21 #define MTK_TX_DMA_BUF_LEN 0x3fff
27 #define MTK_DMA_DUMMY_DESC 0xffffffff
61 #define MTK_RST_GL 0x04
62 #define RST_GL_PSE BIT(0)
65 #define MTK_INT_STATUS2 0x08
70 #define MTK_PDMA_LRO_ALT_REFRESH_TIMER 0x1c
73 #define MTK_FE_INT_GRP 0x20
76 #define MTK_CDMQ_IG_CTRL 0x1400
77 #define MTK_CDMQ_STAG_EN BIT(0)
80 #define MTK_CDMP_EG_CTRL 0x404
[all …]
/kernel/linux/linux-6.6/drivers/staging/rtl8723bs/hal/
Dhal_com_phycfg.c17 u8 value = 0; in PHY_GetTxPowerByRateBase()
20 return 0; in PHY_GetTxPowerByRateBase()
24 value = pHalData->TxPwrByRateBase2_4G[RfPath][0]; in PHY_GetTxPowerByRateBase()
50 pHalData->TxPwrByRateBase2_4G[RfPath][0] = Value; in phy_SetTxPowerByRateBase()
88 u8 index = 0; in PHY_GetRateSectionIndexOfTxPowerByRate()
90 if (pDM_Odm->PhyRegPgVersion == 0) { in PHY_GetRateSectionIndexOfTxPowerByRate()
93 index = 0; in PHY_GetRateSectionIndexOfTxPowerByRate()
104 else if (BitMask == 0x000000ff) in PHY_GetRateSectionIndexOfTxPowerByRate()
148 u8 i = 0; in PHY_GetRateValuesOfTxPowerByRate()
153 RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate(MGN_6M); in PHY_GetRateValuesOfTxPowerByRate()
[all …]
/kernel/linux/linux-6.6/include/linux/mfd/mt6357/
Dregisters.h10 #define MT6357_TOP0_ID 0x0
11 #define MT6357_TOP0_REV0 0x2
12 #define MT6357_TOP0_DSN_DBI 0x4
13 #define MT6357_TOP0_DSN_DXI 0x6
14 #define MT6357_HWCID 0x8
15 #define MT6357_SWCID 0xa
16 #define MT6357_PONSTS 0xc
17 #define MT6357_POFFSTS 0xe
18 #define MT6357_PSTSCTL 0x10
19 #define MT6357_PG_DEB_STS0 0x12
[all …]
/kernel/linux/linux-6.6/drivers/net/ethernet/marvell/octeontx2/af/
Drvu_reg.h12 #define RVU_AF_MSIXTR_BASE (0x10)
13 #define RVU_AF_ECO (0x20)
14 #define RVU_AF_BLK_RST (0x30)
15 #define RVU_AF_PF_BAR4_ADDR (0x40)
16 #define RVU_AF_RAS (0x100)
17 #define RVU_AF_RAS_W1S (0x108)
18 #define RVU_AF_RAS_ENA_W1S (0x110)
19 #define RVU_AF_RAS_ENA_W1C (0x118)
20 #define RVU_AF_GEN_INT (0x120)
21 #define RVU_AF_GEN_INT_W1S (0x128)
[all …]
/kernel/linux/linux-5.10/arch/sh/kernel/cpu/sh4a/
Dsetup-sh7757.c30 DEFINE_RES_MEM(0xfe4b0000, 0x100), /* SCIF2 */
31 DEFINE_RES_IRQ(evt2irq(0x700)),
36 .id = 0,
50 DEFINE_RES_MEM(0xfe4c0000, 0x100), /* SCIF3 */
51 DEFINE_RES_IRQ(evt2irq(0xb80)),
70 DEFINE_RES_MEM(0xfe4d0000, 0x100), /* SCIF4 */
71 DEFINE_RES_IRQ(evt2irq(0xf00)),
89 DEFINE_RES_MEM(0xfe430000, 0x20),
90 DEFINE_RES_IRQ(evt2irq(0x580)),
91 DEFINE_RES_IRQ(evt2irq(0x5a0)),
[all …]
/kernel/linux/linux-6.6/arch/sh/kernel/cpu/sh4a/
Dsetup-sh7757.c30 DEFINE_RES_MEM(0xfe4b0000, 0x100), /* SCIF2 */
31 DEFINE_RES_IRQ(evt2irq(0x700)),
36 .id = 0,
50 DEFINE_RES_MEM(0xfe4c0000, 0x100), /* SCIF3 */
51 DEFINE_RES_IRQ(evt2irq(0xb80)),
70 DEFINE_RES_MEM(0xfe4d0000, 0x100), /* SCIF4 */
71 DEFINE_RES_IRQ(evt2irq(0xf00)),
89 DEFINE_RES_MEM(0xfe430000, 0x20),
90 DEFINE_RES_IRQ(evt2irq(0x580)),
91 DEFINE_RES_IRQ(evt2irq(0x5a0)),
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/meson/
Dmeson_registers.h18 #define VPP2_DUMMY_DATA 0x1900
19 #define VPP2_LINE_IN_LENGTH 0x1901
20 #define VPP2_PIC_IN_HEIGHT 0x1902
21 #define VPP2_SCALE_COEF_IDX 0x1903
22 #define VPP2_SCALE_COEF 0x1904
23 #define VPP2_VSC_REGION12_STARTP 0x1905
24 #define VPP2_VSC_REGION34_STARTP 0x1906
25 #define VPP2_VSC_REGION4_ENDP 0x1907
26 #define VPP2_VSC_START_PHASE_STEP 0x1908
27 #define VPP2_VSC_REGION0_PHASE_SLOPE 0x1909
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/meson/
Dmeson_registers.h18 #define VPP2_DUMMY_DATA 0x1900
19 #define VPP2_LINE_IN_LENGTH 0x1901
20 #define VPP2_PIC_IN_HEIGHT 0x1902
21 #define VPP2_SCALE_COEF_IDX 0x1903
22 #define VPP2_SCALE_COEF 0x1904
23 #define VPP2_VSC_REGION12_STARTP 0x1905
24 #define VPP2_VSC_REGION34_STARTP 0x1906
25 #define VPP2_VSC_REGION4_ENDP 0x1907
26 #define VPP2_VSC_START_PHASE_STEP 0x1908
27 #define VPP2_VSC_REGION0_PHASE_SLOPE 0x1909
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h26 #define ixATTR00 0x0000
27 #define ixATTR01 0x0001
28 #define ixATTR02 0x0002
29 #define ixATTR03 0x0003
30 #define ixATTR04 0x0004
31 #define ixATTR05 0x0005
32 #define ixATTR06 0x0006
33 #define ixATTR07 0x0007
34 #define ixATTR08 0x0008
35 #define ixATTR09 0x0009
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h26 #define ixATTR00 0x0000
27 #define ixATTR01 0x0001
28 #define ixATTR02 0x0002
29 #define ixATTR03 0x0003
30 #define ixATTR04 0x0004
31 #define ixATTR05 0x0005
32 #define ixATTR06 0x0006
33 #define ixATTR07 0x0007
34 #define ixATTR08 0x0008
35 #define ixATTR09 0x0009
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/exynos/
Dexynos5433.dtsi48 #clock-cells = <0>;
53 #size-cells = <0>;
59 reg = <0x100>;
71 reg = <0x101>;
81 reg = <0x102>;
91 reg = <0x103>;
97 cpu4: cpu@0 {
101 reg = <0x0>;
113 reg = <0x1>;
123 reg = <0x2>;
[all …]

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