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/kernel/linux/linux-6.6/arch/arm64/boot/dts/freescale/
Dfsl-ls1028a-kontron-sl28.dts85 reg = <0x5>;
95 nvmem-cells = <&base_mac_address 0>;
118 flash@0 {
122 reg = <0>;
132 partition@0 {
133 reg = <0x000000 0x010000>;
139 reg = <0x010000 0x1d0000>;
145 reg = <0x200000 0x010000>;
150 reg = <0x210000 0x1d0000>;
155 reg = <0x3e0000 0x020000>;
[all …]
Dimx8mq-librem5.dtsi29 #clock-cells = <0>;
41 pinctrl-0 = <&pinctrl_keys>;
68 led-0 {
70 pwms = <&pwm2 0 50000 0>;
75 pwms = <&pwm4 0 50000 0>;
80 pwms = <&pwm3 0 50000 0>;
88 pinctrl-0 = <&pinctrl_audiopwr>;
115 gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
135 gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
142 pinctrl-0 = <&pinctrl_gnsspwr>;
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/
Dfsl,imx8-acm.yaml227 reg = <0x59e00000 0x1d0000>;
/kernel/linux/linux-5.10/arch/arm64/boot/dts/freescale/
Dfsl-ls1028a-kontron-sl28.dts83 #size-cells = <0>;
86 reg = <0x5>;
111 flash@0 {
117 reg = <0>;
122 partition@0 {
123 reg = <0x000000 0x010000>;
129 reg = <0x010000 0x0f0000>;
135 reg = <0x100000 0x040000>;
141 reg = <0x140000 0x0a0000>;
147 reg = <0x1e0000 0x020000>;
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/i915/
Dintel_uncore.c66 uncore->debug->unclaimed_mmio_check = 0; in mmio_debug_suspend()
115 if (id >= 0 && id < FW_DOMAIN_ID_COUNT) in intel_uncore_forcewake_domain_to_str()
137 fw_clear(d, 0xefff); in fw_domain_reset()
139 fw_clear(d, 0xffff); in fw_domain_reset()
167 return __wait_for_ack(d, ack, 0); in wait_ack_clear()
183 if (fw_ack(d) == ~0) in fw_domain_wait_ack_clear()
185 "%s: MMIO unreliable (forcewake register returns 0xFFFFFFFF)!\n", in fw_domain_wait_ack_clear()
196 ACK_CLEAR = 0,
205 const u32 value = type == ACK_SET ? ack_bit : 0; in fw_domain_wait_ack_with_fallback()
238 "%s had to use fallback to %s ack, 0x%x (passes %u)\n", in fw_domain_wait_ack_with_fallback()
[all …]
Di915_reg.h106 * #define _FOO_A 0xf000
107 * #define _FOO_B 0xf001
111 * #define FOO_MODE_BAR REG_FIELD_PREP(FOO_MODE_MASK, 0)
115 * #define BAR _MMIO(0xb000)
116 * #define GEN8_BAR _MMIO(0xb888)
119 #define GU_CNTL_PROTECTED _MMIO(0x10100C)
122 #define GU_CNTL _MMIO(0x101010)
125 #define GU_DEBUG _MMIO(0x101018)
128 #define GEN6_STOLEN_RESERVED _MMIO(0x1082C0)
129 #define GEN6_STOLEN_RESERVED_ADDR_MASK (0xFFF << 20)
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/arm/
Djuno-motherboard.dtsi13 #clock-cells = <0>;
20 #clock-cells = <0>;
27 #clock-cells = <0>;
34 #clock-cells = <0>;
55 gpios = <&iofpga_gpio0 0 0x4>;
62 gpios = <&iofpga_gpio0 1 0x4>;
69 gpios = <&iofpga_gpio0 2 0x4>;
76 gpios = <&iofpga_gpio0 3 0x4>;
83 gpios = <&iofpga_gpio0 4 0x4>;
90 gpios = <&iofpga_gpio0 5 0x4>;
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/arm/
Djuno-motherboard.dtsi13 #clock-cells = <0>;
20 #clock-cells = <0>;
27 #clock-cells = <0>;
34 #clock-cells = <0>;
55 gpios = <&iofpga_gpio0 0 0x4>;
62 gpios = <&iofpga_gpio0 1 0x4>;
69 gpios = <&iofpga_gpio0 2 0x4>;
76 gpios = <&iofpga_gpio0 3 0x4>;
83 gpios = <&iofpga_gpio0 4 0x4>;
90 gpios = <&iofpga_gpio0 5 0x4>;
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/
Dintel_uncore.c51 mmio_debug->unclaimed_mmio_check = 0; in mmio_debug_suspend()
80 if (id >= 0 && id < FW_DOMAIN_ID_COUNT) in intel_uncore_forcewake_domain_to_str()
101 fw_clear(d, 0xffff); in fw_domain_reset()
129 return __wait_for_ack(d, ack, 0); in wait_ack_clear()
150 ACK_CLEAR = 0,
159 const u32 value = type == ACK_SET ? ack_bit : 0; in fw_domain_wait_ack_with_fallback()
191 DRM_DEBUG_DRIVER("%s had to use fallback to %s ack, 0x%x (passes %u)\n", in fw_domain_wait_ack_with_fallback()
197 return ack_detected ? 0 : -ETIMEDOUT; in fw_domain_wait_ack_with_fallback()
324 * w/a for a sporadic read returning 0 by waiting for the GT in __gen6_gt_wait_for_thread_c0()
328 wait_for_atomic_us(gt_thread_status(uncore) == 0, 5000), in __gen6_gt_wait_for_thread_c0()
[all …]
Di915_reg.h106 * #define _FOO_A 0xf000
107 * #define _FOO_B 0xf001
111 * #define FOO_MODE_BAR REG_FIELD_PREP(FOO_MODE_MASK, 0)
115 * #define BAR _MMIO(0xb000)
116 * #define GEN8_BAR _MMIO(0xb888)
121 * @__n: 0-based bit number
130 ((__n) < 0 || (__n) > 31))))
134 * @__high: 0-based high bit
135 * @__low: 0-based low bit
145 ((__low) < 0 || (__high) > 31 || (__low) > (__high)))))
[all …]
/kernel/linux/linux-6.6/drivers/media/common/saa7146/
Dsaa7146_vbi.c13 int count = 0; in vbi_workaround()
34 saa7146_write(dev, BASE_PAGE3, 0x0); in vbi_workaround()
35 saa7146_write(dev, NUM_LINE_BYTE3, (2<<16)|((vbi_pixel_to_capture)<<0)); in vbi_workaround()
41 WRITE_RPS1(0xc000008c); in vbi_workaround()
43 if ( 0 != (SAA7146_USE_PORT_B_FOR_VBI & dev->ext_vv_data->flags)) { in vbi_workaround()
86 for(i = 0; i < 2; i++) { in vbi_workaround()
91 saa7146_write(dev, NUM_LINE_BYTE3, (1<<16)|(2<<0)); in vbi_workaround()
120 DEB_VBI("aborted (rps:0x%08x)\n", in vbi_workaround()
132 return 0; in vbi_workaround()
141 int count = 0; in saa7146_set_vbi_capture()
[all …]
/kernel/linux/linux-5.10/drivers/media/common/saa7146/
Dsaa7146_vbi.c13 int count = 0; in vbi_workaround()
34 saa7146_write(dev, BASE_PAGE3, 0x0); in vbi_workaround()
35 saa7146_write(dev, NUM_LINE_BYTE3, (2<<16)|((vbi_pixel_to_capture)<<0)); in vbi_workaround()
41 WRITE_RPS1(0xc000008c); in vbi_workaround()
43 if ( 0 != (SAA7146_USE_PORT_B_FOR_VBI & dev->ext_vv_data->flags)) { in vbi_workaround()
86 for(i = 0; i < 2; i++) { in vbi_workaround()
91 saa7146_write(dev, NUM_LINE_BYTE3, (1<<16)|(2<<0)); in vbi_workaround()
120 DEB_VBI("aborted (rps:0x%08x)\n", in vbi_workaround()
132 return 0; in vbi_workaround()
141 int count = 0; in saa7146_set_vbi_capture()
[all …]
/kernel/linux/linux-5.10/drivers/net/wireless/ath/carl9170/
Dhw.h43 #define AR9170_UART_REG_BASE 0x1c0000
46 #define AR9170_UART_REG_RX_BUFFER (AR9170_UART_REG_BASE + 0x000)
47 #define AR9170_UART_REG_TX_HOLDING (AR9170_UART_REG_BASE + 0x004)
48 #define AR9170_UART_REG_FIFO_CONTROL (AR9170_UART_REG_BASE + 0x010)
49 #define AR9170_UART_FIFO_CTRL_RESET_RX_FIFO 0x02
50 #define AR9170_UART_FIFO_CTRL_RESET_TX_FIFO 0x04
52 #define AR9170_UART_REG_LINE_CONTROL (AR9170_UART_REG_BASE + 0x014)
53 #define AR9170_UART_REG_MODEM_CONTROL (AR9170_UART_REG_BASE + 0x018)
54 #define AR9170_UART_MODEM_CTRL_DTR_BIT 0x01
55 #define AR9170_UART_MODEM_CTRL_RTS_BIT 0x02
[all …]
/kernel/linux/linux-6.6/drivers/net/wireless/ath/carl9170/
Dhw.h43 #define AR9170_UART_REG_BASE 0x1c0000
46 #define AR9170_UART_REG_RX_BUFFER (AR9170_UART_REG_BASE + 0x000)
47 #define AR9170_UART_REG_TX_HOLDING (AR9170_UART_REG_BASE + 0x004)
48 #define AR9170_UART_REG_FIFO_CONTROL (AR9170_UART_REG_BASE + 0x010)
49 #define AR9170_UART_FIFO_CTRL_RESET_RX_FIFO 0x02
50 #define AR9170_UART_FIFO_CTRL_RESET_TX_FIFO 0x04
52 #define AR9170_UART_REG_LINE_CONTROL (AR9170_UART_REG_BASE + 0x014)
53 #define AR9170_UART_REG_MODEM_CONTROL (AR9170_UART_REG_BASE + 0x018)
54 #define AR9170_UART_MODEM_CTRL_DTR_BIT 0x01
55 #define AR9170_UART_MODEM_CTRL_RTS_BIT 0x02
[all …]
/kernel/linux/linux-6.6/drivers/net/ethernet/qlogic/qlcnic/
Dqlcnic_hw.c15 #define OCM_WIN_P3P(addr) (addr & 0xffc0000)
19 #define CRB_BLK(off) ((off >> 20) & 0x3f)
20 #define CRB_SUBBLK(off) ((off >> 16) & 0xf)
21 #define CRB_WINDOW_2M (0x130060)
22 #define CRB_HI(off) ((crb_hub_agt[CRB_BLK(off)] << 20) | ((off) & 0xf0000))
23 #define CRB_INDIRECT_2M (0x1e0000UL)
52 {{{0, 0, 0, 0} } }, /* 0: PCI */
53 {{{1, 0x0100000, 0x0102000, 0x120000}, /* 1: PCIE */
54 {1, 0x0110000, 0x0120000, 0x130000},
55 {1, 0x0120000, 0x0122000, 0x124000},
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/qlogic/qlcnic/
Dqlcnic_hw.c15 #define OCM_WIN_P3P(addr) (addr & 0xffc0000)
19 #define CRB_BLK(off) ((off >> 20) & 0x3f)
20 #define CRB_SUBBLK(off) ((off >> 16) & 0xf)
21 #define CRB_WINDOW_2M (0x130060)
22 #define CRB_HI(off) ((crb_hub_agt[CRB_BLK(off)] << 20) | ((off) & 0xf0000))
23 #define CRB_INDIRECT_2M (0x1e0000UL)
52 {{{0, 0, 0, 0} } }, /* 0: PCI */
53 {{{1, 0x0100000, 0x0102000, 0x120000}, /* 1: PCIE */
54 {1, 0x0110000, 0x0120000, 0x130000},
55 {1, 0x0120000, 0x0122000, 0x124000},
[all …]
/kernel/linux/linux-6.6/drivers/phy/microchip/
Dsparx5_serdes.c31 #define SPX5_SERDES_QUIET_MODE_VAL 0x01ef4e0c
34 SPX5_SD10G28_CMU_MAIN = 0,
353 .cfg_en_adv = 0,
355 .cfg_en_dly = 0,
356 .cfg_tap_adv_3_0 = 0,
358 .cfg_tap_dly_4_0 = 0,
359 .cfg_eq_c_force_3_0 = 0xf,
368 .cfg_tap_adv_3_0 = 0,
370 .cfg_tap_dly_4_0 = 0x10,
371 .cfg_eq_c_force_3_0 = 0xf,
[all …]
/kernel/linux/linux-6.6/drivers/net/ethernet/qlogic/netxen/
Dnetxen_nic_hw.c16 #define MN_WIN(addr) (((addr & 0x1fc0000) >> 1) | ((addr >> 25) & 0x3ff))
17 #define OCM_WIN(addr) (((addr & 0x1ff0000) >> 1) | ((addr >> 25) & 0x3ff))
18 #define MS_WIN(addr) (addr & 0x0ffc0000)
22 #define CRB_BLK(off) ((off >> 20) & 0x3f)
23 #define CRB_SUBBLK(off) ((off >> 16) & 0xf)
24 #define CRB_WINDOW_2M (0x130060)
25 #define CRB_HI(off) ((crb_hub_agt[CRB_BLK(off)] << 20) | ((off) & 0xf0000))
26 #define CRB_INDIRECT_2M (0x1e0000UL)
57 {{{0, 0, 0, 0} } }, /* 0: PCI */
58 {{{1, 0x0100000, 0x0102000, 0x120000}, /* 1: PCIE */
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/qlogic/netxen/
Dnetxen_nic_hw.c16 #define MN_WIN(addr) (((addr & 0x1fc0000) >> 1) | ((addr >> 25) & 0x3ff))
17 #define OCM_WIN(addr) (((addr & 0x1ff0000) >> 1) | ((addr >> 25) & 0x3ff))
18 #define MS_WIN(addr) (addr & 0x0ffc0000)
22 #define CRB_BLK(off) ((off >> 20) & 0x3f)
23 #define CRB_SUBBLK(off) ((off >> 16) & 0xf)
24 #define CRB_WINDOW_2M (0x130060)
25 #define CRB_HI(off) ((crb_hub_agt[CRB_BLK(off)] << 20) | ((off) & 0xf0000))
26 #define CRB_INDIRECT_2M (0x1e0000UL)
57 {{{0, 0, 0, 0} } }, /* 0: PCI */
58 {{{1, 0x0100000, 0x0102000, 0x120000}, /* 1: PCIE */
[all …]
/kernel/linux/linux-5.10/drivers/scsi/qla2xxx/
Dqla_nx.c15 #define MN_WIN(addr) (((addr & 0x1fc0000) >> 1) | \
16 ((addr >> 25) & 0x3ff))
17 #define OCM_WIN(addr) (((addr & 0x1ff0000) >> 1) | \
18 ((addr >> 25) & 0x3ff))
19 #define MS_WIN(addr) (addr & 0x0ffc0000)
20 #define QLA82XX_PCI_MN_2M (0)
21 #define QLA82XX_PCI_MS_2M (0x80000)
22 #define QLA82XX_PCI_OCM0_2M (0xc0000)
23 #define VALID_OCM_ADDR(addr) (((addr) & 0x3f800) != 0x3f800)
25 #define BLOCK_PROTECT_BITS 0x0F
[all …]
/kernel/linux/linux-6.6/drivers/scsi/qla2xxx/
Dqla_nx.c15 #define MN_WIN(addr) (((addr & 0x1fc0000) >> 1) | \
16 ((addr >> 25) & 0x3ff))
17 #define OCM_WIN(addr) (((addr & 0x1ff0000) >> 1) | \
18 ((addr >> 25) & 0x3ff))
19 #define MS_WIN(addr) (addr & 0x0ffc0000)
20 #define QLA82XX_PCI_MN_2M (0)
21 #define QLA82XX_PCI_MS_2M (0x80000)
22 #define QLA82XX_PCI_OCM0_2M (0xc0000)
23 #define VALID_OCM_ADDR(addr) (((addr) & 0x3f800) != 0x3f800)
25 #define BLOCK_PROTECT_BITS 0x0F
[all …]
/kernel/linux/linux-5.10/drivers/scsi/qla4xxx/
Dql4_nx.c18 #define MN_WIN(addr) (((addr & 0x1fc0000) >> 1) | ((addr >> 25) & 0x3ff))
19 #define OCM_WIN(addr) (((addr & 0x1ff0000) >> 1) | ((addr >> 25) & 0x3ff))
20 #define MS_WIN(addr) (addr & 0x0ffc0000)
21 #define QLA82XX_PCI_MN_2M (0)
22 #define QLA82XX_PCI_MS_2M (0x80000)
23 #define QLA82XX_PCI_OCM0_2M (0xc0000)
24 #define VALID_OCM_ADDR(addr) (((addr) & 0x3f800) != 0x3f800)
28 #define CRB_BLK(off) ((off >> 20) & 0x3f)
29 #define CRB_SUBBLK(off) ((off >> 16) & 0xf)
30 #define CRB_WINDOW_2M (0x130060)
[all …]
/kernel/linux/linux-6.6/drivers/scsi/qla4xxx/
Dql4_nx.c18 #define MN_WIN(addr) (((addr & 0x1fc0000) >> 1) | ((addr >> 25) & 0x3ff))
19 #define OCM_WIN(addr) (((addr & 0x1ff0000) >> 1) | ((addr >> 25) & 0x3ff))
20 #define MS_WIN(addr) (addr & 0x0ffc0000)
21 #define QLA82XX_PCI_MN_2M (0)
22 #define QLA82XX_PCI_MS_2M (0x80000)
23 #define QLA82XX_PCI_OCM0_2M (0xc0000)
24 #define VALID_OCM_ADDR(addr) (((addr) & 0x3f800) != 0x3f800)
28 #define CRB_BLK(off) ((off >> 20) & 0x3f)
29 #define CRB_SUBBLK(off) ((off >> 16) & 0xf)
30 #define CRB_WINDOW_2M (0x130060)
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/ti/omap/
Ddra7-l4.dtsi1 &l4_cfg { /* 0x4a000000 */
4 clocks = <&l4cfg_clkctrl DRA7_L4CFG_L4_CFG_CLKCTRL 0>;
6 reg = <0x4a000000 0x800>,
7 <0x4a000800 0x800>,
8 <0x4a001000 0x1000>;
12 ranges = <0x00000000 0x4a000000 0x100000>, /* segment 0 */
13 <0x00100000 0x4a100000 0x100000>, /* segment 1 */
14 <0x00200000 0x4a200000 0x100000>; /* segment 2 */
16 segment@0 { /* 0x4a000000 */
20 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Ddra7-l4.dtsi1 &l4_cfg { /* 0x4a000000 */
3 reg = <0x4a000000 0x800>,
4 <0x4a000800 0x800>,
5 <0x4a001000 0x1000>;
9 ranges = <0x00000000 0x4a000000 0x100000>, /* segment 0 */
10 <0x00100000 0x4a100000 0x100000>, /* segment 1 */
11 <0x00200000 0x4a200000 0x100000>; /* segment 2 */
13 segment@0 { /* 0x4a000000 */
17 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */
18 <0x00000800 0x00000800 0x000800>, /* ap 1 */
[all …]

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