| /kernel/linux/linux-6.6/arch/sparc/include/asm/ |
| D | obio.h | 3 * obio.h: Some useful locations in 0xFXXXXXXXX PA obio space on sun4d. 18 * | 0xFE | DEVID | | XDBUS ID | | 20 * 35 28 27 20 19 10 9 8 7 0 23 #define CSR_BASE_ADDR 0xe0000000 31 * | 0xF | DEVID[7:1] | | 33 * 35 32 31 25 24 0 36 #define ECSR_BASE_ADDR 0x00000000 44 #define BW_LOCAL_BASE 0xfff00000 46 #define BW_CID 0x00000000 47 #define BW_DBUS_CTRL 0x00000008 [all …]
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| /kernel/linux/linux-5.10/arch/sparc/include/asm/ |
| D | obio.h | 3 * obio.h: Some useful locations in 0xFXXXXXXXX PA obio space on sun4d. 18 * | 0xFE | DEVID | | XDBUS ID | | 20 * 35 28 27 20 19 10 9 8 7 0 23 #define CSR_BASE_ADDR 0xe0000000 31 * | 0xF | DEVID[7:1] | | 33 * 35 32 31 25 24 0 36 #define ECSR_BASE_ADDR 0x00000000 44 #define BW_LOCAL_BASE 0xfff00000 46 #define BW_CID 0x00000000 47 #define BW_DBUS_CTRL 0x00000008 [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/mtd/partitions/ |
| D | brcm,bcm4908-partitions.yaml | 33 "^partition@[0-9a-f]+$": 53 partition@0 { 55 reg = <0x0 0x100000>; 60 reg = <0x100000 0xf00000>; 65 reg = <0x1000000 0xf00000>; 70 reg = <0x1f00000 0x100000>;
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| /kernel/linux/linux-6.6/drivers/accel/habanalabs/include/gaudi/asic_reg/ |
| D | tpc0_qm_masks.h | 23 #define TPC0_QM_GLBL_CFG0_PQF_EN_SHIFT 0 24 #define TPC0_QM_GLBL_CFG0_PQF_EN_MASK 0xF 26 #define TPC0_QM_GLBL_CFG0_CQF_EN_MASK 0x1F0 28 #define TPC0_QM_GLBL_CFG0_CP_EN_MASK 0x3E00 31 #define TPC0_QM_GLBL_CFG1_PQF_STOP_SHIFT 0 32 #define TPC0_QM_GLBL_CFG1_PQF_STOP_MASK 0xF 34 #define TPC0_QM_GLBL_CFG1_CQF_STOP_MASK 0x1F0 36 #define TPC0_QM_GLBL_CFG1_CP_STOP_MASK 0x3E00 38 #define TPC0_QM_GLBL_CFG1_PQF_FLUSH_MASK 0xF0000 40 #define TPC0_QM_GLBL_CFG1_CQF_FLUSH_MASK 0x1F00000 [all …]
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| D | mme0_qm_masks.h | 23 #define MME0_QM_GLBL_CFG0_PQF_EN_SHIFT 0 24 #define MME0_QM_GLBL_CFG0_PQF_EN_MASK 0xF 26 #define MME0_QM_GLBL_CFG0_CQF_EN_MASK 0x1F0 28 #define MME0_QM_GLBL_CFG0_CP_EN_MASK 0x3E00 31 #define MME0_QM_GLBL_CFG1_PQF_STOP_SHIFT 0 32 #define MME0_QM_GLBL_CFG1_PQF_STOP_MASK 0xF 34 #define MME0_QM_GLBL_CFG1_CQF_STOP_MASK 0x1F0 36 #define MME0_QM_GLBL_CFG1_CP_STOP_MASK 0x3E00 38 #define MME0_QM_GLBL_CFG1_PQF_FLUSH_MASK 0xF0000 40 #define MME0_QM_GLBL_CFG1_CQF_FLUSH_MASK 0x1F00000 [all …]
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| D | nic0_qm0_masks.h | 23 #define NIC0_QM0_GLBL_CFG0_PQF_EN_SHIFT 0 24 #define NIC0_QM0_GLBL_CFG0_PQF_EN_MASK 0xF 26 #define NIC0_QM0_GLBL_CFG0_CQF_EN_MASK 0x1F0 28 #define NIC0_QM0_GLBL_CFG0_CP_EN_MASK 0x3E00 31 #define NIC0_QM0_GLBL_CFG1_PQF_STOP_SHIFT 0 32 #define NIC0_QM0_GLBL_CFG1_PQF_STOP_MASK 0xF 34 #define NIC0_QM0_GLBL_CFG1_CQF_STOP_MASK 0x1F0 36 #define NIC0_QM0_GLBL_CFG1_CP_STOP_MASK 0x3E00 38 #define NIC0_QM0_GLBL_CFG1_PQF_FLUSH_MASK 0xF0000 40 #define NIC0_QM0_GLBL_CFG1_CQF_FLUSH_MASK 0x1F00000 [all …]
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| D | dma0_qm_masks.h | 23 #define DMA0_QM_GLBL_CFG0_PQF_EN_SHIFT 0 24 #define DMA0_QM_GLBL_CFG0_PQF_EN_MASK 0xF 26 #define DMA0_QM_GLBL_CFG0_CQF_EN_MASK 0x1F0 28 #define DMA0_QM_GLBL_CFG0_CP_EN_MASK 0x3E00 31 #define DMA0_QM_GLBL_CFG1_PQF_STOP_SHIFT 0 32 #define DMA0_QM_GLBL_CFG1_PQF_STOP_MASK 0xF 34 #define DMA0_QM_GLBL_CFG1_CQF_STOP_MASK 0x1F0 36 #define DMA0_QM_GLBL_CFG1_CP_STOP_MASK 0x3E00 38 #define DMA0_QM_GLBL_CFG1_PQF_FLUSH_MASK 0xF0000 40 #define DMA0_QM_GLBL_CFG1_CQF_FLUSH_MASK 0x1F00000 [all …]
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| /kernel/linux/linux-5.10/drivers/misc/habanalabs/include/gaudi/asic_reg/ |
| D | tpc0_qm_masks.h | 23 #define TPC0_QM_GLBL_CFG0_PQF_EN_SHIFT 0 24 #define TPC0_QM_GLBL_CFG0_PQF_EN_MASK 0xF 26 #define TPC0_QM_GLBL_CFG0_CQF_EN_MASK 0x1F0 28 #define TPC0_QM_GLBL_CFG0_CP_EN_MASK 0x3E00 31 #define TPC0_QM_GLBL_CFG1_PQF_STOP_SHIFT 0 32 #define TPC0_QM_GLBL_CFG1_PQF_STOP_MASK 0xF 34 #define TPC0_QM_GLBL_CFG1_CQF_STOP_MASK 0x1F0 36 #define TPC0_QM_GLBL_CFG1_CP_STOP_MASK 0x3E00 38 #define TPC0_QM_GLBL_CFG1_PQF_FLUSH_MASK 0xF0000 40 #define TPC0_QM_GLBL_CFG1_CQF_FLUSH_MASK 0x1F00000 [all …]
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| D | dma0_qm_masks.h | 23 #define DMA0_QM_GLBL_CFG0_PQF_EN_SHIFT 0 24 #define DMA0_QM_GLBL_CFG0_PQF_EN_MASK 0xF 26 #define DMA0_QM_GLBL_CFG0_CQF_EN_MASK 0x1F0 28 #define DMA0_QM_GLBL_CFG0_CP_EN_MASK 0x3E00 31 #define DMA0_QM_GLBL_CFG1_PQF_STOP_SHIFT 0 32 #define DMA0_QM_GLBL_CFG1_PQF_STOP_MASK 0xF 34 #define DMA0_QM_GLBL_CFG1_CQF_STOP_MASK 0x1F0 36 #define DMA0_QM_GLBL_CFG1_CP_STOP_MASK 0x3E00 38 #define DMA0_QM_GLBL_CFG1_PQF_FLUSH_MASK 0xF0000 40 #define DMA0_QM_GLBL_CFG1_CQF_FLUSH_MASK 0x1F00000 [all …]
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| D | mme0_qm_masks.h | 23 #define MME0_QM_GLBL_CFG0_PQF_EN_SHIFT 0 24 #define MME0_QM_GLBL_CFG0_PQF_EN_MASK 0xF 26 #define MME0_QM_GLBL_CFG0_CQF_EN_MASK 0x1F0 28 #define MME0_QM_GLBL_CFG0_CP_EN_MASK 0x3E00 31 #define MME0_QM_GLBL_CFG1_PQF_STOP_SHIFT 0 32 #define MME0_QM_GLBL_CFG1_PQF_STOP_MASK 0xF 34 #define MME0_QM_GLBL_CFG1_CQF_STOP_MASK 0x1F0 36 #define MME0_QM_GLBL_CFG1_CP_STOP_MASK 0x3E00 38 #define MME0_QM_GLBL_CFG1_PQF_FLUSH_MASK 0xF0000 40 #define MME0_QM_GLBL_CFG1_CQF_FLUSH_MASK 0x1F00000 [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/pwm/ |
| D | pwm-tiehrpwm.txt | 24 reg = <0x48300200 0x100>; 32 reg = <0x48300200 0x80>; 41 reg = <0x1f00000 0x2000>; 47 reg = <0x4843e200 0x80>;
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| /kernel/linux/linux-6.6/drivers/accel/habanalabs/include/gaudi2/asic_reg/ |
| D | dcore0_edma0_qm_masks.h | 24 #define DCORE0_EDMA0_QM_GLBL_CFG0_PQF_EN_SHIFT 0 25 #define DCORE0_EDMA0_QM_GLBL_CFG0_PQF_EN_MASK 0xF 27 #define DCORE0_EDMA0_QM_GLBL_CFG0_CQF_EN_MASK 0x1F0 29 #define DCORE0_EDMA0_QM_GLBL_CFG0_CP_EN_MASK 0x3E00 31 #define DCORE0_EDMA0_QM_GLBL_CFG0_ARC_CQF_EN_MASK 0x4000 34 #define DCORE0_EDMA0_QM_GLBL_CFG1_PQF_STOP_SHIFT 0 35 #define DCORE0_EDMA0_QM_GLBL_CFG1_PQF_STOP_MASK 0xF 37 #define DCORE0_EDMA0_QM_GLBL_CFG1_CQF_STOP_MASK 0x1F0 39 #define DCORE0_EDMA0_QM_GLBL_CFG1_CP_STOP_MASK 0x3E00 41 #define DCORE0_EDMA0_QM_GLBL_CFG1_PQF_FLUSH_MASK 0xF0000 [all …]
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| D | pdma0_qm_masks.h | 24 #define PDMA0_QM_GLBL_CFG0_PQF_EN_SHIFT 0 25 #define PDMA0_QM_GLBL_CFG0_PQF_EN_MASK 0xF 27 #define PDMA0_QM_GLBL_CFG0_CQF_EN_MASK 0x1F0 29 #define PDMA0_QM_GLBL_CFG0_CP_EN_MASK 0x3E00 31 #define PDMA0_QM_GLBL_CFG0_ARC_CQF_EN_MASK 0x4000 34 #define PDMA0_QM_GLBL_CFG1_PQF_STOP_SHIFT 0 35 #define PDMA0_QM_GLBL_CFG1_PQF_STOP_MASK 0xF 37 #define PDMA0_QM_GLBL_CFG1_CQF_STOP_MASK 0x1F0 39 #define PDMA0_QM_GLBL_CFG1_CP_STOP_MASK 0x3E00 41 #define PDMA0_QM_GLBL_CFG1_PQF_FLUSH_MASK 0xF0000 [all …]
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| /kernel/linux/linux-6.6/arch/mips/boot/dts/ingenic/ |
| D | rs90.dts | 16 reg = <0x0 0x2000000>; 26 reg = <0x1f00000 0x100000>; 42 pwms = <&pwm 3 40000 0>; 44 brightness-levels = <0 16 32 48 64 80 112 144 192 255>; 48 pinctrl-0 = <&pins_pwm3>; 53 keys@0 { 56 key-0 { 113 key@0 { 169 #phy-cells = <0>; 234 pinctrl-0 = <&pins_mmc1>; [all …]
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| /kernel/linux/linux-5.10/drivers/input/joystick/ |
| D | cobra.c | 29 …START, BTN_SELECT, BTN_TL, BTN_TR, BTN_X, BTN_Y, BTN_Z, BTN_A, BTN_B, BTN_C, BTN_TL2, BTN_TR2, 0 }; 50 for (i = 0; i < 2; i++) { in cobra_read_packet() 51 r[i] = buf[i] = 0; in cobra_read_packet() 60 t[0]--; t[1]--; in cobra_read_packet() 62 for (i = 0, w = u ^ v; i < 2 && w; i++, w >>= 2) in cobra_read_packet() 63 if (w & 0x30) { in cobra_read_packet() 64 if ((w & 0x30) < 0x30 && r[i] < COBRA_LENGTH && t[i] > 0) { in cobra_read_packet() 68 } else t[i] = 0; in cobra_read_packet() 70 } while (t[0] > 0 || t[1] > 0); in cobra_read_packet() 74 ret = 0; in cobra_read_packet() [all …]
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| /kernel/linux/linux-6.6/drivers/input/joystick/ |
| D | cobra.c | 26 …START, BTN_SELECT, BTN_TL, BTN_TR, BTN_X, BTN_Y, BTN_Z, BTN_A, BTN_B, BTN_C, BTN_TL2, BTN_TR2, 0 }; 47 for (i = 0; i < 2; i++) { in cobra_read_packet() 48 r[i] = buf[i] = 0; in cobra_read_packet() 57 t[0]--; t[1]--; in cobra_read_packet() 59 for (i = 0, w = u ^ v; i < 2 && w; i++, w >>= 2) in cobra_read_packet() 60 if (w & 0x30) { in cobra_read_packet() 61 if ((w & 0x30) < 0x30 && r[i] < COBRA_LENGTH && t[i] > 0) { in cobra_read_packet() 65 } else t[i] = 0; in cobra_read_packet() 67 } while (t[0] > 0 || t[1] > 0); in cobra_read_packet() 71 ret = 0; in cobra_read_packet() [all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/nuvoton/ |
| D | nuvoton-npcm730-gsj.dts | 35 reg = <0 0x40000000>; 47 gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>; 135 pinctrl-0 = <&spi0cs1_pins>; 138 flash@0 { 142 reg = <0>; 149 bmc@0{ 151 reg = <0x000000 0x2000000>; 153 u-boot@0 { 155 reg = <0x0000000 0x80000>; 160 reg = <0x00100000 0x40000>; [all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/qcom/ |
| D | qcom-apq8026-samsung-matisse-wifi.dts | 35 reg = <0x03200000 0x800000>; 88 pinctrl-0 = <&backlight_i2c_default_state>; 94 #size-cells = <0>; 98 reg = <0x2c>; 100 dev-ctrl = /bits/ 8 <0x80>; 101 init-brt = /bits/ 8 <0x3f>; 103 pwms = <&backlight_pwm 0 100000>; 107 rom-addr = /bits/ 8 <0xa0>; 108 rom-val = /bits/ 8 <0x44>; 112 rom-addr = /bits/ 8 <0xa1>; [all …]
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| /kernel/linux/linux-5.10/arch/powerpc/boot/dts/ |
| D | mpc8379_mds.dts | 26 #size-cells = <0>; 28 PowerPC,8379@0 { 30 reg = <0x0>; 35 timebase-frequency = <0>; 36 bus-frequency = <0>; 37 clock-frequency = <0>; 43 reg = <0x00000000 0x20000000>; // 512MB at 0 50 reg = <0xe0005000 0x1000>; 51 interrupts = <77 0x8>; 55 ranges = <0 0x0 0xfe000000 0x02000000 [all …]
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| D | mpc8378_mds.dts | 28 #size-cells = <0>; 30 PowerPC,8378@0 { 32 reg = <0x0>; 37 timebase-frequency = <0>; 38 bus-frequency = <0>; 39 clock-frequency = <0>; 45 reg = <0x00000000 0x20000000>; // 512MB at 0 52 reg = <0xe0005000 0x1000>; 53 interrupts = <77 0x8>; 57 ranges = <0 0x0 0xfe000000 0x02000000 [all …]
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| D | mpc8377_mds.dts | 28 #size-cells = <0>; 30 PowerPC,8377@0 { 32 reg = <0x0>; 37 timebase-frequency = <0>; 38 bus-frequency = <0>; 39 clock-frequency = <0>; 45 reg = <0x00000000 0x20000000>; // 512MB at 0 52 reg = <0xe0005000 0x1000>; 53 interrupts = <77 0x8>; 57 ranges = <0 0x0 0xfe000000 0x02000000 [all …]
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/freescale/ |
| D | fsl-ls1012a.dtsi | 32 #size-cells = <0>; 34 cpu0: cpu@0 { 37 reg = <0x0>; 38 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 54 arm,psci-suspend-param = <0x0>; 63 #clock-cells = <0>; 70 #clock-cells = <0>; 85 interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>; 92 reg = <0x0 0x1401000 0 0x1000>, /* GICD */ 93 <0x0 0x1402000 0 0x2000>, /* GICC */ [all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/freescale/ |
| D | fsl-ls1012a.dtsi | 31 #size-cells = <0>; 33 cpu0: cpu@0 { 36 reg = <0x0>; 37 clocks = <&clockgen 1 0>; 53 arm,psci-suspend-param = <0x0>; 62 #clock-cells = <0>; 69 #clock-cells = <0>; 84 interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>; 91 reg = <0x0 0x1401000 0 0x1000>, /* GICD */ 92 <0x0 0x1402000 0 0x2000>, /* GICC */ [all …]
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| /kernel/linux/linux-5.10/drivers/net/ethernet/qlogic/qed/ |
| D | qed_init_ops.c | 25 0, 26 0, 27 0x1c02, /* win 2: addr=0x1c02000, size=4096 bytes */ 28 0x1c80, /* win 3: addr=0x1c80000, size=4096 bytes */ 29 0x1d00, /* win 4: addr=0x1d00000, size=4096 bytes */ 30 0x1d01, /* win 5: addr=0x1d01000, size=4096 bytes */ 31 0x1d02, /* win 6: addr=0x1d02000, size=4096 bytes */ 32 0x1d80, /* win 7: addr=0x1d80000, size=4096 bytes */ 33 0x1d81, /* win 8: addr=0x1d81000, size=4096 bytes */ 34 0x1d82, /* win 9: addr=0x1d82000, size=4096 bytes */ [all …]
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| /kernel/linux/linux-6.6/drivers/net/ethernet/qlogic/qed/ |
| D | qed_init_ops.c | 26 0, 27 0, 28 0x1c02, /* win 2: addr=0x1c02000, size=4096 bytes */ 29 0x1c80, /* win 3: addr=0x1c80000, size=4096 bytes */ 30 0x1d00, /* win 4: addr=0x1d00000, size=4096 bytes */ 31 0x1d01, /* win 5: addr=0x1d01000, size=4096 bytes */ 32 0x1d02, /* win 6: addr=0x1d02000, size=4096 bytes */ 33 0x1d80, /* win 7: addr=0x1d80000, size=4096 bytes */ 34 0x1d81, /* win 8: addr=0x1d81000, size=4096 bytes */ 35 0x1d82, /* win 9: addr=0x1d82000, size=4096 bytes */ [all …]
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