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/kernel/linux/linux-6.6/drivers/soc/qcom/
Dqcom_gsbi.c17 #define GSBI_CTRL_REG 0x0000
21 #define TCSR_ADM_CRCI_BASE 0x70
30 0x000003, 0x00000c, 0x000030, 0x0000c0,
31 0x000300, 0x000c00, 0x003000, 0x00c000,
32 0x030000, 0x0c0000, 0x300000, 0xc00000
35 0x000003, 0x00000c, 0x000030, 0x0000c0,
36 0x000300, 0x000c00, 0x003000, 0x00c000,
37 0x030000, 0x0c0000, 0x300000, 0xc00000
48 0x001800, 0x006000, 0x000030, 0x0000c0,
49 0x000300, 0x000400, 0x000000, 0x000000,
[all …]
/kernel/linux/linux-5.10/drivers/soc/qcom/
Dqcom_gsbi.c17 #define GSBI_CTRL_REG 0x0000
21 #define TCSR_ADM_CRCI_BASE 0x70
30 0x000003, 0x00000c, 0x000030, 0x0000c0,
31 0x000300, 0x000c00, 0x003000, 0x00c000,
32 0x030000, 0x0c0000, 0x300000, 0xc00000
35 0x000003, 0x00000c, 0x000030, 0x0000c0,
36 0x000300, 0x000c00, 0x003000, 0x00c000,
37 0x030000, 0x0c0000, 0x300000, 0xc00000
48 0x001800, 0x006000, 0x000030, 0x0000c0,
49 0x000300, 0x000400, 0x000000, 0x000000,
[all …]
/kernel/linux/linux-5.10/drivers/misc/habanalabs/include/goya/asic_reg/
Dcpu_ca53_cfg_masks.h23 #define CPU_CA53_CFG_ARM_CFG_AA64NAA32_SHIFT 0
24 #define CPU_CA53_CFG_ARM_CFG_AA64NAA32_MASK 0x3
26 #define CPU_CA53_CFG_ARM_CFG_END_MASK 0x30
28 #define CPU_CA53_CFG_ARM_CFG_TE_MASK 0x300
30 #define CPU_CA53_CFG_ARM_CFG_VINITHI_MASK 0x3000
33 #define CPU_CA53_CFG_RST_ADDR_LSB_VECTOR_SHIFT 0
34 #define CPU_CA53_CFG_RST_ADDR_LSB_VECTOR_MASK 0xFFFFFFFF
37 #define CPU_CA53_CFG_RST_ADDR_MSB_VECTOR_SHIFT 0
38 #define CPU_CA53_CFG_RST_ADDR_MSB_VECTOR_MASK 0xFF
41 #define CPU_CA53_CFG_ARM_RST_CONTROL_NCPUPORESET_SHIFT 0
[all …]
/kernel/linux/linux-6.6/drivers/accel/habanalabs/include/goya/asic_reg/
Dcpu_ca53_cfg_masks.h23 #define CPU_CA53_CFG_ARM_CFG_AA64NAA32_SHIFT 0
24 #define CPU_CA53_CFG_ARM_CFG_AA64NAA32_MASK 0x3
26 #define CPU_CA53_CFG_ARM_CFG_END_MASK 0x30
28 #define CPU_CA53_CFG_ARM_CFG_TE_MASK 0x300
30 #define CPU_CA53_CFG_ARM_CFG_VINITHI_MASK 0x3000
33 #define CPU_CA53_CFG_RST_ADDR_LSB_VECTOR_SHIFT 0
34 #define CPU_CA53_CFG_RST_ADDR_LSB_VECTOR_MASK 0xFFFFFFFF
37 #define CPU_CA53_CFG_RST_ADDR_MSB_VECTOR_SHIFT 0
38 #define CPU_CA53_CFG_RST_ADDR_MSB_VECTOR_MASK 0xFF
41 #define CPU_CA53_CFG_ARM_RST_CONTROL_NCPUPORESET_SHIFT 0
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/pinctrl/
Dqcom,sm8150-pinctrl.yaml72 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-6][0-9]|17[0-4])$"
124 reg = <0x03100000 0x300000>,
125 <0x03500000 0x300000>,
126 <0x03900000 0x300000>,
127 <0x03d00000 0x300000>;
130 gpio-ranges = <&tlmm 0 0 176>;
Dqcom,sm8250-pinctrl.yaml70 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-7][0-9])$"
116 reg = <0x0f100000 0x300000>,
117 <0x0f500000 0x300000>,
118 <0x0f900000 0x300000>;
125 gpio-ranges = <&tlmm 0 0 181>; /* GPIOs + ufs_reset */
Dqcom,sc7180-pinctrl.yaml71 - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9]|11[0-8])$"
123 reg = <0x03500000 0x300000>,
124 <0x03900000 0x300000>,
125 <0x03d00000 0x300000>;
132 gpio-ranges = <&tlmm 0 0 120>;
Dqcom,sm7150-tlmm.yaml74 - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9]|11[0-8])$"
122 reg = <0x03500000 0x300000>,
123 <0x03900000 0x300000>,
124 <0x03d00000 0x300000>;
127 gpio-ranges = <&tlmm 0 0 120>;
/kernel/linux/linux-6.6/drivers/net/wireless/intel/iwlwifi/cfg/
Dax210.c19 #define IWL_AX210_NVM_VERSION 0x0a1d
22 #define IWL_AX210_DCCM_OFFSET 0x800000 /* LMAC1 */
23 #define IWL_AX210_DCCM_LEN 0x10000 /* LMAC1 */
24 #define IWL_AX210_DCCM2_OFFSET 0x880000
25 #define IWL_AX210_DCCM2_LEN 0x8000
26 #define IWL_AX210_SMEM_OFFSET 0x400000
27 #define IWL_AX210_SMEM_LEN 0xD0000
96 .mac_addr_from_csr = 0x380, \
103 .min_umac_error_event_table = 0x400000, \
104 .d3_debug_data_base_addr = 0x401000, \
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/
Dqcom,sm8150-pinctrl.txt178 reg = <0x03100000 0x300000>,
179 <0x03500000 0x300000>,
180 <0x03900000 0x300000>,
181 <0x03D00000 0x300000>;
186 gpio-ranges = <&tlmm 0 0 175>;
187 gpio-reserved-ranges = <0 4>, <126 4>;
Dqcom,sm8250-pinctrl.yaml68 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-7][0-9])$"
136 reg = <0x0f100000 0x300000>,
137 <0x0f500000 0x300000>,
138 <0x0f900000 0x300000>;
145 gpio-ranges = <&tlmm 0 0 180>;
/kernel/linux/linux-5.10/arch/powerpc/boot/dts/fsl/
Dqoriq-sec4.0-0.dtsi2 * QorIQ Sec/Crypto 4.0 device tree stub [ controller @ offset 0x300000 ]
36 compatible = "fsl,sec-v4.0";
40 reg = <0x300000 0x10000>;
41 ranges = <0 0x300000 0x10000>;
42 interrupts = <92 2 0 0>;
45 compatible = "fsl,sec-v4.0-job-ring";
46 reg = <0x1000 0x1000>;
47 interrupts = <88 2 0 0>;
51 compatible = "fsl,sec-v4.0-job-ring";
52 reg = <0x2000 0x1000>;
[all …]
Dqoriq-sec5.0-0.dtsi2 * QorIQ Sec/Crypto 5.0 device tree stub [ controller @ offset 0x300000 ]
36 compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
40 reg = <0x300000 0x10000>;
41 ranges = <0 0x300000 0x10000>;
42 interrupts = <92 2 0 0>;
45 compatible = "fsl,sec-v5.0-job-ring",
46 "fsl,sec-v4.0-job-ring";
47 reg = <0x1000 0x1000>;
48 interrupts = <88 2 0 0>;
52 compatible = "fsl,sec-v5.0-job-ring",
[all …]
Dqoriq-sec4.2-0.dtsi2 * QorIQ Sec/Crypto 4.2 device tree stub [ controller @ offset 0x300000 ]
36 compatible = "fsl,sec-v4.2", "fsl,sec-v4.0";
40 reg = <0x300000 0x10000>;
41 ranges = <0 0x300000 0x10000>;
42 interrupts = <92 2 0 0>;
46 "fsl,sec-v4.0-job-ring";
47 reg = <0x1000 0x1000>;
48 interrupts = <88 2 0 0>;
53 "fsl,sec-v4.0-job-ring";
54 reg = <0x2000 0x1000>;
[all …]
/kernel/linux/linux-6.6/arch/powerpc/boot/dts/fsl/
Dqoriq-sec4.0-0.dtsi2 * QorIQ Sec/Crypto 4.0 device tree stub [ controller @ offset 0x300000 ]
36 compatible = "fsl,sec-v4.0";
40 reg = <0x300000 0x10000>;
41 ranges = <0 0x300000 0x10000>;
42 interrupts = <92 2 0 0>;
45 compatible = "fsl,sec-v4.0-job-ring";
46 reg = <0x1000 0x1000>;
47 interrupts = <88 2 0 0>;
51 compatible = "fsl,sec-v4.0-job-ring";
52 reg = <0x2000 0x1000>;
[all …]
Dqoriq-sec5.0-0.dtsi2 * QorIQ Sec/Crypto 5.0 device tree stub [ controller @ offset 0x300000 ]
36 compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
40 reg = <0x300000 0x10000>;
41 ranges = <0 0x300000 0x10000>;
42 interrupts = <92 2 0 0>;
45 compatible = "fsl,sec-v5.0-job-ring",
46 "fsl,sec-v4.0-job-ring";
47 reg = <0x1000 0x1000>;
48 interrupts = <88 2 0 0>;
52 compatible = "fsl,sec-v5.0-job-ring",
[all …]
Dqoriq-sec4.2-0.dtsi2 * QorIQ Sec/Crypto 4.2 device tree stub [ controller @ offset 0x300000 ]
36 compatible = "fsl,sec-v4.2", "fsl,sec-v4.0";
40 reg = <0x300000 0x10000>;
41 ranges = <0 0x300000 0x10000>;
42 interrupts = <92 2 0 0>;
46 "fsl,sec-v4.0-job-ring";
47 reg = <0x1000 0x1000>;
48 interrupts = <88 2 0 0>;
53 "fsl,sec-v4.0-job-ring";
54 reg = <0x2000 0x1000>;
[all …]
Dqoriq-sec5.2-0.dtsi2 * QorIQ Sec/Crypto 5.2 device tree stub [ controller @ offset 0x300000 ]
36 compatible = "fsl,sec-v5.2", "fsl,sec-v5.0", "fsl,sec-v4.0";
40 reg = <0x300000 0x10000>;
41 ranges = <0 0x300000 0x10000>;
42 interrupts = <92 2 0 0>;
46 "fsl,sec-v5.0-job-ring",
47 "fsl,sec-v4.0-job-ring";
48 reg = <0x1000 0x1000>;
49 interrupts = <88 2 0 0>;
54 "fsl,sec-v5.0-job-ring",
[all …]
/kernel/linux/linux-6.6/arch/mips/boot/dts/ralink/
Drt2880.dtsi8 cpu@0 {
14 #address-cells = <0>;
22 reg = <0x300000 0x200000>;
23 ranges = <0x0 0x300000 0x1FFFFF>;
28 sysc@0 {
30 reg = <0x0 0x100>;
35 reg = <0x200 0x100>;
46 reg = <0x300 0x100>;
51 reg = <0xc00 0x100>;
/kernel/linux/linux-5.10/arch/mips/boot/dts/ralink/
Drt2880.dtsi8 cpu@0 {
14 #address-cells = <0>;
22 reg = <0x300000 0x200000>;
23 ranges = <0x0 0x300000 0x1FFFFF>;
28 sysc@0 {
30 reg = <0x0 0x100>;
35 reg = <0x200 0x100>;
46 reg = <0x300 0x100>;
51 reg = <0xc00 0x100>;
/kernel/linux/linux-6.6/arch/arm/boot/dts/nxp/mxs/
Dimx28-apf28.dts15 reg = <0x40000000 0x08000000>;
21 pinctrl-0 = <&duart_pins_a>;
27 pinctrl-0 = <&gpmi_pins_a &gpmi_status_cfg>;
30 partition@0 {
32 reg = <0x0 0x300000>;
37 reg = <0x300000 0x80000>;
42 reg = <0x380000 0x80000>;
47 reg = <0x400000 0x80000>;
52 reg = <0x480000 0x80000>;
57 reg = <0x500000 0x800000>;
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dimx28-apf28.dts15 reg = <0x40000000 0x08000000>;
22 pinctrl-0 = <&gpmi_pins_a &gpmi_status_cfg>;
25 partition@0 {
27 reg = <0x0 0x300000>;
32 reg = <0x300000 0x80000>;
37 reg = <0x380000 0x80000>;
42 reg = <0x400000 0x80000>;
47 reg = <0x480000 0x80000>;
52 reg = <0x500000 0x800000>;
57 reg = <0xd00000 0xf300000>;
[all …]
Dpicoxcell-pc7302-pc3x2.dts14 reg = <0x0 0x08000000>;
31 nand: gpio-nand@2,0 {
35 reg = <2 0x0000 0x1000>;
38 <0x00000000 0x80220000>;
40 gpios = <&banka 1 0 /* rdy */
41 &banka 2 0 /* nce */
42 &banka 3 0 /* ale */
43 &banka 4 0 /* cle */
44 0 /* nwp */>;
48 reg = <0x100000 0x80000>;
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/hisilicon/
Dhip05-d02.dts17 memory@0 {
19 reg = <0x0 0x00000000 0x0 0x80000000>;
33 #size-cells = <0>;
39 debounce-interval = <0>;
56 ranges = <0 0 0x0 0x90000000 0x08000000>,
57 <1 0 0x0 0x98000000 0x08000000>;
59 nor-flash@0,0 {
63 reg = <0 0x0 0x08000000>;
66 partition@0 {
68 reg = <0x0 0x300000>;
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/hisilicon/
Dhip05-d02.dts17 memory@0 {
19 reg = <0x0 0x00000000 0x0 0x80000000>;
37 debounce-interval = <0>;
54 ranges = <0 0 0x0 0x90000000 0x08000000>,
55 <1 0 0x0 0x98000000 0x08000000>;
57 nor-flash@0,0 {
61 reg = <0 0x0 0x08000000>;
64 partition@0 {
66 reg = <0x0 0x300000>;
70 reg = <0x300000 0xa00000>;
[all …]

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