Searched +full:0 +full:x40006c00 (Results 1 – 6 of 6) sorted by relevance
47 reg = <0x40006c00 0x400>;
48 reg = <0x40006c00 0x400>;
53 #clock-cells = <0>;55 clock-frequency = <0>;59 #clock-cells = <0>;65 #clock-cells = <0>;71 #clock-cells = <0>;80 reg = <0x40000000 0x400>;82 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM2)>;88 #size-cells = <0>;90 reg = <0x40000000 0x400>;91 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM2)>;[all …]
53 #clock-cells = <0>;55 clock-frequency = <0>;59 #clock-cells = <0>;65 #clock-cells = <0>;71 #clock-cells = <0>;80 #size-cells = <0>;82 reg = <0x40000000 0x400>;83 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM2)>;102 #size-cells = <0>;104 reg = <0x40000400 0x400>;[all …]
30 #define DIS_SGX BIT(0)164 writew_relaxed(value & 0xffff, ddata->module_va + offset); in sysc_write()167 if (ddata->offsets[SYSC_REVISION] >= 0 && in sysc_write()188 if (ddata->offsets[SYSC_REVISION] >= 0 && in sysc_read()210 if (offset < 0) in sysc_read_revision()211 return 0; in sysc_read_revision()220 if (offset < 0) in sysc_read_sysconfig()221 return 0; in sysc_read_sysconfig()230 if (offset < 0) in sysc_read_sysstatus()231 return 0; in sysc_read_sysstatus()[all …]
30 #define DIS_SGX BIT(0)167 writew_relaxed(value & 0xffff, ddata->module_va + offset); in sysc_write()170 if (ddata->offsets[SYSC_REVISION] >= 0 && in sysc_write()191 if (ddata->offsets[SYSC_REVISION] >= 0 && in sysc_read()213 if (offset < 0) in sysc_read_revision()214 return 0; in sysc_read_revision()223 if (offset < 0) in sysc_read_sysconfig()224 return 0; in sysc_read_sysconfig()233 if (offset < 0) in sysc_read_sysstatus()234 return 0; in sysc_read_sysstatus()[all …]