| /kernel/linux/linux-6.6/arch/arm64/boot/dts/freescale/ |
| D | imx8-ss-ddr.dtsi | 11 ranges = <0x5c000000 0x0 0x5c000000 0x1000000>; 15 reg = <0x5c020000 0x10000>;
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/sram/ |
| D | sram.yaml | 143 reg = <0x5c000000 0x40000>; /* 256 KiB SRAM at address 0x5c000000 */ 147 ranges = <0 0x5c000000 0x40000>; 150 reg = <0x100 0x50>; 154 reg = <0x1000 0x1000>; 159 reg = <0x20000 0x20000>; 174 reg = <0x02020000 0x54000>; 177 ranges = <0 0x02020000 0x54000>; 179 smp-sram@0 { 181 reg = <0x0 0x1000>; 186 reg = <0x53000 0x1000>; [all …]
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/sram/ |
| D | sram.yaml | 159 reg = <0x5c000000 0x40000>; /* 256 KiB SRAM at address 0x5c000000 */ 163 ranges = <0 0x5c000000 0x40000>; 166 reg = <0x100 0x50>; 170 reg = <0x1000 0x1000>; 175 reg = <0x20000 0x20000>; 190 reg = <0x02020000 0x54000>; 193 ranges = <0 0x02020000 0x54000>; 195 smp-sram@0 { 197 reg = <0x0 0x1000>; 202 reg = <0x53000 0x1000>; [all …]
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/spi/ |
| D | ti_qspi.txt | 23 parameters for Mode-0 and Mode-3 operations, which needs to be set up by 24 the bootloader (U-Boot). Default configuration only supports Mode-0 34 reg = <0x47900000 0x100>, <0x30000000 0x4000000>; 37 #size-cells = <0>; 45 reg = <0x4b300000 0x100>, 46 <0x5c000000 0x4000000>, 48 syscon-chipselects = <&scm_conf 0x558>; 50 #size-cells = <0>;
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/spi/ |
| D | ti_qspi.txt | 23 parameters for Mode-0 and Mode-3 operations, which needs to be set up by 24 the bootloader (U-Boot). Default configuration only supports Mode-0 34 reg = <0x47900000 0x100>, <0x30000000 0x4000000>; 37 #size-cells = <0>; 45 reg = <0x4b300000 0x100>, 46 <0x5c000000 0x4000000>, 48 syscon-chipselects = <&scm_conf 0x558>; 50 #size-cells = <0>;
|
| /kernel/linux/linux-6.6/arch/arm/mach-omap2/ |
| D | omap24xx.h | 19 #define L4_24XX_BASE 0x48000000 20 #define L4_WK_243X_BASE 0x49000000 21 #define L3_24XX_BASE 0x68000000 24 #define OMAP24XX_IC_BASE (L4_24XX_BASE + 0xfe000) 25 #define OMAP24XX_IVA_INTC_BASE 0x40000000 28 #define OMAP2420_32KSYNCT_BASE (L4_24XX_BASE + 0x4000) 29 #define OMAP2420_PRCM_BASE (L4_24XX_BASE + 0x8000) 30 #define OMAP2420_CM_BASE (L4_24XX_BASE + 0x8000) 32 #define OMAP2420_SDRC_BASE (L3_24XX_BASE + 0x9000) 33 #define OMAP2420_SMS_BASE 0x68008000 [all …]
|
| D | pdata-quirks.c | 48 omap_auxdata_lookup[0].platform_data = n8x0_legacy_init(); in omap2420_n8x0_legacy_init() 111 gpiod_export(d, 0); in omap3_sbc_t3x_usb_hub_init() 114 gpiod_set_value(d, 0); in omap3_sbc_t3x_usb_hub_init() 121 GPIO_LOOKUP_IDX("gpio-160-175", 7, "reset", 0, 130 omap3_sbc_t3x_usb_hub_init("sb-t35 usb hub", 0); in omap3_sbc_t3730_legacy_init() 136 omap3_sbc_t3x_usb_hub_init("sb-t35 usb hub", 0); in omap3_sbc_t3530_legacy_init() 185 GPIO_LOOKUP("gpio-0-15", 4, "noe", 203 gpiod_export(d, 0); in omap3_sbc_t3517_wifi_init() 211 gpiod_export(d, 0); in omap3_sbc_t3517_wifi_init() 214 gpiod_set_value(d, 0); in omap3_sbc_t3517_wifi_init() [all …]
|
| /kernel/linux/linux-5.10/arch/arm/mach-omap2/ |
| D | omap24xx.h | 19 #define L4_24XX_BASE 0x48000000 20 #define L4_WK_243X_BASE 0x49000000 21 #define L3_24XX_BASE 0x68000000 24 #define OMAP24XX_IC_BASE (L4_24XX_BASE + 0xfe000) 25 #define OMAP24XX_IVA_INTC_BASE 0x40000000 28 #define OMAP2420_32KSYNCT_BASE (L4_24XX_BASE + 0x4000) 29 #define OMAP2420_PRCM_BASE (L4_24XX_BASE + 0x8000) 30 #define OMAP2420_CM_BASE (L4_24XX_BASE + 0x8000) 32 #define OMAP2420_SDRC_BASE (L3_24XX_BASE + 0x9000) 33 #define OMAP2420_SMS_BASE 0x68008000 [all …]
|
| D | pdata-quirks.c | 53 return 0; in omap_iommu_set_pwrdm_constraint() 60 omap_auxdata_lookup[0].platform_data = n8x0_legacy_init(); in omap2420_n8x0_legacy_init() 121 gpio_export(gpio, 0); in omap3_sbc_t3730_twl_callback() 123 return 0; in omap3_sbc_t3730_twl_callback() 136 gpio_export(gpio, 0); in omap3_sbc_t3x_usb_hub_init() 213 gpio_export(cm_t3517_wlan_gpios[0].gpio, 0); in omap3_sbc_t3517_wifi_init() 214 gpio_export(cm_t3517_wlan_gpios[1].gpio, 0); in omap3_sbc_t3517_wifi_init() 217 gpio_set_value(cm_t3517_wlan_gpios[1].gpio, 0); in omap3_sbc_t3517_wifi_init() 237 mmc_pdata[0].name = "external"; in nokia_n900_legacy_init() 244 rx51_secure_update_aux_cr(BIT(6), 0); in nokia_n900_legacy_init() [all …]
|
| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | aspeed-bmc-opp-vesnin.dts | 18 reg = <0x40000000 0x20000000>; 28 reg = <0x5f000000 0x01000000>; /* 16MB */ 32 reg = <0x5c000000 0x02000000>; /* 32M */ 51 gpios = <&gpio ASPEED_GPIO(O, 0) GPIO_ACTIVE_LOW>; 82 flash@0 { 99 pinctrl-0 = <&pinctrl_spi1debug_default>; 101 flash@0 { 112 pinctrl-0 = <&pinctrl_rmii1_default>; 133 pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>; 141 reg = <0x50>; [all …]
|
| D | am3517.dtsi | 24 cpu: cpu@0 { 43 opp-supported-hw = <0xffffffff 0xffffffff>; 50 opp-supported-hw = <0xffffffff 0xffffffff>; 59 reg = <0x5c040000 0x1000>; 68 reg = <0x5c000000 0x30000>; 71 ti,davinci-ctrl-reg-offset = <0x10000>; 72 ti,davinci-ctrl-mod-reg-offset = <0>; 73 ti,davinci-ctrl-ram-offset = <0x20000>; 74 ti,davinci-ctrl-ram-size = <0x2000>; 85 reg = <0x5c030000 0x1000>; [all …]
|
| D | aspeed-bmc-opp-palmetto.dts | 17 reg = <0x40000000 0x20000000>; 27 reg = <0x5f000000 0x01000000>; /* 16M */ 31 reg = <0x5ee00000 0x00200000>; 37 reg = <0x5C000000 0x02000000>; /* 32MB */ 60 #size-cells = <0>; 69 enable-gpios = <&gpio ASPEED_GPIO(D, 0) GPIO_ACTIVE_HIGH>; 86 flash@0 { 98 pinctrl-0 = <&pinctrl_spi1debug_default>; 100 flash@0 { 110 pinctrl-0 = <&pinctrl_flbusy_default &pinctrl_flwp_default [all …]
|
| /kernel/linux/linux-6.6/arch/arm/boot/dts/aspeed/ |
| D | aspeed-bmc-opp-vesnin.dts | 18 reg = <0x40000000 0x20000000>; 28 reg = <0x5f000000 0x01000000>; /* 16MB */ 32 reg = <0x5c000000 0x02000000>; /* 32M */ 51 gpios = <&gpio ASPEED_GPIO(O, 0) GPIO_ACTIVE_LOW>; 82 flash@0 { 99 pinctrl-0 = <&pinctrl_spi1debug_default>; 101 flash@0 { 112 pinctrl-0 = <&pinctrl_rmii1_default>; 133 pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>; 141 reg = <0x50>; [all …]
|
| D | aspeed-bmc-opp-palmetto.dts | 17 reg = <0x40000000 0x20000000>; 27 reg = <0x5f000000 0x01000000>; /* 16M */ 31 reg = <0x5ee00000 0x00200000>; 37 reg = <0x5C000000 0x02000000>; /* 32MB */ 60 #size-cells = <0>; 69 enable-gpios = <&gpio ASPEED_GPIO(D, 0) GPIO_ACTIVE_HIGH>; 86 flash@0 { 98 pinctrl-0 = <&pinctrl_spi1debug_default>; 100 flash@0 { 110 pinctrl-0 = <&pinctrl_flbusy_default &pinctrl_flwp_default [all …]
|
| /kernel/linux/linux-6.6/arch/arm64/boot/dts/qcom/ |
| D | sm6115-fxtec-pro1x.dts | 17 qcom,msm-id = <QCOM_ID_SM6115 0x10000>; 26 reg = <0x0 0x5c000000 0x0 (1080 * 2160 * 4)>; 38 pinctrl-0 = <&vol_up_n>; 61 power-source = <0>; 77 regulators-0 { 214 gpio-reserved-ranges = <0 4>, <14 4>;
|
| D | sm4250-oneplus-billie2.dts | 15 qcom,msm-id = <0x1a1 0x10000 0x1bc 0x10000>; 16 qcom,board-id = <0x1000b 0x00>; 30 reg = <0 0x5c000000 0 (1600 * 720 * 4)>; 41 reg = <0x0 0x5fff7000 0x0 0x8000>; 47 reg = <0x0 0xcbe00000 0x0 0x400000>; 48 record-size = <0x40000>; 49 pmsg-size = <0x200000>; 50 console-size = <0x40000>; 51 ftrace-size = <0x40000>; 55 reg = <0x0 0xcc200000 0x0 0x100000>; [all …]
|
| D | sm6115p-lenovo-j606f.dts | 17 qcom,msm-id = <445 0x10000>, <420 0x10000>; 31 reg = <0 0x5c000000 0 (2000 * 1200 * 4)>; 44 pinctrl-0 = <&vol_up_n>; 59 reg = <0x0 0xffc00000 0x0 0x100000>; 60 record-size = <0x1000>; 61 console-size = <0x40000>; 62 ftrace-size = <0x20000>; 84 panel: panel@0 { 86 reg = <0>; 92 pinctrl-0 = <&te_active &mdss_dsi_active>; [all …]
|
| D | sm6125-xiaomi-laurel-sprout.dts | 21 qcom,msm-id = <394 0>; /* sm6125 v1 */ 22 qcom,board-id = <11 0>; 31 reg = <0 0x5c000000 0 (1560 * 720 * 4)>; 41 reg = <0x0 0xffb00000 0x0 0xc0000>; 46 reg = <0x0 0xffbc0000 0x0 0x80000>; 52 reg = <0x0 0xffc40000 0x0 0xc0000>; 53 record-size = <0x1000>; 54 console-size = <0x40000>; 55 pmsg-size = <0x20000>; 59 reg = <0x0 0xffd40000 0x0 0x1000>; [all …]
|
| D | sm6125-sony-xperia-seine-pdx201.dts | 16 qcom,msm-id = <394 0x10000>; /* sm6125 v1 */ 17 qcom,board-id = <34 0>; 35 reg = <0 0x5c000000 0 (2520 * 1080 * 4)>; 51 pinctrl-0 = <&vol_down_n>; 68 reg = <0x0 0xffb00000 0x0 0xc0000>; 73 reg = <0x0 0xffbc0000 0x0 0x80000>; 79 reg = <0x0 0xffc40000 0x0 0xc0000>; 80 record-size = <0x1000>; 81 console-size = <0x40000>; 82 pmsg-size = <0x20000>; [all …]
|
| /kernel/linux/linux-6.6/arch/arm/boot/dts/ti/omap/ |
| D | am3517.dtsi | 21 cpu: cpu@0 { 41 opp-supported-hw = <0xffffffff 0xffffffff>; 49 opp-supported-hw = <0xffffffff 0xffffffff>; 56 reg = <0x5c040400 0x4>, 57 <0x5c040404 0x4>, 58 <0x5c040408 0x4>; 74 ranges = <0x0 0x5c040000 0x1000>; 76 am35x_otg_hs: am35x_otg_hs@0 { 79 reg = <0 0x1000>; 89 reg = <0x5c000000 0x30000>; [all …]
|
| D | dra7.dtsi | 61 reg = <0x0 0x48211000 0x0 0x1000>, 62 <0x0 0x48212000 0x0 0x2000>, 63 <0x0 0x48214000 0x0 0x2000>, 64 <0x0 0x48216000 0x0 0x2000>; 73 reg = <0x0 0x48281000 0x0 0x1000>; 79 #size-cells = <0>; 81 cpu0: cpu@0 { 84 reg = <0>; 109 opp-supported-hw = <0xFF 0x01>; 119 opp-supported-hw = <0xFF 0x02>; [all …]
|
| /kernel/linux/linux-5.10/arch/arm64/boot/dts/freescale/ |
| D | imx8qxp.dtsi | 52 #size-cells = <0>; 55 A35_0: cpu@0 { 58 reg = <0x0 0x0>; 69 reg = <0x0 0x1>; 80 reg = <0x0 0x2>; 91 reg = <0x0 0x3>; 124 reg = <0x0 0x51a00000 0 0x10000>, /* GIC Dist */ 125 <0x0 0x51b00000 0 0xc0000>; /* GICR (RD_base + SGI_base) */ 137 reg = <0 0x92400000 0 0x2000000>; 157 mboxes = <&lsio_mu1 0 0 [all …]
|
| /kernel/linux/linux-6.6/arch/arm/mach-pxa/ |
| D | pxa3xx.c | 51 #define NDCR (*(volatile u32 __iomem*)(NAND_VIRT + 0)) 61 #define ISRAM_START 0x5c000000 77 void (*fn)(unsigned int) = (void __force *)(sram + 0x8000); in pxa3xx_cpu_standby() 79 memcpy_toio(sram + 0x8000, pm_enter_standby_start, in pxa3xx_cpu_standby() 82 AD2D0SR = ~0; in pxa3xx_cpu_standby() 83 AD2D1SR = ~0; in pxa3xx_cpu_standby() 85 AD2D1ER = 0; in pxa3xx_cpu_standby() 93 AD2D0ER = 0; in pxa3xx_cpu_standby() 94 AD2D1ER = 0; in pxa3xx_cpu_standby() 102 * 0x5c014000 for the moment. [all …]
|
| /kernel/linux/linux-5.10/arch/arm/mach-pxa/ |
| D | pxa3xx.c | 50 #define NDCR (*(volatile u32 __iomem*)(NAND_VIRT + 0)) 56 #define ISRAM_START 0x5c000000 72 void (*fn)(unsigned int) = (void __force *)(sram + 0x8000); in pxa3xx_cpu_standby() 74 memcpy_toio(sram + 0x8000, pm_enter_standby_start, in pxa3xx_cpu_standby() 77 AD2D0SR = ~0; in pxa3xx_cpu_standby() 78 AD2D1SR = ~0; in pxa3xx_cpu_standby() 80 AD2D1ER = 0; in pxa3xx_cpu_standby() 88 AD2D0ER = 0; in pxa3xx_cpu_standby() 89 AD2D1ER = 0; in pxa3xx_cpu_standby() 97 * 0x5c014000 for the moment. [all …]
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/savage/ |
| D | savage_drv.h | 101 S3_UNKNOWN = 0, 227 #define SAVAGE_FB_SIZE_S3 0x01000000 /* 16MB */ 228 #define SAVAGE_FB_SIZE_S4 0x02000000 /* 32MB */ 229 #define SAVAGE_MMIO_SIZE 0x00080000 /* 512kB */ 230 #define SAVAGE_APERTURE_OFFSET 0x02000000 /* 32MB */ 231 #define SAVAGE_APERTURE_SIZE 0x05000000 /* 5 tiled surfaces, 16MB each */ 233 #define SAVAGE_BCI_OFFSET 0x00010000 /* offset of the BCI region 241 #define SAVAGE_STATUS_WORD0 0x48C00 242 #define SAVAGE_STATUS_WORD1 0x48C04 243 #define SAVAGE_ALT_STATUS_WORD0 0x48C60 [all …]
|