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12

/kernel/linux/linux-6.6/arch/x86/pci/
Ddirect.c18 (0x80000000 | ((reg & 0xF00) << 16) | (bus << 16) \
19 | (devfn << 8) | (reg & 0xFC))
33 outl(PCI_CONF1_ADDRESS(bus, devfn, reg), 0xCF8); in pci_conf1_read()
37 *value = inb(0xCFC + (reg & 3)); in pci_conf1_read()
40 *value = inw(0xCFC + (reg & 2)); in pci_conf1_read()
43 *value = inl(0xCFC); in pci_conf1_read()
49 return 0; in pci_conf1_read()
62 outl(PCI_CONF1_ADDRESS(bus, devfn, reg), 0xCF8); in pci_conf1_write()
66 outb((u8)value, 0xCFC + (reg & 3)); in pci_conf1_write()
69 outw((u16)value, 0xCFC + (reg & 2)); in pci_conf1_write()
[all …]
Dearly.c14 outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8); in read_pci_config()
15 v = inl(0xcfc); in read_pci_config()
22 outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8); in read_pci_config_byte()
23 v = inb(0xcfc + (offset&3)); in read_pci_config_byte()
30 outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8); in read_pci_config_16()
31 v = inw(0xcfc + (offset&2)); in read_pci_config_16()
38 outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8); in write_pci_config()
39 outl(val, 0xcfc); in write_pci_config()
44 outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8); in write_pci_config_byte()
45 outb(val, 0xcfc + (offset&3)); in write_pci_config_byte()
[all …]
Dacpi.c32 return 0; in set_use_crs()
38 return 0; in set_nouse_crs()
45 return 0; in set_ignore_seg()
53 return 0; in set_no_e820()
202 if (year >= 0 && year < 2008 && iomem_resource.end <= 0xffffffff) in pci_acpi_crs_quirks()
270 return 0; in check_segment()
288 return 0; in setup_mcfg_map()
295 if (result == 0) { in setup_mcfg_map()
304 return 0; in setup_mcfg_map()
321 return 0; in setup_mcfg_map()
[all …]
/kernel/linux/linux-5.10/arch/x86/pci/
Ddirect.c18 (0x80000000 | ((reg & 0xF00) << 16) | (bus << 16) \
19 | (devfn << 8) | (reg & 0xFC))
33 outl(PCI_CONF1_ADDRESS(bus, devfn, reg), 0xCF8); in pci_conf1_read()
37 *value = inb(0xCFC + (reg & 3)); in pci_conf1_read()
40 *value = inw(0xCFC + (reg & 2)); in pci_conf1_read()
43 *value = inl(0xCFC); in pci_conf1_read()
49 return 0; in pci_conf1_read()
62 outl(PCI_CONF1_ADDRESS(bus, devfn, reg), 0xCF8); in pci_conf1_write()
66 outb((u8)value, 0xCFC + (reg & 3)); in pci_conf1_write()
69 outw((u16)value, 0xCFC + (reg & 2)); in pci_conf1_write()
[all …]
Dearly.c14 outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8); in read_pci_config()
15 v = inl(0xcfc); in read_pci_config()
22 outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8); in read_pci_config_byte()
23 v = inb(0xcfc + (offset&3)); in read_pci_config_byte()
30 outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8); in read_pci_config_16()
31 v = inw(0xcfc + (offset&2)); in read_pci_config_16()
38 outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8); in write_pci_config()
39 outl(val, 0xcfc); in write_pci_config()
44 outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8); in write_pci_config_byte()
45 outb(val, 0xcfc + (offset&3)); in write_pci_config_byte()
[all …]
Dacpi.c28 return 0; in set_use_crs()
34 return 0; in set_nouse_crs()
41 return 0; in set_ignore_seg()
145 if (year >= 0 && year < 2008 && iomem_resource.end <= 0xffffffff) in pci_acpi_crs_quirks()
186 return 0; in check_segment()
204 return 0; in setup_mcfg_map()
211 if (result == 0) { in setup_mcfg_map()
220 return 0; in setup_mcfg_map()
237 return 0; in setup_mcfg_map()
253 if (node != 0 && node != NUMA_NO_NODE) in pci_acpi_root_get_node()
[all …]
/kernel/linux/linux-5.10/drivers/ide/
Dcmd640.c121 #define VID 0x00
122 #define DID 0x02
123 #define PCMD 0x04
124 #define PCMD_ENA 0x01
125 #define PSTTS 0x06
126 #define REVID 0x08
127 #define PROGIF 0x09
128 #define SUBCL 0x0a
129 #define BASCL 0x0b
130 #define BaseA0 0x10
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/
Dlantiq,xrx200-net.txt16 #size-cells = <0>;
18 reg = <0xe10b308 0xcf8>;
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/net/
Dlantiq,xrx200-net.yaml14 pattern: "^ethernet@[0-9a-f]+$"
36 const: 0
52 #size-cells = <0>;
54 reg = <0xe10b308 0xcf8>;
/kernel/linux/linux-6.6/arch/ia64/pci/
Dpci.c51 u64 addr, data = 0; in raw_pci_read()
59 mode = 0; in raw_pci_read()
68 if (result != 0) in raw_pci_read()
72 return 0; in raw_pci_read()
86 mode = 0; in raw_pci_write()
94 if (result != 0) in raw_pci_write()
96 return 0; in raw_pci_write()
129 if (phys_base == 0) in new_space()
130 return 0; /* legacy I/O port space */ in new_space()
132 mmio_base = (u64) ioremap(phys_base, 0); in new_space()
[all …]
/kernel/linux/linux-5.10/arch/ia64/pci/
Dpci.c51 u64 addr, data = 0; in raw_pci_read()
59 mode = 0; in raw_pci_read()
68 if (result != 0) in raw_pci_read()
72 return 0; in raw_pci_read()
86 mode = 0; in raw_pci_write()
94 if (result != 0) in raw_pci_write()
96 return 0; in raw_pci_write()
129 if (phys_base == 0) in new_space()
130 return 0; /* legacy I/O port space */ in new_space()
132 mmio_base = (u64) ioremap(phys_base, 0); in new_space()
[all …]
/kernel/linux/linux-5.10/arch/x86/kernel/
Dreboot_fixups_32.c20 /* writing 1 to the reset control register, 0x44 causes the in cs5530a_warm_reset()
22 pci_write_config_byte(dev, 0x44, 0x1); in cs5530a_warm_reset()
38 outl(0x80003840, 0xCF8); in rdc321x_reset()
40 i = inl(0xCFC); in rdc321x_reset()
42 i |= 0x1600; in rdc321x_reset()
43 outl(i, 0xCFC); in rdc321x_reset()
44 outb(1, 0x92); in rdc321x_reset()
51 for (i = 0; i < 10; i++) { in ce4100_reset()
52 outb(0x2, 0xcf9); in ce4100_reset()
66 #define PCI_DEVICE_ID_INTEL_CE4100 0x0708
[all …]
/kernel/linux/linux-6.6/arch/x86/kernel/
Dreboot_fixups_32.c20 /* writing 1 to the reset control register, 0x44 causes the in cs5530a_warm_reset()
22 pci_write_config_byte(dev, 0x44, 0x1); in cs5530a_warm_reset()
38 outl(0x80003840, 0xCF8); in rdc321x_reset()
40 i = inl(0xCFC); in rdc321x_reset()
42 i |= 0x1600; in rdc321x_reset()
43 outl(i, 0xCFC); in rdc321x_reset()
44 outb(1, 0x92); in rdc321x_reset()
51 for (i = 0; i < 10; i++) { in ce4100_reset()
52 outb(0x2, 0xcf9); in ce4100_reset()
66 #define PCI_DEVICE_ID_INTEL_CE4100 0x0708
[all …]
/kernel/linux/linux-6.6/drivers/virt/acrn/
Dioreq.c43 int ret = 0; in ioreq_complete_request()
65 if (ret < 0) in ioreq_complete_request()
95 int ret = 0; in acrn_ioreq_request_default_complete()
113 * Return: 0 on success, <0 on error
122 "Invalid IO range [0x%llx,0x%llx]\n", start, end); in acrn_ioreq_range_add()
138 return 0; in acrn_ioreq_range_add()
194 if (ret < 0) { in ioreq_task()
203 return 0; in ioreq_task()
240 } while (has_pending && --retry > 0); in acrn_ioreq_request_clear()
241 if (retry == 0) in acrn_ioreq_request_clear()
[all …]
/kernel/linux/linux-6.6/arch/mips/pci/
Dops-sni.c19 * test for bus 0 and hope forwarding and decoding work properly for any
29 if (busno == 0 && devfn >= PCI_DEVFN(8, 0)) in set_config_address()
33 ((busno & 0xff) << 16) | in set_config_address()
34 ((devfn & 0xff) << 8) | in set_config_address()
35 (reg & 0xfc); in set_config_address()
60 return 0; in pcimt_read()
83 return 0; in pcimt_write()
96 outl((1 << 31) | ((busno & 0xff) << 16) | ((devfn & 0xff) << 8) | (reg & 0xfc), 0xcf8); in pcit_set_config_address()
106 * on bus 0 we need to check, whether there is a device answering in pcit_read()
110 if (bus->number == 0) { in pcit_read()
[all …]
/kernel/linux/linux-5.10/arch/mips/pci/
Dops-sni.c19 * test for bus 0 and hope forwarding and decoding work properly for any
29 if (busno == 0 && devfn >= PCI_DEVFN(8, 0)) in set_config_address()
33 ((busno & 0xff) << 16) | in set_config_address()
34 ((devfn & 0xff) << 8) | in set_config_address()
35 (reg & 0xfc); in set_config_address()
60 return 0; in pcimt_read()
83 return 0; in pcimt_write()
96 outl((1 << 31) | ((busno & 0xff) << 16) | ((devfn & 0xff) << 8) | (reg & 0xfc), 0xcf8); in pcit_set_config_address()
106 * on bus 0 we need to check, whether there is a device answering in pcit_read()
110 if (bus->number == 0) { in pcit_read()
[all …]
/kernel/linux/linux-6.6/drivers/net/wireless/marvell/mwifiex/
Dpcie.h27 #define PCIE_VENDOR_ID_MARVELL (0x11ab)
28 #define PCIE_VENDOR_ID_V2_MARVELL (0x1b4b)
29 #define PCIE_DEVICE_ID_MARVELL_88W8766P (0x2b30)
30 #define PCIE_DEVICE_ID_MARVELL_88W8897 (0x2b38)
31 #define PCIE_DEVICE_ID_MARVELL_88W8997 (0x2b42)
33 #define PCIE8897_A0 0x1100
34 #define PCIE8897_B0 0x1200
35 #define PCIE8997_A0 0x10
36 #define PCIE8997_A1 0x11
37 #define CHIP_VER_PCIEUART 0x3
[all …]
/kernel/linux/linux-5.10/arch/mips/sni/
Dpcit.c32 PORT(0x3f8, 0),
33 PORT(0x2f8, 3),
46 PORT(0x3f8, 0),
47 PORT(0x2f8, 3),
48 PORT(0x3e8, 4),
49 PORT(0x2e8, 3),
63 .start = 0x70,
64 .end = 0x71,
86 .start = 0x00000000UL,
87 .end = 0x03bfffffUL,
[all …]
/kernel/linux/linux-6.6/arch/mips/sni/
Dpcit.c32 PORT(0x3f8, 0),
33 PORT(0x2f8, 3),
46 PORT(0x3f8, 0),
47 PORT(0x2f8, 3),
48 PORT(0x3e8, 4),
49 PORT(0x2e8, 3),
63 .start = 0x70,
64 .end = 0x71,
86 .start = 0x00000000UL,
87 .end = 0x03bfffffUL,
[all …]
/kernel/linux/linux-5.10/drivers/net/wireless/marvell/mwifiex/
Dpcie.h39 #define PCIE_VENDOR_ID_MARVELL (0x11ab)
40 #define PCIE_VENDOR_ID_V2_MARVELL (0x1b4b)
41 #define PCIE_DEVICE_ID_MARVELL_88W8766P (0x2b30)
42 #define PCIE_DEVICE_ID_MARVELL_88W8897 (0x2b38)
43 #define PCIE_DEVICE_ID_MARVELL_88W8997 (0x2b42)
45 #define PCIE8897_A0 0x1100
46 #define PCIE8897_B0 0x1200
47 #define PCIE8997_A0 0x10
48 #define PCIE8997_A1 0x11
49 #define CHIP_VER_PCIEUART 0x3
[all …]
/kernel/linux/linux-6.6/drivers/watchdog/
Dibmasr.c36 #define TOPAZ_ASR_TOGGLE 0x40
37 #define TOPAZ_ASR_DISABLE 0x80
40 #define PEARL_BASE 0xe04
41 #define PEARL_WRITE 0xe06
42 #define PEARL_READ 0xe07
44 #define PEARL_ASR_DISABLE_MASK 0x80 /* bit 7: disable = 1, enable = 0 */
45 #define PEARL_ASR_TOGGLE_MASK 0x40 /* bit 6: 0, then 1, then 0 */
48 #define JASPER_ASR_REG_OFFSET 0x38
50 #define JASPER_ASR_DISABLE_MASK 0x01 /* bit 0: disable = 1, enable = 0 */
51 #define JASPER_ASR_TOGGLE_MASK 0x02 /* bit 1: 0, then 1, then 0 */
[all …]
/kernel/linux/linux-5.10/drivers/watchdog/
Dibmasr.c37 #define TOPAZ_ASR_TOGGLE 0x40
38 #define TOPAZ_ASR_DISABLE 0x80
41 #define PEARL_BASE 0xe04
42 #define PEARL_WRITE 0xe06
43 #define PEARL_READ 0xe07
45 #define PEARL_ASR_DISABLE_MASK 0x80 /* bit 7: disable = 1, enable = 0 */
46 #define PEARL_ASR_TOGGLE_MASK 0x40 /* bit 6: 0, then 1, then 0 */
49 #define JASPER_ASR_REG_OFFSET 0x38
51 #define JASPER_ASR_DISABLE_MASK 0x01 /* bit 0: disable = 1, enable = 0 */
52 #define JASPER_ASR_TOGGLE_MASK 0x02 /* bit 1: 0, then 1, then 0 */
[all …]
/kernel/linux/linux-5.10/arch/mips/include/asm/ip32/
Dmace.h18 #define MACE_BASE 0x1f000000 /* physical */
43 #define MACEPCI_ERROR_DEVSEL_MASK 0xc0
44 #define MACEPCI_ERROR_DEVSEL_FAST 0
45 #define MACEPCI_ERROR_DEVSEL_MED 0x40
46 #define MACEPCI_ERROR_DEVSEL_SLOW 0x80
48 #define MACEPCI_ERROR_66MHZ BIT(0)
51 #define MACEPCI_CONTROL_INT_MASK 0xff
61 #define MACEPCI_CONTROL_INV_INT_MASK 0x00ff0000
71 unsigned int _pad[0xcf8/4 - 4];
79 #define MACEPCI_LOW_MEMORY 0x1a000000
[all …]
/kernel/linux/linux-6.6/arch/mips/include/asm/ip32/
Dmace.h18 #define MACE_BASE 0x1f000000 /* physical */
43 #define MACEPCI_ERROR_DEVSEL_MASK 0xc0
44 #define MACEPCI_ERROR_DEVSEL_FAST 0
45 #define MACEPCI_ERROR_DEVSEL_MED 0x40
46 #define MACEPCI_ERROR_DEVSEL_SLOW 0x80
48 #define MACEPCI_ERROR_66MHZ BIT(0)
51 #define MACEPCI_CONTROL_INT_MASK 0xff
61 #define MACEPCI_CONTROL_INV_INT_MASK 0x00ff0000
71 unsigned int _pad[0xcf8/4 - 4];
79 #define MACEPCI_LOW_MEMORY 0x1a000000
[all …]
/kernel/linux/linux-6.6/arch/mips/include/asm/
Dgt64120.h21 #define GT_CPU_OFS 0x000
23 #define GT_MULTI_OFS 0x120
26 #define GT_SCS10LD_OFS 0x008
27 #define GT_SCS10HD_OFS 0x010
28 #define GT_SCS32LD_OFS 0x018
29 #define GT_SCS32HD_OFS 0x020
30 #define GT_CS20LD_OFS 0x028
31 #define GT_CS20HD_OFS 0x030
32 #define GT_CS3BOOTLD_OFS 0x038
33 #define GT_CS3BOOTHD_OFS 0x040
[all …]

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