Home
last modified time | relevance | path

Searched +full:0 +full:xe00000 (Results 1 – 25 of 104) sorted by relevance

12345

/kernel/linux/linux-6.6/arch/arm64/boot/dts/marvell/
Darmada-7040-db.dts20 memory@0 {
22 reg = <0x0 0x0 0x0 0x80000000>;
33 regulator-name = "cp0-usb3-0-current-regulator";
38 states = <500000 0x0
39 900000 0x1>;
41 gpios-states = <0>;
51 states = <500000 0x0
52 900000 0x1>;
54 gpios-states = <0>;
57 cp0_reg_usb3_0_vbus: cp0-usb3-0-vbus {
[all …]
Dcn9130-db.dtsi28 memory@0 {
30 reg = <0x0 0x0 0x0 0x80000000>;
33 ap0_reg_sd_vccq: ap0_sd_vccq@0 {
39 states = <1800000 0x1 3300000 0x0>;
42 cp0_reg_usb3_vbus0: cp0_usb3_vbus@0 {
48 gpio = <&expander0 0 GPIO_ACTIVE_HIGH>;
51 cp0_usb3_0_phy0: cp0_usb3_phy@0 {
70 cp0_reg_sd_vccq: cp0_sd_vccq@0 {
76 states = <1800000 0x1
77 3300000 0x0>;
[all …]
Dcn9131-db.dtsi21 cp1_reg_usb3_vbus0: cp1_usb3_vbus@0 {
24 pinctrl-0 = <&cp1_xhci0_vbus_pins>;
45 pinctrl-0 = <&cp1_sfp_pins>;
61 #define CP11X_PCIEx_MEM_BASE(iface) (0xe2000000 + (iface * 0x1000000))
62 #define CP11X_PCIEx_MEM_SIZE(iface) 0xf00000
90 phys = <&cp1_comphy4 0>;
106 pinctrl-0 = <&cp1_i2c0_pins>;
113 pinctrl-0 = <&cp1_pcie_reset_pins>;
116 marvell,reset-gpio = <&cp1_gpio1 0 GPIO_ACTIVE_HIGH>;
119 phys = <&cp1_comphy0 0
[all …]
Darmada-8040-db.dts20 memory@0 {
22 reg = <0x0 0x0 0x0 0x80000000>;
34 cp0_reg_usb3_0_vbus: cp0-usb3-0-vbus {
40 gpio = <&expander0 0 GPIO_ACTIVE_HIGH>;
52 cp0_usb3_0_phy: cp0-usb3-0-phy {
57 cp1_reg_usb3_0_vbus: cp1-usb3-0-vbus {
63 gpio = <&expander1 0 GPIO_ACTIVE_HIGH>;
66 cp1_usb3_0_phy: cp1-usb3-0-phy {
75 flash@0 {
77 reg = <0>;
[all …]
Dcn9130-crb.dtsi24 memory@0 {
26 reg = <0x0 0x0 0x0 0x80000000>;
29 ap0_reg_mmc_vccq: ap0_mmc_vccq@0 {
35 states = <1800000 0x1
36 3300000 0x0>;
57 cp0_reg_sd_vccq: cp0_sd_vccq@0 {
63 states = <1800000 0x1
64 3300000 0x0>;
67 cp0_reg_sd_vcc: cp0_sd_vcc@0 {
106 cp0_i2c0_pins: cp0-i2c-pins-0 {
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/marvell/
Darmada-7040-db.dts20 memory@0 {
22 reg = <0x0 0x0 0x0 0x80000000>;
33 regulator-name = "cp0-usb3-0-current-regulator";
38 states = <500000 0x0
39 900000 0x1>;
41 gpios-states = <0>;
51 states = <500000 0x0
52 900000 0x1>;
54 gpios-states = <0>;
57 cp0_reg_usb3_0_vbus: cp0-usb3-0-vbus {
[all …]
Dcn9130-db.dts32 reg = <0x0 0x0 0x0 0x80000000>;
35 ap0_reg_sd_vccq: ap0_sd_vccq@0 {
41 states = <1800000 0x1 3300000 0x0>;
44 cp0_reg_usb3_vbus0: cp0_usb3_vbus@0 {
50 gpio = <&expander0 0 GPIO_ACTIVE_HIGH>;
53 cp0_usb3_0_phy0: cp0_usb3_phy@0 {
72 cp0_reg_sd_vccq: cp0_sd_vccq@0 {
78 states = <1800000 0x1
79 3300000 0x0>;
82 cp0_reg_sd_vcc: cp0_sd_vcc@0 {
[all …]
Dcn9131-db.dts22 cp1_reg_usb3_vbus0: cp1_usb3_vbus@0 {
25 pinctrl-0 = <&cp1_xhci0_vbus_pins>;
46 pinctrl-0 = <&cp1_sfp_pins>;
62 #define CP11X_PCIEx_MEM_BASE(iface) (0xe2000000 + (iface * 0x1000000))
63 #define CP11X_PCIEx_MEM_SIZE(iface) 0xf00000
91 phys = <&cp1_comphy4 0>;
107 pinctrl-0 = <&cp1_i2c0_pins>;
114 pinctrl-0 = <&cp1_pcie_reset_pins>;
117 marvell,reset-gpio = <&cp1_gpio1 0 GPIO_ACTIVE_HIGH>;
120 phys = <&cp1_comphy0 0
[all …]
Darmada-8040-db.dts20 memory@0 {
22 reg = <0x0 0x0 0x0 0x80000000>;
34 cp0_reg_usb3_0_vbus: cp0-usb3-0-vbus {
40 gpio = <&expander0 0 GPIO_ACTIVE_HIGH>;
52 cp0_usb3_0_phy: cp0-usb3-0-phy {
57 cp1_reg_usb3_0_vbus: cp1-usb3-0-vbus {
63 gpio = <&expander1 0 GPIO_ACTIVE_HIGH>;
66 cp1_usb3_0_phy: cp1-usb3-0-phy {
75 spi-flash@0 {
77 reg = <0>;
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mtd/partitions/
Dnvmem-cells.yaml44 reg = <0x1200000 0x0140000>;
50 macaddr_gmac1: macaddr_gmac1@0 {
51 reg = <0x0 0x6>;
55 reg = <0x6 0x6>;
59 reg = <0x1000 0x2f20>;
63 reg = <0x5000 0x2f20>;
72 partition@0 {
74 reg = <0x000000 0x100000>;
81 reg = <0x100000 0xe00000>;
87 reg = <0xf00000 0x100000>;
[all …]
Dfixed-partitions.yaml33 "@[0-9a-f]+$":
59 partition@0 {
61 reg = <0x0000000 0x100000>;
66 reg = <0x0100000 0x200000>;
77 partition@0 {
79 reg = <0x00000000 0x1 0x00000000>;
91 partition@0 {
93 reg = <0x0 0x00000000 0x2 0x00000000>;
99 reg = <0x2 0x00000000 0x1 0x00000000>;
109 partition@0 {
[all …]
/kernel/linux/linux-6.6/drivers/phy/rockchip/
Dphy-rockchip-inno-hdmi.c25 /* REG: 0x00 */
26 #define RK3228_PRE_PLL_REFCLK_SEL_PCLK BIT(0)
27 /* REG: 0x01 */
30 #define RK3228_BYPASS_PLLPD_EN BIT(0)
31 /* REG: 0x02 */
33 #define RK3228_PDATAEN_DISABLE BIT(0)
34 /* REG: 0x03 */
36 #define RK3228_AUTO_TERM_RES_CAL_SPEED_14_8(x) UPDATE(x, 6, 0)
37 /* REG: 0x04 */
38 #define RK3228_AUTO_TERM_RES_CAL_SPEED_7_0(x) UPDATE(x, 7, 0)
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mtd/
Dpartition.txt71 flash@0 {
77 partition@0 {
79 reg = <0x0000000 0x100000>;
84 reg = <0x0100000 0x200000>;
96 partition@0 {
98 reg = <0x00000000 0x1 0x00000000>;
110 partition@0 {
112 reg = <0x0 0x00000000 0x2 0x00000000>;
118 reg = <0x2 0x00000000 0x1 0x00000000>;
129 partition@0 {
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dkirkwood-dir665.dts18 reg = <0x00000000 0x8000000>; /* 128 MB */
28 pinctrl-0 =< &pmx_led_usb
81 m25p80@0 {
86 reg = <0>;
88 partition@0 {
90 reg = <0x0 0x30000>;
96 reg = <0x30000 0x10000>;
102 reg = <0x40000 0x180000>;
107 reg = <0x1c0000 0xe00000>;
112 reg = <0xfc0000 0x10000>;
[all …]
Dox820.dtsi19 #size-cells = <0>;
22 cpu@0 {
26 reg = <0>;
39 /* Max 512MB @ 0x60000000 */
40 reg = <0x60000000 0x20000000>;
46 #clock-cells = <0>;
52 #clock-cells = <0>;
58 #clock-cells = <0>;
66 #clock-cells = <0>;
72 #clock-cells = <0>;
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/marvell/
Dkirkwood-dir665.dts18 reg = <0x00000000 0x8000000>; /* 128 MB */
28 pinctrl-0 =< &pmx_led_usb
81 flash@0 {
86 reg = <0>;
88 partition@0 {
90 reg = <0x0 0x30000>;
96 reg = <0x30000 0x10000>;
102 reg = <0x40000 0x180000>;
107 reg = <0x1c0000 0xe00000>;
112 reg = <0xfc0000 0x10000>;
[all …]
/kernel/linux/linux-6.6/drivers/accel/habanalabs/include/goya/asic_reg/
Dgoya_masks.h180 ) & 0x7FFFFF)
191 #define GOYA_IRQ_HBW_ID_MASK 0x1FFF
192 #define GOYA_IRQ_HBW_ID_SHIFT 0
193 #define GOYA_IRQ_HBW_INTERNAL_ID_MASK 0xE000
195 #define GOYA_IRQ_HBW_AGENT_ID_MASK 0x1F0000
197 #define GOYA_IRQ_HBW_Y_MASK 0xE00000
199 #define GOYA_IRQ_HBW_X_MASK 0x7000000
201 #define GOYA_IRQ_LBW_ID_MASK 0xFF
202 #define GOYA_IRQ_LBW_ID_SHIFT 0
203 #define GOYA_IRQ_LBW_INTERNAL_ID_MASK 0x700
[all …]
/kernel/linux/linux-5.10/drivers/misc/habanalabs/include/goya/asic_reg/
Dgoya_masks.h180 ) & 0x7FFFFF)
191 #define GOYA_IRQ_HBW_ID_MASK 0x1FFF
192 #define GOYA_IRQ_HBW_ID_SHIFT 0
193 #define GOYA_IRQ_HBW_INTERNAL_ID_MASK 0xE000
195 #define GOYA_IRQ_HBW_AGENT_ID_MASK 0x1F0000
197 #define GOYA_IRQ_HBW_Y_MASK 0xE00000
199 #define GOYA_IRQ_HBW_X_MASK 0x7000000
201 #define GOYA_IRQ_LBW_ID_MASK 0xFF
202 #define GOYA_IRQ_LBW_ID_SHIFT 0
203 #define GOYA_IRQ_LBW_INTERNAL_ID_MASK 0x700
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/intel/ixp/
Dintel-ixp43x-gateworks-gw2358.dts16 memory@0 {
19 reg = <0x00000000 0x8000000>;
35 gpios = <&pld1 0 GPIO_ACTIVE_LOW>;
47 #size-cells = <0>;
51 reg = <0x28>;
55 reg = <0x68>;
59 reg = <0x51>;
66 reg = <0x56>;
73 reg = <0x57>;
81 flash@0,0 {
[all …]
/kernel/linux/linux-6.6/arch/m68k/include/asm/
Dm5307sim.h27 #define MCFSIM_RSR (MCF_MBAR + 0x00) /* Reset Status reg */
28 #define MCFSIM_SYPCR (MCF_MBAR + 0x01) /* System Protection */
29 #define MCFSIM_SWIVR (MCF_MBAR + 0x02) /* SW Watchdog intr */
30 #define MCFSIM_SWSR (MCF_MBAR + 0x03) /* SW Watchdog service*/
31 #define MCFSIM_PAR (MCF_MBAR + 0x04) /* Pin Assignment */
32 #define MCFSIM_IRQPAR (MCF_MBAR + 0x06) /* Itr Assignment */
33 #define MCFSIM_PLLCR (MCF_MBAR + 0x08) /* PLL Ctrl Reg */
34 #define MCFSIM_MPARK (MCF_MBAR + 0x0C) /* BUS Master Ctrl */
35 #define MCFSIM_IPR (MCF_MBAR + 0x40) /* Interrupt Pend */
36 #define MCFSIM_IMR (MCF_MBAR + 0x44) /* Interrupt Mask */
[all …]
/kernel/linux/linux-5.10/arch/m68k/include/asm/
Dm5307sim.h27 #define MCFSIM_RSR (MCF_MBAR + 0x00) /* Reset Status reg */
28 #define MCFSIM_SYPCR (MCF_MBAR + 0x01) /* System Protection */
29 #define MCFSIM_SWIVR (MCF_MBAR + 0x02) /* SW Watchdog intr */
30 #define MCFSIM_SWSR (MCF_MBAR + 0x03) /* SW Watchdog service*/
31 #define MCFSIM_PAR (MCF_MBAR + 0x04) /* Pin Assignment */
32 #define MCFSIM_IRQPAR (MCF_MBAR + 0x06) /* Itr Assignment */
33 #define MCFSIM_PLLCR (MCF_MBAR + 0x08) /* PLL Ctrl Reg */
34 #define MCFSIM_MPARK (MCF_MBAR + 0x0C) /* BUS Master Ctrl */
35 #define MCFSIM_IPR (MCF_MBAR + 0x40) /* Interrupt Pend */
36 #define MCFSIM_IMR (MCF_MBAR + 0x44) /* Interrupt Mask */
[all …]
/kernel/linux/linux-6.6/arch/csky/kernel/probes/
Dsimulate-insn.c18 *ptr = *(&regs->exregs[0] + index - 16); in csky_insn_reg_get_val()
47 *(&regs->exregs[0] + index - 16) = val; in csky_insn_reg_set_val()
72 addr + sign_extend32((opcode & 0x3ff) << 1, 9)); in simulate_br16()
79 addr + sign_extend32((opcode & 0xffff0000) >> 15, 15)); in simulate_br32()
87 addr + sign_extend32((opcode & 0x3ff) << 1, 9)); in simulate_bt16()
97 addr + sign_extend32((opcode & 0xffff0000) >> 15, 15)); in simulate_bt32()
107 addr + sign_extend32((opcode & 0x3ff) << 1, 9)); in simulate_bf16()
117 addr + sign_extend32((opcode & 0xffff0000) >> 15, 15)); in simulate_bf32()
125 unsigned long tmp = (opcode >> 2) & 0xf; in simulate_jmp16()
129 instruction_pointer_set(regs, tmp & 0xfffffffe); in simulate_jmp16()
[all …]
/kernel/linux/linux-5.10/arch/csky/kernel/probes/
Dsimulate-insn.c18 *ptr = *(&regs->exregs[0] + index - 16); in csky_insn_reg_get_val()
47 *(&regs->exregs[0] + index - 16) = val; in csky_insn_reg_set_val()
72 addr + sign_extend32((opcode & 0x3ff) << 1, 9)); in simulate_br16()
79 addr + sign_extend32((opcode & 0xffff0000) >> 15, 15)); in simulate_br32()
87 addr + sign_extend32((opcode & 0x3ff) << 1, 9)); in simulate_bt16()
97 addr + sign_extend32((opcode & 0xffff0000) >> 15, 15)); in simulate_bt32()
107 addr + sign_extend32((opcode & 0x3ff) << 1, 9)); in simulate_bf16()
117 addr + sign_extend32((opcode & 0xffff0000) >> 15, 15)); in simulate_bf32()
125 unsigned long tmp = (opcode >> 2) & 0xf; in simulate_jmp16()
129 instruction_pointer_set(regs, tmp & 0xfffffffe); in simulate_jmp16()
[all …]
/kernel/linux/linux-5.10/drivers/remoteproc/
Dti_k3_dsp_remoteproc.c118 dev_dbg(dev, "mbox msg: 0x%x\n", msg); in k3_dsp_rproc_mbox_callback()
136 dev_dbg(dev, "dropping unknown message 0x%x", msg); in k3_dsp_rproc_mbox_callback()
160 if (ret < 0) in k3_dsp_rproc_kick()
287 kproc->mbox = mbox_request_channel(client, 0); in k3_dsp_rproc_start()
303 if (ret < 0) { in k3_dsp_rproc_start()
310 dev_err(dev, "invalid boot address 0x%x, must be aligned on a 0x%x boundary\n", in k3_dsp_rproc_start()
316 dev_err(dev, "booting DSP core using boot addr = 0x%x\n", boot_addr); in k3_dsp_rproc_start()
317 ret = ti_sci_proc_set_config(kproc->tsp, boot_addr, 0, 0); in k3_dsp_rproc_start()
325 return 0; in k3_dsp_rproc_start()
346 return 0; in k3_dsp_rproc_stop()
[all …]
/kernel/linux/linux-6.6/drivers/remoteproc/
Dti_k3_dsp_remoteproc.c118 dev_dbg(dev, "mbox msg: 0x%x\n", msg); in k3_dsp_rproc_mbox_callback()
136 dev_dbg(dev, "dropping unknown message 0x%x", msg); in k3_dsp_rproc_mbox_callback()
160 if (ret < 0) in k3_dsp_rproc_kick()
232 kproc->mbox = mbox_request_channel(client, 0); in k3_dsp_rproc_request_mbox()
248 if (ret < 0) { in k3_dsp_rproc_request_mbox()
254 return 0; in k3_dsp_rproc_request_mbox()
324 dev_err(dev, "invalid boot address 0x%x, must be aligned on a 0x%x boundary\n", in k3_dsp_rproc_start()
330 dev_err(dev, "booting DSP core using boot addr = 0x%x\n", boot_addr); in k3_dsp_rproc_start()
331 ret = ti_sci_proc_set_config(kproc->tsp, boot_addr, 0, 0); in k3_dsp_rproc_start()
339 return 0; in k3_dsp_rproc_start()
[all …]

12345