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/kernel/linux/linux-6.6/arch/arm/mach-imx/
Dhardware.h21 (addr) - (module ## _BASE_ADDR) + (module ## _BASE_ADDR_VIRT) : 0)
35 * whole address space to [0xf4000000, 0xf5ffffff]. So [0xf6000000,0xfeffffff]
41 * IO 0x00200000+0x100000 -> 0xf4000000+0x100000
43 * AIPI 0x10000000+0x100000 -> 0xf4400000+0x100000
44 * SAHB1 0x80000000+0x100000 -> 0xf5000000+0x100000
45 * X_MEMC 0xdf000000+0x004000 -> 0xf5f00000+0x004000
47 * AIPS1 0x43f00000+0x100000 -> 0xf5300000+0x100000
48 * AIPS2 0x53f00000+0x100000 -> 0xf5700000+0x100000
49 * AVIC 0x68000000+0x100000 -> 0xf5800000+0x100000
51 * AIPI 0x10000000+0x100000 -> 0xf4400000+0x100000
[all …]
/kernel/linux/linux-5.10/arch/arm/mach-imx/
Dhardware.h21 (addr) - (module ## _BASE_ADDR) + (module ## _BASE_ADDR_VIRT) : 0)
35 * whole address space to [0xf4000000, 0xf5ffffff]. So [0xf6000000,0xfeffffff]
41 * IO 0x00200000+0x100000 -> 0xf4000000+0x100000
43 * AIPI 0x10000000+0x100000 -> 0xf4400000+0x100000
44 * SAHB1 0x80000000+0x100000 -> 0xf5000000+0x100000
45 * X_MEMC 0xdf000000+0x004000 -> 0xf5f00000+0x004000
47 * AIPS1 0x43f00000+0x100000 -> 0xf5300000+0x100000
48 * AIPS2 0x53f00000+0x100000 -> 0xf5700000+0x100000
49 * AVIC 0x68000000+0x100000 -> 0xf5800000+0x100000
51 * AIPI 0x10000000+0x100000 -> 0xf4400000+0x100000
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pci/
Dkirin-pcie.txt27 reg = <0x0 0xf4000000 0x0 0x1000>, <0x0 0xff3fe000 0x0 0x1000>,
28 <0x0 0xf3f20000 0x0 0x40000>, <0x0 0xF4000000 0 0x2000>;
30 bus-range = <0x0 0x1>;
34 ranges = <0x02000000 0x0 0x00000000 0x0 0xf5000000 0x0 0x2000000>;
37 interrupt-map-mask = <0xf800 0 0 7>;
38 interrupt-map = <0x0 0 0 1 &gic 0 0 0 282 4>,
39 <0x0 0 0 2 &gic 0 0 0 283 4>,
40 <0x0 0 0 3 &gic 0 0 0 284 4>,
41 <0x0 0 0 4 &gic 0 0 0 285 4>;
49 reset-gpios = <&gpio11 1 0 >;
Dhisilicon-histb-pcie.txt38 - phys: List of phandle and phy mode specifier, should be 0.
44 reg = <0xf9860000 0x1000>,
45 <0xf0000000 0x2000>,
46 <0xf2000000 0x01000000>;
51 bus-range = <0 15>;
53 ranges=<0x81000000 0 0 0xf4000000 0 0x00010000
54 0x82000000 0 0xf3000000 0xf3000000 0 0x01000000>;
58 interrupt-map-mask = <0 0 0 0>;
59 interrupt-map = <0 0 0 0 &gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
65 resets = <&crg 0x18c 6>, <&crg 0x18c 5>, <&crg 0x18c 4>;
/kernel/linux/linux-6.6/arch/xtensa/boot/dts/
Dvirt.dts14 memory@0 {
16 reg = <0x00000000 0x80000000>;
21 #size-cells = <0>;
22 cpu@0 {
24 reg = <0>;
31 #clock-cells = <0>;
40 * two cells: second cell == 0: internal irq number
43 #address-cells = <0>;
53 #interrupt-cells = <0x1>;
55 bus-range = <0x0 0x3e>;
[all …]
/kernel/linux/linux-5.10/arch/xtensa/boot/dts/
Dvirt.dts14 memory@0 {
16 reg = <0x00000000 0x80000000>;
21 #size-cells = <0>;
22 cpu@0 {
24 reg = <0>;
31 #clock-cells = <0>;
40 * two cells: second cell == 0: internal irq number
43 #address-cells = <0>;
53 #interrupt-cells = <0x1>;
55 bus-range = <0x0 0x3e>;
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dimx53-ard.dts17 reg = <0x70000000 0x40000000>;
24 reg = <0xf4000000 0x3ff0000>;
29 reg = <0xf4000000 0x2000000>;
32 interrupts = <31 0x8>;
49 #size-cells = <0>;
51 reg_3p3v: regulator@0 {
53 reg = <0>;
66 gpios = <&gpio5 10 0>;
73 gpios = <&gpio5 11 0>;
80 gpios = <&gpio5 12 0>;
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/nxp/imx/
Dimx53-ard.dts17 reg = <0x70000000 0x40000000>;
24 reg = <0xf4000000 0x3ff0000>;
29 reg = <0xf4000000 0x2000000>;
32 interrupts = <31 0x8>;
59 gpios = <&gpio5 10 0>;
66 gpios = <&gpio5 11 0>;
73 gpios = <&gpio5 12 0>;
80 gpios = <&gpio5 13 0>;
86 gpios = <&gpio4 0 0>;
94 pinctrl-0 = <&pinctrl_esdhc1>;
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/pci/
Dhisilicon,kirin-pcie.yaml77 reg = <0x0 0xf4000000 0x0 0x1000>,
78 <0x0 0xff3fe000 0x0 0x1000>,
79 <0x0 0xf3f20000 0x0 0x40000>,
80 <0x0 0xf5000000 0x0 0x2000>;
82 bus-range = <0x0 0xff>;
86 ranges = <0x02000000 0x0 0x00000000
87 0x0 0xf6000000
88 0x0 0x02000000>;
91 interrupts = <0 283 4>;
93 interrupt-map-mask = <0xf800 0 0 7>;
[all …]
Dhisilicon-histb-pcie.txt38 - phys: List of phandle and phy mode specifier, should be 0.
44 reg = <0xf9860000 0x1000>,
45 <0xf0000000 0x2000>,
46 <0xf2000000 0x01000000>;
51 bus-range = <0 15>;
53 ranges=<0x81000000 0 0 0xf4000000 0 0x00010000
54 0x82000000 0 0xf3000000 0xf3000000 0 0x01000000>;
58 interrupt-map-mask = <0 0 0 0>;
59 interrupt-map = <0 0 0 0 &gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
65 resets = <&crg 0x18c 6>, <&crg 0x18c 5>, <&crg 0x18c 4>;
/kernel/linux/linux-5.10/arch/arm/mach-s3c/
Dotom.h10 * ok, we've used up to 0x01300000, now we need to find space for the
18 #define OTOM_PA_CS8900A_BASE (S3C2410_CS3 + 0x01000000) /* nGCS3 +0x01000000 */
19 #define OTOM_VA_CS8900A_BASE S3C2410_ADDR(0x04000000) /* 0xF4000000 */
/kernel/linux/linux-6.6/arch/sh/include/cpu-sh4/cpu/
Daddrspace.h10 #define P0SEG 0x00000000
11 #define P1SEG 0x80000000
12 #define P2SEG 0xa0000000
13 #define P3SEG 0xc0000000
14 #define P4SEG 0xe0000000
18 #define P4SEG_IC_ADDR 0xf0000000
19 #define P4SEG_IC_DATA 0xf1000000
20 #define P4SEG_ITLB_ADDR 0xf2000000
21 #define P4SEG_ITLB_DATA 0xf3000000
22 #define P4SEG_OC_ADDR 0xf4000000
[all …]
Dcache.h17 #define SH_CCR 0xff00001c /* Address of Cache Control Register */
18 #define CCR_CACHE_OCE 0x0001 /* Operand Cache Enable */
19 #define CCR_CACHE_WT 0x0002 /* Write-Through (for P0,U0,P3) (else writeback)*/
20 #define CCR_CACHE_CB 0x0004 /* Copy-Back (for P1) (else writethrough) */
21 #define CCR_CACHE_OCI 0x0008 /* OC Invalidate */
22 #define CCR_CACHE_ORA 0x0020 /* OC RAM Mode */
23 #define CCR_CACHE_OIX 0x0080 /* OC Index Enable */
24 #define CCR_CACHE_ICE 0x0100 /* Instruction Cache Enable */
25 #define CCR_CACHE_ICI 0x0800 /* IC Invalidate */
26 #define CCR_CACHE_IIX 0x8000 /* IC Index Enable */
[all …]
/kernel/linux/linux-5.10/arch/sh/include/cpu-sh4/cpu/
Daddrspace.h10 #define P0SEG 0x00000000
11 #define P1SEG 0x80000000
12 #define P2SEG 0xa0000000
13 #define P3SEG 0xc0000000
14 #define P4SEG 0xe0000000
18 #define P4SEG_IC_ADDR 0xf0000000
19 #define P4SEG_IC_DATA 0xf1000000
20 #define P4SEG_ITLB_ADDR 0xf2000000
21 #define P4SEG_ITLB_DATA 0xf3000000
22 #define P4SEG_OC_ADDR 0xf4000000
[all …]
Dcache.h17 #define SH_CCR 0xff00001c /* Address of Cache Control Register */
18 #define CCR_CACHE_OCE 0x0001 /* Operand Cache Enable */
19 #define CCR_CACHE_WT 0x0002 /* Write-Through (for P0,U0,P3) (else writeback)*/
20 #define CCR_CACHE_CB 0x0004 /* Copy-Back (for P1) (else writethrough) */
21 #define CCR_CACHE_OCI 0x0008 /* OC Invalidate */
22 #define CCR_CACHE_ORA 0x0020 /* OC RAM Mode */
23 #define CCR_CACHE_OIX 0x0080 /* OC Index Enable */
24 #define CCR_CACHE_ICE 0x0100 /* Instruction Cache Enable */
25 #define CCR_CACHE_ICI 0x0800 /* IC Invalidate */
26 #define CCR_CACHE_IIX 0x8000 /* IC Index Enable */
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mtd/
Dorion-nand.txt9 - cle : Address line number connected to CLE. Default is 0
23 cle = <0>;
28 reg = <0xf4000000 0x400>;
30 partition@0 {
32 reg = <0x0000000 0x100000>;
38 reg = <0x0100000 0x200000>;
43 reg = <0x0300000 0x100000>;
48 reg = <0x0400000 0x7d00000>;
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mtd/
Dorion-nand.txt9 - cle : Address line number connected to CLE. Default is 0
23 cle = <0>;
28 reg = <0xf4000000 0x400>;
30 partition@0 {
32 reg = <0x0000000 0x100000>;
38 reg = <0x0100000 0x200000>;
43 reg = <0x0300000 0x100000>;
48 reg = <0x0400000 0x7d00000>;
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/soc/fsl/
Dbman-portals.txt44 ranges = <0 0xf 0xf4000000 0x200000>;
46 bman-portal@0 {
47 compatible = "fsl,bman-portal-1.0.0", "fsl,bman-portal";
48 reg = <0x0 0x4000>, <0x100000 0x1000>;
49 interrupts = <105 2 0 0>;
52 compatible = "fsl,bman-portal-1.0.0", "fsl,bman-portal";
53 reg = <0x4000 0x4000>, <0x101000 0x1000>;
54 interrupts = <107 2 0 0>;
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/soc/fsl/
Dbman-portals.txt44 ranges = <0 0xf 0xf4000000 0x200000>;
46 bman-portal@0 {
47 compatible = "fsl,bman-portal-1.0.0", "fsl,bman-portal";
48 reg = <0x0 0x4000>, <0x100000 0x1000>;
49 interrupts = <105 2 0 0>;
52 compatible = "fsl,bman-portal-1.0.0", "fsl,bman-portal";
53 reg = <0x4000 0x4000>, <0x101000 0x1000>;
54 interrupts = <107 2 0 0>;
/kernel/linux/linux-5.10/arch/arm/include/debug/
Dimx.S20 (((x) & 0x80000000) >> 7) | \
21 (0xf4000000 + \
22 (((x) & 0x50000000) >> 6) + \
23 (((x) & 0x0b000000) >> 4) + \
24 (((x) & 0x000fffff))))
35 str \rd, [\rx, #0x40] @ TXDATA
45 1002: ldr \rd, [\rx, #0x98] @ SR2
/kernel/linux/linux-6.6/arch/arm/include/debug/
Dimx.S20 (((x) & 0x80000000) >> 7) | \
21 (0xf4000000 + \
22 (((x) & 0x50000000) >> 6) + \
23 (((x) & 0x0b000000) >> 4) + \
24 (((x) & 0x000fffff))))
35 str \rd, [\rx, #0x40] @ TXDATA
45 1002: ldr \rd, [\rx, #0x98] @ SR2
/kernel/linux/linux-6.6/arch/arm/mach-pxa/
Dpxa-regs.h14 #define UNCACHED_PHYS_0 0xfe000000
15 #define UNCACHED_PHYS_0_SIZE 0x00100000
20 * 0x40000000 - 0x41ffffff <--> 0xf2000000 - 0xf3ffffff
21 * 0x44000000 - 0x45ffffff <--> 0xf4000000 - 0xf5ffffff
22 * 0x48000000 - 0x49ffffff <--> 0xf6000000 - 0xf7ffffff
23 * 0x4c000000 - 0x4dffffff <--> 0xf8000000 - 0xf9ffffff
24 * 0x50000000 - 0x51ffffff <--> 0xfa000000 - 0xfbffffff
25 * 0x54000000 - 0x55ffffff <--> 0xfc000000 - 0xfdffffff
26 * 0x58000000 - 0x59ffffff <--> 0xfe000000 - 0xffffffff
31 #define io_v2p(x) (0x3c000000 + ((x) & 0x01ffffff) + (((x) & 0x0e000000) << 1))
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/
Dsmsc911x.txt36 reg = <0xf4000000 0x2000000>;
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/net/
Dsmsc,lan9115.yaml103 reg = <0xf4000000 0x2000000>;
/kernel/linux/linux-5.10/arch/powerpc/boot/dts/
Dsbc8548.dts20 reg = <0xe0000000 0x5000>;
23 ranges = <0x0 0x0 0xff800000 0x00800000 /*8MB Flash*/
24 0x3 0x0 0xf0000000 0x04000000 /*64MB SDRAM*/
25 0x4 0x0 0xf4000000 0x04000000 /*64MB SDRAM*/
26 0x5 0x0 0xf8000000 0x00b10000 /* EPLD */
27 0x6 0x0 0xec000000 0x04000000>; /*64MB Flash*/
30 flash@0,0 {
34 reg = <0x0 0x0 0x800000>;
37 partition@0 {
40 reg = <0x00000000 0x007a0000>;
[all …]

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