Home
last modified time | relevance | path

Searched +full:0 +full:xffa00000 (Results 1 – 25 of 68) sorted by relevance

123

/kernel/linux/linux-6.6/arch/sh/include/cpu-sh4/cpu/
Ddma.h10 #define DMTE0_IRQ evt2irq(0x640)
11 #define DMTE4_IRQ evt2irq(0x780)
12 #define DMTE6_IRQ evt2irq(0x7c0)
13 #define DMAE0_IRQ evt2irq(0x6c0)
15 #define SH_DMAC_BASE0 0xffa00000
/kernel/linux/linux-5.10/arch/sh/include/cpu-sh4/cpu/
Ddma.h10 #define DMTE0_IRQ evt2irq(0x640)
11 #define DMTE4_IRQ evt2irq(0x780)
12 #define DMTE6_IRQ evt2irq(0x7c0)
13 #define DMAE0_IRQ evt2irq(0x6c0)
15 #define SH_DMAC_BASE0 0xffa00000
16 #define SH_DMAC_BASE1 0xffa00070
/kernel/linux/linux-5.10/arch/powerpc/boot/dts/fsl/
Dp1020rdb_36b.dts18 reg = <0xf 0xffe05000 0 0x1000>;
21 ranges = <0x0 0x0 0xf 0xef000000 0x01000000
22 0x1 0x0 0xf 0xffa00000 0x00040000
23 0x2 0x0 0xf 0xffb00000 0x00020000>;
27 ranges = <0x0 0xf 0xffe00000 0x100000>;
31 reg = <0xf 0xffe09000 0 0x1000>;
32 ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000
33 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
34 pcie@0 {
35 ranges = <0x2000000 0x0 0xc0000000
[all …]
Dp1020rdb.dts18 reg = <0 0xffe05000 0 0x1000>;
21 ranges = <0x0 0x0 0x0 0xef000000 0x01000000
22 0x1 0x0 0x0 0xffa00000 0x00040000
23 0x2 0x0 0x0 0xffb00000 0x00020000>;
27 ranges = <0x0 0x0 0xffe00000 0x100000>;
31 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
32 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
33 reg = <0 0xffe09000 0 0x1000>;
34 pcie@0 {
35 ranges = <0x2000000 0x0 0xa0000000
[all …]
Dmpc8572ds.dts19 reg = <0 0xffe05000 0 0x1000>;
21 ranges = <0x0 0x0 0x0 0xe8000000 0x08000000
22 0x1 0x0 0x0 0xe0000000 0x08000000
23 0x2 0x0 0x0 0xffa00000 0x00040000
24 0x3 0x0 0x0 0xffdf0000 0x00008000
25 0x4 0x0 0x0 0xffa40000 0x00040000
26 0x5 0x0 0x0 0xffa80000 0x00040000
27 0x6 0x0 0x0 0xffac0000 0x00040000>;
31 ranges = <0x0 0 0xffe00000 0x100000>;
35 reg = <0 0xffe08000 0 0x1000>;
[all …]
Dmpc8572ds_36b.dts19 reg = <0xf 0xffe05000 0 0x1000>;
21 ranges = <0x0 0x0 0xf 0xe8000000 0x08000000
22 0x1 0x0 0xf 0xe0000000 0x08000000
23 0x2 0x0 0xf 0xffa00000 0x00040000
24 0x3 0x0 0xf 0xffdf0000 0x00008000
25 0x4 0x0 0xf 0xffa40000 0x00040000
26 0x5 0x0 0xf 0xffa80000 0x00040000
27 0x6 0x0 0xf 0xffac0000 0x00040000>;
31 ranges = <0x0 0xf 0xffe00000 0x100000>;
35 reg = <0xf 0xffe08000 0 0x1000>;
[all …]
Dp2020ds.dts19 ranges = <0x0 0x0 0x0 0xe8000000 0x08000000
20 0x1 0x0 0x0 0xe0000000 0x08000000
21 0x2 0x0 0x0 0xffa00000 0x00040000
22 0x3 0x0 0x0 0xffdf0000 0x00008000
23 0x4 0x0 0x0 0xffa40000 0x00040000
24 0x5 0x0 0x0 0xffa80000 0x00040000
25 0x6 0x0 0x0 0xffac0000 0x00040000>;
26 reg = <0 0xffe05000 0 0x1000>;
30 ranges = <0x0 0x0 0xffe00000 0x100000>;
34 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
[all …]
Dmpc8536ds_36b.dts17 #size-cells = <0>;
19 PowerPC,8536@0 {
21 reg = <0>;
28 reg = <0 0 0 0>; // Filled by U-Boot
32 reg = <0xf 0xffe05000 0 0x1000>;
34 ranges = <0x0 0x0 0xf 0xe8000000 0x08000000
35 0x2 0x0 0xf 0xffa00000 0x00040000
36 0x3 0x0 0xf 0xffdf0000 0x00008000>;
40 ranges = <0x0 0xf 0xffe00000 0x100000>;
44 reg = <0xf 0xffe08000 0 0x1000>;
[all …]
Dmpc8536ds.dts17 #size-cells = <0>;
19 PowerPC,8536@0 {
21 reg = <0>;
28 reg = <0 0 0 0>; // Filled by U-Boot
32 reg = <0 0xffe05000 0 0x1000>;
34 ranges = <0x0 0x0 0x0 0xe8000000 0x08000000
35 0x2 0x0 0x0 0xffa00000 0x00040000
36 0x3 0x0 0x0 0xffdf0000 0x00008000>;
40 ranges = <0x0 0 0xffe00000 0x100000>;
44 reg = <0 0xffe08000 0 0x1000>;
[all …]
Dp2020rdb-pc_36b.dts46 reg = <0xf 0xffe05000 0 0x1000>;
49 ranges = <0x0 0x0 0xf 0xef000000 0x01000000
50 0x1 0x0 0xf 0xff800000 0x00040000
51 0x2 0x0 0xf 0xffb00000 0x00020000
52 0x3 0x0 0xf 0xffa00000 0x00020000>;
56 ranges = <0x0 0xf 0xffe00000 0x100000>;
60 reg = <0xf 0xffe08000 0 0x1000>;
65 reg = <0xf 0xffe09000 0 0x1000>;
66 ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
67 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
[all …]
Dp2020rdb-pc_32b.dts46 reg = <0 0xffe05000 0 0x1000>;
49 ranges = <0x0 0x0 0x0 0xef000000 0x01000000
50 0x1 0x0 0x0 0xff800000 0x00040000
51 0x2 0x0 0x0 0xffb00000 0x00020000
52 0x3 0x0 0x0 0xffa00000 0x00020000>;
56 ranges = <0x0 0x0 0xffe00000 0x100000>;
60 reg = <0 0xffe08000 0 0x1000>;
65 reg = <0 0xffe09000 0 0x1000>;
66 ranges = <0x2000000 0x0 0xe0000000 0 0xa0000000 0x0 0x20000000
67 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
[all …]
Dp1020rdb-pc_36b.dts45 reg = <0xf 0xffe05000 0 0x1000>;
48 ranges = <0x0 0x0 0xf 0xef000000 0x01000000
49 0x1 0x0 0xf 0xff800000 0x00040000
50 0x2 0x0 0xf 0xffb00000 0x00040000
51 0x3 0x0 0xf 0xffa00000 0x00020000>;
55 ranges = <0x0 0xf 0xffe00000 0x100000>;
59 reg = <0xf 0xffe09000 0 0x1000>;
60 ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000
61 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
62 pcie@0 {
[all …]
Dp1020rdb-pc_32b.dts45 reg = <0 0xffe05000 0 0x1000>;
48 ranges = <0x0 0x0 0x0 0xef000000 0x01000000
49 0x1 0x0 0x0 0xff800000 0x00040000
50 0x2 0x0 0x0 0xffb00000 0x00020000
51 0x3 0x0 0x0 0xffa00000 0x00020000>;
55 ranges = <0x0 0x0 0xffe00000 0x100000>;
59 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
60 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
61 reg = <0 0xffe09000 0 0x1000>;
62 pcie@0 {
[all …]
/kernel/linux/linux-6.6/arch/powerpc/boot/dts/fsl/
Dp1020rdb.dts18 reg = <0 0xffe05000 0 0x1000>;
21 ranges = <0x0 0x0 0x0 0xef000000 0x01000000
22 0x1 0x0 0x0 0xffa00000 0x00040000
23 0x2 0x0 0x0 0xffb00000 0x00020000>;
27 ranges = <0x0 0x0 0xffe00000 0x100000>;
31 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
32 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
33 reg = <0 0xffe09000 0 0x1000>;
34 pcie@0 {
35 ranges = <0x2000000 0x0 0xa0000000
[all …]
Dp1020rdb_36b.dts18 reg = <0xf 0xffe05000 0 0x1000>;
21 ranges = <0x0 0x0 0xf 0xef000000 0x01000000
22 0x1 0x0 0xf 0xffa00000 0x00040000
23 0x2 0x0 0xf 0xffb00000 0x00020000>;
27 ranges = <0x0 0xf 0xffe00000 0x100000>;
31 reg = <0xf 0xffe09000 0 0x1000>;
32 ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000
33 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
34 pcie@0 {
35 ranges = <0x2000000 0x0 0xc0000000
[all …]
Dp2020ds.dts19 ranges = <0x0 0x0 0x0 0xe8000000 0x08000000
20 0x1 0x0 0x0 0xe0000000 0x08000000
21 0x2 0x0 0x0 0xffa00000 0x00040000
22 0x3 0x0 0x0 0xffdf0000 0x00008000
23 0x4 0x0 0x0 0xffa40000 0x00040000
24 0x5 0x0 0x0 0xffa80000 0x00040000
25 0x6 0x0 0x0 0xffac0000 0x00040000>;
26 reg = <0 0xffe05000 0 0x1000>;
30 ranges = <0x0 0x0 0xffe00000 0x100000>;
34 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
[all …]
Dmpc8572ds_36b.dts19 reg = <0xf 0xffe05000 0 0x1000>;
21 ranges = <0x0 0x0 0xf 0xe8000000 0x08000000
22 0x1 0x0 0xf 0xe0000000 0x08000000
23 0x2 0x0 0xf 0xffa00000 0x00040000
24 0x3 0x0 0xf 0xffdf0000 0x00008000
25 0x4 0x0 0xf 0xffa40000 0x00040000
26 0x5 0x0 0xf 0xffa80000 0x00040000
27 0x6 0x0 0xf 0xffac0000 0x00040000>;
31 ranges = <0x0 0xf 0xffe00000 0x100000>;
35 reg = <0xf 0xffe08000 0 0x1000>;
[all …]
Dmpc8572ds.dts19 reg = <0 0xffe05000 0 0x1000>;
21 ranges = <0x0 0x0 0x0 0xe8000000 0x08000000
22 0x1 0x0 0x0 0xe0000000 0x08000000
23 0x2 0x0 0x0 0xffa00000 0x00040000
24 0x3 0x0 0x0 0xffdf0000 0x00008000
25 0x4 0x0 0x0 0xffa40000 0x00040000
26 0x5 0x0 0x0 0xffa80000 0x00040000
27 0x6 0x0 0x0 0xffac0000 0x00040000>;
31 ranges = <0x0 0 0xffe00000 0x100000>;
35 reg = <0 0xffe08000 0 0x1000>;
[all …]
Dmpc8536ds.dts17 #size-cells = <0>;
19 PowerPC,8536@0 {
21 reg = <0>;
28 reg = <0 0 0 0>; // Filled by U-Boot
32 reg = <0 0xffe05000 0 0x1000>;
34 ranges = <0x0 0x0 0x0 0xe8000000 0x08000000
35 0x2 0x0 0x0 0xffa00000 0x00040000
36 0x3 0x0 0x0 0xffdf0000 0x00008000>;
40 ranges = <0x0 0 0xffe00000 0x100000>;
44 reg = <0 0xffe08000 0 0x1000>;
[all …]
Dmpc8536ds_36b.dts17 #size-cells = <0>;
19 PowerPC,8536@0 {
21 reg = <0>;
28 reg = <0 0 0 0>; // Filled by U-Boot
32 reg = <0xf 0xffe05000 0 0x1000>;
34 ranges = <0x0 0x0 0xf 0xe8000000 0x08000000
35 0x2 0x0 0xf 0xffa00000 0x00040000
36 0x3 0x0 0xf 0xffdf0000 0x00008000>;
40 ranges = <0x0 0xf 0xffe00000 0x100000>;
44 reg = <0xf 0xffe08000 0 0x1000>;
[all …]
Dp2020rdb-pc_32b.dts46 reg = <0 0xffe05000 0 0x1000>;
49 ranges = <0x0 0x0 0x0 0xef000000 0x01000000
50 0x1 0x0 0x0 0xff800000 0x00040000
51 0x2 0x0 0x0 0xffb00000 0x00020000
52 0x3 0x0 0x0 0xffa00000 0x00020000>;
56 ranges = <0x0 0x0 0xffe00000 0x100000>;
60 reg = <0 0xffe08000 0 0x1000>;
65 reg = <0 0xffe09000 0 0x1000>;
66 ranges = <0x2000000 0x0 0xe0000000 0 0xa0000000 0x0 0x20000000
67 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
[all …]
Dp2020rdb-pc_36b.dts46 reg = <0xf 0xffe05000 0 0x1000>;
49 ranges = <0x0 0x0 0xf 0xef000000 0x01000000
50 0x1 0x0 0xf 0xff800000 0x00040000
51 0x2 0x0 0xf 0xffb00000 0x00020000
52 0x3 0x0 0xf 0xffa00000 0x00020000>;
56 ranges = <0x0 0xf 0xffe00000 0x100000>;
60 reg = <0xf 0xffe08000 0 0x1000>;
65 reg = <0xf 0xffe09000 0 0x1000>;
66 ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
67 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
[all …]
Dp1020rdb-pc_36b.dts45 reg = <0xf 0xffe05000 0 0x1000>;
48 ranges = <0x0 0x0 0xf 0xef000000 0x01000000
49 0x1 0x0 0xf 0xff800000 0x00040000
50 0x2 0x0 0xf 0xffb00000 0x00040000
51 0x3 0x0 0xf 0xffa00000 0x00020000>;
55 ranges = <0x0 0xf 0xffe00000 0x100000>;
59 reg = <0xf 0xffe09000 0 0x1000>;
60 ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000
61 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
62 pcie@0 {
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/memory-controllers/fsl/
Difc.txt37 reg = <0x0 0xffe1e000 0 0x2000>;
42 ranges = <0x0 0x0 0x0 0xee000000 0x02000000
43 0x1 0x0 0x0 0xffa00000 0x00010000
44 0x3 0x0 0x0 0xffb00000 0x00020000>;
46 flash@0,0 {
50 reg = <0x0 0x0 0x2000000>;
54 partition@0 {
56 reg = <0x0 0x02000000>;
61 flash@1,0 {
65 reg = <0x1 0x0 0x10000>;
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mtd/
Dcadence-quadspi.txt47 #size-cells = <0>;
48 reg = <0xff705000 0x1000>,
49 <0xffa00000 0x1000>;
50 interrupts = <0 151 4>;
55 cdns,trigger-address = <0x00000000>;
59 flash0: n25q00@0 {

123