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12

/kernel/linux/linux-5.10/Documentation/devicetree/bindings/timer/
Drenesas,tmu.txt41 reg = <0xffd80000 0x30>;
42 interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>,
43 <0 33 IRQ_TYPE_LEVEL_HIGH>,
44 <0 34 IRQ_TYPE_LEVEL_HIGH>;
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/timer/
Drenesas,tmu.yaml100 reg = <0xffd80000 0x30>;
/kernel/linux/linux-5.10/arch/sh/kernel/cpu/sh4/
Dsetup-sh4-202.c23 DEFINE_RES_MEM(0xffe80000, 0x100),
24 DEFINE_RES_IRQ(evt2irq(0x700)),
25 DEFINE_RES_IRQ(evt2irq(0x720)),
26 DEFINE_RES_IRQ(evt2irq(0x760)),
27 DEFINE_RES_IRQ(evt2irq(0x740)),
32 .id = 0,
45 DEFINE_RES_MEM(0xffd80000, 0x30),
46 DEFINE_RES_IRQ(evt2irq(0x400)),
47 DEFINE_RES_IRQ(evt2irq(0x420)),
48 DEFINE_RES_IRQ(evt2irq(0x440)),
[all …]
Dsetup-sh7760.c17 UNUSED = 0,
44 INTC_VECT(HUDI, 0x600), INTC_VECT(GPIOI, 0x620),
45 INTC_VECT(DMAC, 0x640), INTC_VECT(DMAC, 0x660),
46 INTC_VECT(DMAC, 0x680), INTC_VECT(DMAC, 0x6a0),
47 INTC_VECT(DMAC, 0x780), INTC_VECT(DMAC, 0x7a0),
48 INTC_VECT(DMAC, 0x7c0), INTC_VECT(DMAC, 0x7e0),
49 INTC_VECT(DMAC, 0x6c0),
50 INTC_VECT(IRQ4, 0x800), INTC_VECT(IRQ5, 0x820),
51 INTC_VECT(IRQ6, 0x840), INTC_VECT(IRQ6, 0x860),
52 INTC_VECT(HCAN20, 0x900), INTC_VECT(HCAN21, 0x920),
[all …]
Dsetup-sh7750.c19 [0] = {
20 .start = 0xffc80000,
21 .end = 0xffc80000 + 0x58 - 1,
26 .start = evt2irq(0x480),
43 DEFINE_RES_MEM(0xffe00000, 0x20),
44 DEFINE_RES_IRQ(evt2irq(0x4e0)),
49 .id = 0,
63 DEFINE_RES_MEM(0xffe80000, 0x100),
64 DEFINE_RES_IRQ(evt2irq(0x700)),
82 DEFINE_RES_MEM(0xffd80000, 0x30),
[all …]
/kernel/linux/linux-6.6/arch/sh/kernel/cpu/sh4/
Dsetup-sh4-202.c23 DEFINE_RES_MEM(0xffe80000, 0x100),
24 DEFINE_RES_IRQ(evt2irq(0x700)),
25 DEFINE_RES_IRQ(evt2irq(0x720)),
26 DEFINE_RES_IRQ(evt2irq(0x760)),
27 DEFINE_RES_IRQ(evt2irq(0x740)),
32 .id = 0,
45 DEFINE_RES_MEM(0xffd80000, 0x30),
46 DEFINE_RES_IRQ(evt2irq(0x400)),
47 DEFINE_RES_IRQ(evt2irq(0x420)),
48 DEFINE_RES_IRQ(evt2irq(0x440)),
[all …]
Dsetup-sh7760.c17 UNUSED = 0,
44 INTC_VECT(HUDI, 0x600), INTC_VECT(GPIOI, 0x620),
45 INTC_VECT(DMAC, 0x640), INTC_VECT(DMAC, 0x660),
46 INTC_VECT(DMAC, 0x680), INTC_VECT(DMAC, 0x6a0),
47 INTC_VECT(DMAC, 0x780), INTC_VECT(DMAC, 0x7a0),
48 INTC_VECT(DMAC, 0x7c0), INTC_VECT(DMAC, 0x7e0),
49 INTC_VECT(DMAC, 0x6c0),
50 INTC_VECT(IRQ4, 0x800), INTC_VECT(IRQ5, 0x820),
51 INTC_VECT(IRQ6, 0x840), INTC_VECT(IRQ6, 0x860),
52 INTC_VECT(HCAN20, 0x900), INTC_VECT(HCAN21, 0x920),
[all …]
Dsetup-sh7750.c19 [0] = {
20 .start = 0xffc80000,
21 .end = 0xffc80000 + 0x58 - 1,
26 .start = evt2irq(0x480),
43 DEFINE_RES_MEM(0xffe00000, 0x20),
44 DEFINE_RES_IRQ(evt2irq(0x4e0)),
49 .id = 0,
63 DEFINE_RES_MEM(0xffe80000, 0x100),
64 DEFINE_RES_IRQ(evt2irq(0x700)),
82 DEFINE_RES_MEM(0xffd80000, 0x30),
[all …]
/kernel/linux/linux-5.10/arch/sh/kernel/cpu/sh4a/
Dsetup-sh7366.c26 DEFINE_RES_MEM(0xffe00000, 0x100),
27 DEFINE_RES_IRQ(evt2irq(0xc00)),
32 .id = 0,
41 [0] = {
43 .start = 0x04470000,
44 .end = 0x04470017,
48 .start = evt2irq(0xe00),
49 .end = evt2irq(0xe60),
56 .id = 0, /* "i2c0" clock */
66 [0] = {
[all …]
Dsetup-sh7343.c24 DEFINE_RES_MEM(0xffe00000, 0x100),
25 DEFINE_RES_IRQ(evt2irq(0xc00)),
30 .id = 0,
44 DEFINE_RES_MEM(0xffe10000, 0x100),
45 DEFINE_RES_IRQ(evt2irq(0xc20)),
64 DEFINE_RES_MEM(0xffe20000, 0x100),
65 DEFINE_RES_IRQ(evt2irq(0xc40)),
84 DEFINE_RES_MEM(0xffe30000, 0x100),
85 DEFINE_RES_IRQ(evt2irq(0xc60)),
99 [0] = {
[all …]
Dsetup-sh7763.c26 DEFINE_RES_MEM(0xffe00000, 0x100),
27 DEFINE_RES_IRQ(evt2irq(0x700)),
32 .id = 0,
47 DEFINE_RES_MEM(0xffe08000, 0x100),
48 DEFINE_RES_IRQ(evt2irq(0xb80)),
68 DEFINE_RES_MEM(0xffe10000, 0x100),
69 DEFINE_RES_IRQ(evt2irq(0xf00)),
83 [0] = {
84 .start = 0xffe80000,
85 .end = 0xffe80000 + 0x58 - 1,
[all …]
Dsetup-sh7780.c25 DEFINE_RES_MEM(0xffe00000, 0x100),
26 DEFINE_RES_IRQ(evt2irq(0x700)),
31 .id = 0,
46 DEFINE_RES_MEM(0xffe10000, 0x100),
47 DEFINE_RES_IRQ(evt2irq(0xb80)),
65 DEFINE_RES_MEM(0xffd80000, 0x30),
66 DEFINE_RES_IRQ(evt2irq(0x580)),
67 DEFINE_RES_IRQ(evt2irq(0x5a0)),
68 DEFINE_RES_IRQ(evt2irq(0x5c0)),
73 .id = 0,
[all …]
Dsetup-sh7770.c22 DEFINE_RES_MEM(0xff923000, 0x100),
23 DEFINE_RES_IRQ(evt2irq(0x9a0)),
28 .id = 0,
42 DEFINE_RES_MEM(0xff924000, 0x100),
43 DEFINE_RES_IRQ(evt2irq(0x9c0)),
62 DEFINE_RES_MEM(0xff925000, 0x100),
63 DEFINE_RES_IRQ(evt2irq(0x9e0)),
82 DEFINE_RES_MEM(0xff926000, 0x100),
83 DEFINE_RES_IRQ(evt2irq(0xa00)),
102 DEFINE_RES_MEM(0xff927000, 0x100),
[all …]
Dsetup-sh7734.c32 DEFINE_RES_MEM(0xffe40000, 0x100),
33 DEFINE_RES_IRQ(evt2irq(0x8c0)),
38 .id = 0,
53 DEFINE_RES_MEM(0xffe41000, 0x100),
54 DEFINE_RES_IRQ(evt2irq(0x8e0)),
74 DEFINE_RES_MEM(0xffe42000, 0x100),
75 DEFINE_RES_IRQ(evt2irq(0x900)),
95 DEFINE_RES_MEM(0xffe43000, 0x100),
96 DEFINE_RES_IRQ(evt2irq(0x920)),
116 DEFINE_RES_MEM(0xffe44000, 0x100),
[all …]
/kernel/linux/linux-6.6/arch/sh/kernel/cpu/sh4a/
Dsetup-sh7366.c26 DEFINE_RES_MEM(0xffe00000, 0x100),
27 DEFINE_RES_IRQ(evt2irq(0xc00)),
32 .id = 0,
41 [0] = {
43 .start = 0x04470000,
44 .end = 0x04470017,
48 .start = evt2irq(0xe00),
49 .end = evt2irq(0xe60),
56 .id = 0, /* "i2c0" clock */
66 [0] = {
[all …]
Dsetup-sh7343.c24 DEFINE_RES_MEM(0xffe00000, 0x100),
25 DEFINE_RES_IRQ(evt2irq(0xc00)),
30 .id = 0,
44 DEFINE_RES_MEM(0xffe10000, 0x100),
45 DEFINE_RES_IRQ(evt2irq(0xc20)),
64 DEFINE_RES_MEM(0xffe20000, 0x100),
65 DEFINE_RES_IRQ(evt2irq(0xc40)),
84 DEFINE_RES_MEM(0xffe30000, 0x100),
85 DEFINE_RES_IRQ(evt2irq(0xc60)),
99 [0] = {
[all …]
Dsetup-sh7763.c26 DEFINE_RES_MEM(0xffe00000, 0x100),
27 DEFINE_RES_IRQ(evt2irq(0x700)),
32 .id = 0,
47 DEFINE_RES_MEM(0xffe08000, 0x100),
48 DEFINE_RES_IRQ(evt2irq(0xb80)),
68 DEFINE_RES_MEM(0xffe10000, 0x100),
69 DEFINE_RES_IRQ(evt2irq(0xf00)),
83 [0] = {
84 .start = 0xffe80000,
85 .end = 0xffe80000 + 0x58 - 1,
[all …]
Dsetup-sh7780.c25 DEFINE_RES_MEM(0xffe00000, 0x100),
26 DEFINE_RES_IRQ(evt2irq(0x700)),
31 .id = 0,
46 DEFINE_RES_MEM(0xffe10000, 0x100),
47 DEFINE_RES_IRQ(evt2irq(0xb80)),
65 DEFINE_RES_MEM(0xffd80000, 0x30),
66 DEFINE_RES_IRQ(evt2irq(0x580)),
67 DEFINE_RES_IRQ(evt2irq(0x5a0)),
68 DEFINE_RES_IRQ(evt2irq(0x5c0)),
73 .id = 0,
[all …]
Dsetup-sh7770.c22 DEFINE_RES_MEM(0xff923000, 0x100),
23 DEFINE_RES_IRQ(evt2irq(0x9a0)),
28 .id = 0,
42 DEFINE_RES_MEM(0xff924000, 0x100),
43 DEFINE_RES_IRQ(evt2irq(0x9c0)),
62 DEFINE_RES_MEM(0xff925000, 0x100),
63 DEFINE_RES_IRQ(evt2irq(0x9e0)),
82 DEFINE_RES_MEM(0xff926000, 0x100),
83 DEFINE_RES_IRQ(evt2irq(0xa00)),
102 DEFINE_RES_MEM(0xff927000, 0x100),
[all …]
Dsetup-sh7734.c32 DEFINE_RES_MEM(0xffe40000, 0x100),
33 DEFINE_RES_IRQ(evt2irq(0x8c0)),
38 .id = 0,
53 DEFINE_RES_MEM(0xffe41000, 0x100),
54 DEFINE_RES_IRQ(evt2irq(0x8e0)),
74 DEFINE_RES_MEM(0xffe42000, 0x100),
75 DEFINE_RES_IRQ(evt2irq(0x900)),
95 DEFINE_RES_MEM(0xffe43000, 0x100),
96 DEFINE_RES_IRQ(evt2irq(0x920)),
116 DEFINE_RES_MEM(0xffe44000, 0x100),
[all …]
Dsetup-sh7723.c30 DEFINE_RES_MEM(0xffe00000, 0x100),
31 DEFINE_RES_IRQ(evt2irq(0xc00)),
36 .id = 0,
51 DEFINE_RES_MEM(0xffe10000, 0x100),
52 DEFINE_RES_IRQ(evt2irq(0xc20)),
72 DEFINE_RES_MEM(0xffe20000, 0x100),
73 DEFINE_RES_IRQ(evt2irq(0xc40)),
92 DEFINE_RES_MEM(0xa4e30000, 0x100),
93 DEFINE_RES_IRQ(evt2irq(0x900)),
112 DEFINE_RES_MEM(0xa4e40000, 0x100),
[all …]
/kernel/linux/linux-6.6/drivers/mtd/maps/
Dichxrom.c30 #define BIOS_CNTL 0x4e
31 #define FWH_DEC_EN1 0xE3
32 #define FWH_DEC_EN2 0xF0
33 #define FWH_SEL1 0xE8
34 #define FWH_SEL2 0xEE
83 window->phys = 0; in ichxrom_cleanup()
84 window->size = 0; in ichxrom_cleanup()
113 window->phys = 0; in ichxrom_init_one()
115 if (byte == 0xff) { in ichxrom_init_one()
116 window->phys = 0xffc00000; in ichxrom_init_one()
[all …]
Desb2rom.c34 #define BIOS_CNTL 0xDC
35 #define BIOS_LOCK_ENABLE 0x02
36 #define BIOS_WRITE_ENABLE 0x01
39 #define FWH_DEC_EN1 0xD8
40 #define FWH_F8_EN 0x8000
41 #define FWH_F0_EN 0x4000
42 #define FWH_E8_EN 0x2000
43 #define FWH_E0_EN 0x1000
44 #define FWH_D8_EN 0x0800
45 #define FWH_D0_EN 0x0400
[all …]
/kernel/linux/linux-5.10/drivers/mtd/maps/
Dichxrom.c30 #define BIOS_CNTL 0x4e
31 #define FWH_DEC_EN1 0xE3
32 #define FWH_DEC_EN2 0xF0
33 #define FWH_SEL1 0xE8
34 #define FWH_SEL2 0xEE
83 window->phys = 0; in ichxrom_cleanup()
84 window->size = 0; in ichxrom_cleanup()
113 window->phys = 0; in ichxrom_init_one()
115 if (byte == 0xff) { in ichxrom_init_one()
116 window->phys = 0xffc00000; in ichxrom_init_one()
[all …]
Desb2rom.c34 #define BIOS_CNTL 0xDC
35 #define BIOS_LOCK_ENABLE 0x02
36 #define BIOS_WRITE_ENABLE 0x01
39 #define FWH_DEC_EN1 0xD8
40 #define FWH_F8_EN 0x8000
41 #define FWH_F0_EN 0x4000
42 #define FWH_E8_EN 0x2000
43 #define FWH_E0_EN 0x1000
44 #define FWH_D8_EN 0x0800
45 #define FWH_D0_EN 0x0400
[all …]

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