| /kernel/linux/linux-5.10/arch/parisc/kernel/ |
| D | pa7300lc.c | 18 #define MIOC_STATUS 0xf040 19 #define MIOC_CONTROL 0xf080 20 #define MDERRADD 0xf0e0 21 #define DMAERR 0xf0e8 22 #define DIOERR 0xf0ec 23 #define HIDMAMEM 0xf0f4 28 return 0xfffb0000; in cpu_hpa()
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| D | setup.c | 54 /* boot_args[0] is free-mem start, boot_args[1] is ptr to command line */ in setup_cmdline() 55 if (boot_args[0] < 64) { in setup_cmdline() 57 boot_command_line[0] = '\0'; in setup_cmdline() 63 if (boot_args[2] != 0) /* did palo pass us a ramdisk? */ in setup_cmdline() 167 * 0, signaling EOF perhaps. This could be used to sequence in c_start() 237 .start = F_EXTEND(0xfff80000), 238 .end = F_EXTEND(0xfffaffff), 244 .start = F_EXTEND(0xfffb0000), 245 .end = F_EXTEND(0xfffdffff), 251 .start = F_EXTEND(0xfffe0000), [all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/sti/ |
| D | sti_hqvdp_lut.h | 24 0x0000ffff, 0x00010000, 0x000100ff, 0x00000000, 25 0x00000000, 0x00050000, 0xfffc00ff, 0x00000000, 26 0x00000000, 0x00090000, 0xfff900fe, 0x00000000, 27 0x00000000, 0x0010ffff, 0xfff600fb, 0x00000000, 28 0x00000000, 0x0017fffe, 0xfff400f7, 0x00000000, 29 0x00000000, 0x001ffffd, 0xfff200f2, 0x00000000, 30 0x00000000, 0x0027fffc, 0xfff100ec, 0x00000000, 31 0x00000000, 0x0030fffb, 0xfff000e5, 0x00000000, 32 0x00000000, 0x003afffa, 0xffee00de, 0x00000000, 33 0x00000000, 0x0044fff9, 0xffed00d6, 0x00000000, [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/sti/ |
| D | sti_hqvdp_lut.h | 24 0x0000ffff, 0x00010000, 0x000100ff, 0x00000000, 25 0x00000000, 0x00050000, 0xfffc00ff, 0x00000000, 26 0x00000000, 0x00090000, 0xfff900fe, 0x00000000, 27 0x00000000, 0x0010ffff, 0xfff600fb, 0x00000000, 28 0x00000000, 0x0017fffe, 0xfff400f7, 0x00000000, 29 0x00000000, 0x001ffffd, 0xfff200f2, 0x00000000, 30 0x00000000, 0x0027fffc, 0xfff100ec, 0x00000000, 31 0x00000000, 0x0030fffb, 0xfff000e5, 0x00000000, 32 0x00000000, 0x003afffa, 0xffee00de, 0x00000000, 33 0x00000000, 0x0044fff9, 0xffed00d6, 0x00000000, [all …]
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| /kernel/linux/linux-5.10/arch/arm/mach-omap1/ |
| D | iomap.h | 31 #define OMAP1_IO_PHYS 0xFFFB0000 32 #define OMAP1_IO_SIZE 0x40000
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| /kernel/linux/linux-6.6/arch/arm/mach-omap1/ |
| D | iomap.h | 31 #define OMAP1_IO_PHYS 0xFFFB0000 32 #define OMAP1_IO_SIZE 0x40000
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/iio/adc/ |
| D | at91_adc.txt | 48 #size-cells = <0>; 50 reg = <0xfffb0000 0x100>; 51 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>; 54 atmel,adc-channels-used = <0xff>; 64 trigger-value = <0x1>; 69 trigger-value = <0x2>; 75 trigger-value = <0x3>; 81 trigger-value = <0x6>;
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/iio/adc/ |
| D | atmel,sama9260-adc.yaml | 110 reg = <0xfffb0000 0x100>; 111 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>; 114 atmel,adc-channels-used = <0xff>;
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| /kernel/linux/linux-6.6/drivers/net/ethernet/ti/icssg/ |
| D | icssg_config.h | 21 #define PRUETH_PKT_TYPE_CMD 0x10 27 #define PRUETH_RX_FLOW_DATA 0 45 #define ICSSG_FW_MGMT_CMD_HEADER 0x81 46 #define ICSSG_FW_MGMT_FDB_CMD_TYPE 0x03 47 #define ICSSG_FW_MGMT_CMD_TYPE 0x04 48 #define ICSSG_FW_MGMT_PKT 0x80000000 55 ICSSG_EMAC_PORT_DISABLE = 0, 77 #define EMAC_NONE 0xffff0000 78 #define EMAC_PRU0_P_DI 0xffff0004 79 #define EMAC_PRU1_P_DI 0xffff0040 [all …]
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| /kernel/linux/patches/linux-4.19/prebuilts/usr/include/linux/ |
| D | serial_reg.h | 8 #define UART_RX 0 9 #define UART_TX 0 11 #define UART_IER_MSI 0x08 12 #define UART_IER_RLSI 0x04 13 #define UART_IER_THRI 0x02 14 #define UART_IER_RDI 0x01 15 #define UART_IERX_SLEEP 0x10 17 #define UART_IIR_NO_INT 0x01 18 #define UART_IIR_ID 0x0e 19 #define UART_IIR_MSI 0x00 [all …]
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| /kernel/linux/patches/linux-6.6/prebuilts/usr/include/linux/ |
| D | serial_reg.h | 21 #define UART_RX 0 22 #define UART_TX 0 24 #define UART_IER_MSI 0x08 25 #define UART_IER_RLSI 0x04 26 #define UART_IER_THRI 0x02 27 #define UART_IER_RDI 0x01 28 #define UART_IERX_SLEEP 0x10 30 #define UART_IIR_NO_INT 0x01 31 #define UART_IIR_ID 0x0e 32 #define UART_IIR_MSI 0x00 [all …]
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| /kernel/linux/patches/linux-5.10/prebuilts/usr/include/linux/ |
| D | serial_reg.h | 21 #define UART_RX 0 22 #define UART_TX 0 24 #define UART_IER_MSI 0x08 25 #define UART_IER_RLSI 0x04 26 #define UART_IER_THRI 0x02 27 #define UART_IER_RDI 0x01 28 #define UART_IERX_SLEEP 0x10 30 #define UART_IIR_NO_INT 0x01 31 #define UART_IIR_ID 0x0e 32 #define UART_IIR_MSI 0x00 [all …]
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| /kernel/linux/linux-6.6/arch/parisc/kernel/ |
| D | setup.c | 49 /* boot_args[0] is free-mem start, boot_args[1] is ptr to command line */ in setup_cmdline() 50 if (boot_args[0] < 64) in setup_cmdline() 73 if (boot_args[2] != 0) { in setup_cmdline() 160 * 0, signaling EOF perhaps. This could be used to sequence in c_start() 188 .start = F_EXTEND(0xfff80000), 189 .end = F_EXTEND(0xfffaffff), 195 .start = F_EXTEND(0xfffb0000), 196 .end = F_EXTEND(0xfffdffff), 202 .start = F_EXTEND(0xfffe0000), 203 .end = F_EXTEND(0xffffffff), [all …]
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| /kernel/linux/linux-6.6/arch/m68k/include/asm/ |
| D | io_mm.h | 45 #define q40_isa_io_base 0xff400000 46 #define q40_isa_mem_base 0xff800000 53 #define MULTI_ISA 0 63 #define MULTI_ISA 0 72 #define enec_isa_read_base 0xfffa0000 73 #define enec_isa_write_base 0xfffb0000 75 #define ENEC_ISA_IO_B(ioaddr) (enec_isa_read_base+((((unsigned long)(ioaddr))&0x7F)<<9)) 76 #define ENEC_ISA_IO_W(ioaddr) (enec_isa_read_base+((((unsigned long)(ioaddr))&0x7F)<<9)) 77 #define ENEC_ISA_MEM_B(madr) (enec_isa_read_base+((((unsigned long)(madr))&0x7F)<<9)) 78 #define ENEC_ISA_MEM_W(madr) (enec_isa_read_base+((((unsigned long)(madr))&0x7F)<<9)) [all …]
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| /kernel/linux/linux-5.10/arch/m68k/include/asm/ |
| D | io_mm.h | 47 #define q40_isa_io_base 0xff400000 48 #define q40_isa_mem_base 0xff800000 55 #define MULTI_ISA 0 65 #define MULTI_ISA 0 74 #define enec_isa_read_base 0xfffa0000 75 #define enec_isa_write_base 0xfffb0000 77 #define ENEC_ISA_IO_B(ioaddr) (enec_isa_read_base+((((unsigned long)(ioaddr))&0x7F)<<9)) 78 #define ENEC_ISA_IO_W(ioaddr) (enec_isa_read_base+((((unsigned long)(ioaddr))&0x7F)<<9)) 79 #define ENEC_ISA_MEM_B(madr) (enec_isa_read_base+((((unsigned long)(madr))&0x7F)<<9)) 80 #define ENEC_ISA_MEM_W(madr) (enec_isa_read_base+((((unsigned long)(madr))&0x7F)<<9)) [all …]
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| /kernel/linux/linux-6.6/include/uapi/linux/ |
| D | serial_reg.h | 19 * DLAB=0 21 #define UART_RX 0 /* In: Receive buffer */ 22 #define UART_TX 0 /* Out: Transmit buffer */ 25 #define UART_IER_MSI 0x08 /* Enable Modem status interrupt */ 26 #define UART_IER_RLSI 0x04 /* Enable receiver line status interrupt */ 27 #define UART_IER_THRI 0x02 /* Enable Transmitter holding register int. */ 28 #define UART_IER_RDI 0x01 /* Enable receiver data interrupt */ 32 #define UART_IERX_SLEEP 0x10 /* Enable sleep mode */ 35 #define UART_IIR_NO_INT 0x01 /* No interrupts pending */ 36 #define UART_IIR_ID 0x0e /* Mask for the interrupt ID */ [all …]
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| /kernel/linux/linux-5.10/include/uapi/linux/ |
| D | serial_reg.h | 19 * DLAB=0 21 #define UART_RX 0 /* In: Receive buffer */ 22 #define UART_TX 0 /* Out: Transmit buffer */ 25 #define UART_IER_MSI 0x08 /* Enable Modem status interrupt */ 26 #define UART_IER_RLSI 0x04 /* Enable receiver line status interrupt */ 27 #define UART_IER_THRI 0x02 /* Enable Transmitter holding register int. */ 28 #define UART_IER_RDI 0x01 /* Enable receiver data interrupt */ 32 #define UART_IERX_SLEEP 0x10 /* Enable sleep mode */ 35 #define UART_IIR_NO_INT 0x01 /* No interrupts pending */ 36 #define UART_IIR_ID 0x0e /* Mask for the interrupt ID */ [all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/microchip/ |
| D | at91sam9261.dtsi | 38 #size-cells = <0>; 40 cpu@0 { 43 reg = <0>; 49 reg = <0x20000000 0x08000000>; 55 #clock-cells = <0>; 56 clock-frequency = <0>; 61 #clock-cells = <0>; 62 clock-frequency = <0>; 68 reg = <0x00300000 0x28000>; 71 ranges = <0 0x00300000 0x28000>; [all …]
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| D | at91rm9200.dtsi | 44 #size-cells = <0>; 46 cpu@0 { 49 reg = <0>; 55 reg = <0x20000000 0x04000000>; 61 #clock-cells = <0>; 62 clock-frequency = <0>; 67 #clock-cells = <0>; 68 clock-frequency = <0>; 74 reg = <0x00200000 0x4000>; 77 ranges = <0 0x00200000 0x4000>; [all …]
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| D | at91sam9rl.dtsi | 43 #size-cells = <0>; 45 cpu@0 { 48 reg = <0>; 54 reg = <0x20000000 0x04000000>; 60 #clock-cells = <0>; 61 clock-frequency = <0>; 66 #clock-cells = <0>; 67 clock-frequency = <0>; 72 #clock-cells = <0>; 79 reg = <0x00300000 0x10000>; [all …]
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| D | at91sam9260.dtsi | 41 #size-cells = <0>; 43 cpu@0 { 46 reg = <0>; 52 reg = <0x20000000 0x04000000>; 58 #clock-cells = <0>; 59 clock-frequency = <0>; 64 #clock-cells = <0>; 65 clock-frequency = <0>; 70 #clock-cells = <0>; 77 reg = <0x002ff000 0x2000>; [all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | at91sam9261.dtsi | 37 #size-cells = <0>; 39 cpu@0 { 42 reg = <0>; 48 reg = <0x20000000 0x08000000>; 54 #clock-cells = <0>; 55 clock-frequency = <0>; 60 #clock-cells = <0>; 61 clock-frequency = <0>; 67 reg = <0x00300000 0x28000>; 70 ranges = <0 0x00300000 0x28000>; [all …]
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| D | at91rm9200.dtsi | 43 #size-cells = <0>; 45 cpu@0 { 48 reg = <0>; 54 reg = <0x20000000 0x04000000>; 60 #clock-cells = <0>; 61 clock-frequency = <0>; 66 #clock-cells = <0>; 67 clock-frequency = <0>; 73 reg = <0x00200000 0x4000>; 76 ranges = <0 0x00200000 0x4000>; [all …]
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| D | at91sam9rl.dtsi | 42 #size-cells = <0>; 44 cpu@0 { 47 reg = <0>; 53 reg = <0x20000000 0x04000000>; 59 #clock-cells = <0>; 60 clock-frequency = <0>; 65 #clock-cells = <0>; 66 clock-frequency = <0>; 71 #clock-cells = <0>; 78 reg = <0x00300000 0x10000>; [all …]
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| D | at91sam9260.dtsi | 40 #size-cells = <0>; 42 cpu@0 { 45 reg = <0>; 51 reg = <0x20000000 0x04000000>; 57 #clock-cells = <0>; 58 clock-frequency = <0>; 63 #clock-cells = <0>; 64 clock-frequency = <0>; 69 #clock-cells = <0>; 76 reg = <0x002ff000 0x2000>; [all …]
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