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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/dsa/
Dsja1105.txt19 of support for RGMII internal delays (supported on P/Q/R/S, but not on
33 clock source or sink for this interface (not applicable for RGMII
35 - In the case of RGMII it affects the behavior regarding internal
38 of "rgmii-id", "rgmii-txid" or "rgmii-rxid", then the entity
39 designated to apply the delay/clock skew necessary for RGMII
41 2. If sja1105,role-phy is specified, and the phy-mode property is one
45 E or T device, it is an error to specify an RGMII phy-mode other
46 than "rgmii" for a port that is in fixed-link mode. In that case,
88 phy-mode = "rgmii-id";
96 phy-mode = "rgmii-id";
[all …]
Dmt7530.txt39 must be either "trgmii" or "rgmii"
45 2. PHY of port 0 or port 4: PHY interfaces with an external MAC like 2nd GMAC
47 Note: On a MT7621 SOC with integrated switch: 2nd GMAC can only connected to
52 1. Port 5 is disabled and isolated: An external phy can interface to the 2nd
54 In the case of a build-in MT7530 switch, port 5 shares the RGMII bus with 2nd
56 2. Port 5 is muxed to PHY of port 0/4: Port 0/4 interfaces with 2nd GMAC.
58 and RGMII delay.
63 4. Port 5 is muxed to GMAC5 and interfaces with the 2nd GAMC as 2nd CPU port.
64 Currently a 2nd CPU port is not supported by DSA code.
67 1. normal: The PHY can only connect to 2nd GMAC but not to the switch
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/
Dibm,emac.txt5 special McMAL DMA controller, and sometimes an RGMII or ZMII
15 - compatible : compatible list, contains 2 entries, first is
45 Supported values are: "mii", "rmii", "smii", "rgmii",
47 For Axon on CAB, it is "rgmii"
55 - rgmii-device : 1 cell, required iff connected to an RGMII. phandle
56 of the RGMII device node.
57 For Axon: phandle of plb5/plb4/opb/rgmii
58 - rgmii-channel : 1 cell, required iff connected to an RGMII. Which
59 RGMII channel is used by this EMAC.
143 phy-mode = "rgmii";
[all …]
Damlogic,meson-dwmac.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
65 The internal RGMII TX clock delay (provided by this driver) in
66 nanoseconds. Allowed values are 0ns, 2ns, 4ns, 6ns.
67 When phy-mode is set to "rgmii" then the TX delay should be
68 explicitly configured. When not configured a fallback of 2ns is
69 used. When the phy-mode is set to either "rgmii-id" or "rgmii-txid"
79 - 2
82 The internal RGMII RX clock delay (provided by this IP block) in
83 nanoseconds. When phy-mode is set to "rgmii" then the RX delay
85 either "rgmii-id" or "rgmii-rxid" the RX clock delay is already
[all …]
Dqcom,ethqos.txt14 - reg-names: Should contain register names "stmmaceth", "rgmii"
19 "ptp_ref", "rgmii"
34 reg-names = "stmmaceth", "rgmii";
35 clock-names = "stmmaceth", "pclk", "ptp_ref", "rgmii";
47 snps,rxpbl = <2>;
52 phy-mode = "rgmii";
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/net/
Dibm,emac.txt5 special McMAL DMA controller, and sometimes an RGMII or ZMII
15 - compatible : compatible list, contains 2 entries, first is
45 Supported values are: "mii", "rmii", "smii", "rgmii",
47 For Axon on CAB, it is "rgmii"
55 - rgmii-device : 1 cell, required iff connected to an RGMII. phandle
56 of the RGMII device node.
57 For Axon: phandle of plb5/plb4/opb/rgmii
58 - rgmii-channel : 1 cell, required iff connected to an RGMII. Which
59 RGMII channel is used by this EMAC.
143 phy-mode = "rgmii";
[all …]
Dmotorcomm,yt8xxx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
23 RGMII RX Clock Delay used only when PHY operates in RGMII mode with
24 internal delay (phy-mode is 'rgmii-id' or 'rgmii-rxid') in pico-seconds.
32 RGMII TX Clock Delay used only when PHY operates in RGMII mode with
33 internal delay (phy-mode is 'rgmii-id' or 'rgmii-txid') in pico-seconds.
57 drive strength of rx_clk rgmii pad.
58 The YT8531 RGMII LDO voltage supports 1.8V/3.3V, and the LDO voltage can
74 drive strength of rx_data/rx_ctl rgmii pad.
75 The YT8531 RGMII LDO voltage supports 1.8V/3.3V, and the LDO voltage can
97 Use original or inverted RGMII Transmit PHY Clock to drive the RGMII
[all …]
Dxlnx,gmii-to-rgmii.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/net/xlnx,gmii-to-rgmii.yaml#
7 title: Xilinx GMII to RGMII Converter
14 Independent Interface (RGMII) core provides the RGMII between RGMII-compliant
24 const: xlnx,gmii-to-rgmii-1.0
51 compatible = "xlnx,gmii-to-rgmii-1.0";
Damlogic,meson-dwmac.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
63 The internal RGMII TX clock delay (provided by this driver) in
64 nanoseconds. Allowed values are 0ns, 2ns, 4ns, 6ns.
65 When phy-mode is set to "rgmii" then the TX delay should be
66 explicitly configured. When not configured a fallback of 2ns is
67 used. When the phy-mode is set to either "rgmii-id" or "rgmii-txid"
78 - 2
81 The internal RGMII RX clock delay in nanoseconds. Deprecated, use
175 phy-mode = "rgmii";
Dti,icssg-prueth.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
36 - const: tx0-2
40 - const: tx1-2
57 maxItems: 2
64 maxItems: 2
99 ti,syscon-rgmii-delay:
107 to ICSSG control register for RGMII transmit delay
146 ti,pruss-gp-mux-sel = <2>, /* MII mode */
147 <2>,
148 <2>,
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/net/dsa/
Dnxp,sja1105.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
38 # Optional container node for the 2 internal MDIO buses of the SJA1110
42 # port 5 has PHY 1, port 6 has PHY 2 etc, while for 100base-TX, port 1 has
85 - rgmii
86 - rgmii-rxid
87 - rgmii-txid
88 - rgmii-id
154 phy-mode = "rgmii-id";
162 phy-mode = "rgmii-id";
168 port@2 {
[all …]
Dmicrochip,lan937x.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
48 - rgmii
49 - rgmii-id
50 - rgmii-txid
51 - rgmii-rxid
108 port@2 {
109 reg = <2>;
124 phy-mode = "rgmii";
138 phy-mode = "rgmii";
175 t1phy2: ethernet-phy@2{
Darrow,xrs700x.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
18 RGMII ports and one RMII port and are managed via i2c or mdio.
54 phy-mode = "rgmii-id";
56 ethernet-port@2 {
57 reg = <2>;
60 phy-mode = "rgmii-id";
65 phy-mode = "rgmii-id";
/kernel/linux/linux-5.10/arch/powerpc/boot/dts/
Deiger.dts7 * License version 2. This program is licensed "as is" without
14 #address-cells = <2>;
60 #interrupt-cells = <2>;
70 #interrupt-cells = <2>;
78 cell-index = <2>;
82 #interrupt-cells = <2>;
94 #interrupt-cells = <2>;
111 #address-cells = <2>;
154 #address-cells = <2>;
163 bank-width = <2>;
[all …]
Dklondike.dts54 #interrupt-cells = <2>;
64 #interrupt-cells = <2>;
72 cell-index = <2>;
76 #interrupt-cells = <2>;
88 #interrupt-cells = <2>;
108 num-tx-chans = <2>;
131 RGMII0: emac-rgmii@400a2000 {
132 compatible = "ibm,rgmii";
164 phy-mode = "rgmii";
168 rgmii-device = <&RGMII0>;
[all …]
Dglacier.dts7 * License version 2. This program is licensed "as is" without
14 #address-cells = <2>;
61 #interrupt-cells = <2>;
71 #interrupt-cells = <2>;
79 cell-index = <2>;
83 #interrupt-cells = <2>;
95 #interrupt-cells = <2>;
122 #address-cells = <2>;
171 #address-cells = <2>;
180 bank-width = <2>;
[all …]
/kernel/linux/linux-6.6/arch/powerpc/boot/dts/
Deiger.dts7 * License version 2. This program is licensed "as is" without
14 #address-cells = <2>;
60 #interrupt-cells = <2>;
70 #interrupt-cells = <2>;
78 cell-index = <2>;
82 #interrupt-cells = <2>;
94 #interrupt-cells = <2>;
111 #address-cells = <2>;
154 #address-cells = <2>;
163 bank-width = <2>;
[all …]
Dklondike.dts54 #interrupt-cells = <2>;
64 #interrupt-cells = <2>;
72 cell-index = <2>;
76 #interrupt-cells = <2>;
88 #interrupt-cells = <2>;
108 num-tx-chans = <2>;
131 RGMII0: emac-rgmii@400a2000 {
132 compatible = "ibm,rgmii";
164 phy-mode = "rgmii";
168 rgmii-device = <&RGMII0>;
[all …]
Dglacier.dts7 * License version 2. This program is licensed "as is" without
14 #address-cells = <2>;
61 #interrupt-cells = <2>;
71 #interrupt-cells = <2>;
79 cell-index = <2>;
83 #interrupt-cells = <2>;
95 #interrupt-cells = <2>;
122 #address-cells = <2>;
171 #address-cells = <2>;
180 bank-width = <2>;
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/apm/xgene-v2/
Dmac.c21 u32 intf_ctrl, rgmii; in xge_mac_set_speed() local
26 rgmii = xge_rd_csr(pdata, RGMII_REG_0); in xge_mac_set_speed()
37 SET_REG_BIT(&rgmii, CFG_SPEED_125, 0); in xge_mac_set_speed()
44 SET_REG_BIT(&rgmii, CFG_SPEED_125, 0); in xge_mac_set_speed()
47 SET_REG_BITS(&mc2, INTF_MODE, 2); in xge_mac_set_speed()
48 SET_REG_BITS(&intf_ctrl, HD_MODE, 2); in xge_mac_set_speed()
49 SET_REG_BITS(&icm0, CFG_MACMODE, 2); in xge_mac_set_speed()
51 SET_REG_BIT(&rgmii, CFG_SPEED_125, 1); in xge_mac_set_speed()
60 xge_wr_csr(pdata, RGMII_REG_0, rgmii); in xge_mac_set_speed()
71 addr0 = (dev_addr[3] << 24) | (dev_addr[2] << 16) | in xge_mac_set_station_addr()
/kernel/linux/linux-6.6/drivers/net/ethernet/apm/xgene-v2/
Dmac.c21 u32 intf_ctrl, rgmii; in xge_mac_set_speed() local
26 rgmii = xge_rd_csr(pdata, RGMII_REG_0); in xge_mac_set_speed()
37 SET_REG_BIT(&rgmii, CFG_SPEED_125, 0); in xge_mac_set_speed()
44 SET_REG_BIT(&rgmii, CFG_SPEED_125, 0); in xge_mac_set_speed()
47 SET_REG_BITS(&mc2, INTF_MODE, 2); in xge_mac_set_speed()
48 SET_REG_BITS(&intf_ctrl, HD_MODE, 2); in xge_mac_set_speed()
49 SET_REG_BITS(&icm0, CFG_MACMODE, 2); in xge_mac_set_speed()
51 SET_REG_BIT(&rgmii, CFG_SPEED_125, 1); in xge_mac_set_speed()
60 xge_wr_csr(pdata, RGMII_REG_0, rgmii); in xge_mac_set_speed()
71 addr0 = (dev_addr[3] << 24) | (dev_addr[2] << 16) | in xge_mac_set_station_addr()
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dls1021a-tsn.dts26 reg_vddio_codec: regulator-2V5 {
28 regulator-name = "2P5V";
61 phy-mode = "rgmii-id";
69 phy-mode = "rgmii-id";
73 port@2 {
77 phy-mode = "rgmii-id";
78 reg = <2>;
85 phy-mode = "rgmii-id";
92 phy-mode = "rgmii";
118 /* RGMII delays added via PCB traces */
[all …]
/kernel/linux/linux-5.10/arch/mips/include/asm/octeon/
Dcvmx-wqe.h10 * it under the terms of the GNU General Public License, Version 2, as
103 * - 2 = L4 Checksum Error: the L4 checksum value is
132 * - 2 = IPv4 Header Checksum Error: the IPv4 header
330 * - 2 = jabber error: the RGMII packet was too large
332 * - 3 = overrun error: the RGMII packet is longer
334 * - 4 = oversize error: the RGMII packet is longer
336 * - 5 = alignment error: the RGMII packet is not an
339 * - 6 = fragment error: the RGMII packet is shorter
341 * - 7 = GMX FCS error: the RGMII packet had an FCS
343 * - 8 = undersize error: the RGMII packet is shorter
[all …]
/kernel/linux/linux-6.6/arch/mips/include/asm/octeon/
Dcvmx-wqe.h10 * it under the terms of the GNU General Public License, Version 2, as
103 * - 2 = L4 Checksum Error: the L4 checksum value is
132 * - 2 = IPv4 Header Checksum Error: the IPv4 header
330 * - 2 = jabber error: the RGMII packet was too large
332 * - 3 = overrun error: the RGMII packet is longer
334 * - 4 = oversize error: the RGMII packet is longer
336 * - 5 = alignment error: the RGMII packet is not an
339 * - 6 = fragment error: the RGMII packet is shorter
341 * - 7 = GMX FCS error: the RGMII packet had an FCS
343 * - 8 = undersize error: the RGMII packet is shorter
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/nxp/ls/
Dls1021a-tsn.dts27 reg_vddio_codec: regulator-2V5 {
29 regulator-name = "2P5V";
62 phy-mode = "rgmii-id";
70 phy-mode = "rgmii-id";
74 port@2 {
78 phy-mode = "rgmii-id";
79 reg = <2>;
86 phy-mode = "rgmii-id";
93 phy-mode = "rgmii";
121 /* RGMII delays added via PCB traces */
[all …]

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