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/kernel/linux/linux-5.10/Documentation/fb/
Dviafb.modes13 # Resolution 640 480
22 # 80 chars 480 lines
29 # D: 25.175 MHz, H: 31.469 kHz, V: 59.94 Hz
30 geometry 640 480 640 480 32
31 timings 39722 48 16 33 10 96 2 endmode mode "480x640-60"
32 # D: 24.823 MHz, H: 39.780 kHz, V: 60.00 Hz
33 geometry 480 640 480 640 32 timings 39722 72 24 19 1 48 3 endmode
38 # Resolution 640 480
47 # 80 chars 480 lines
53 # D: 31.50 MHz, H: 37.500 kHz, V: 75.00 Hz
[all …]
/kernel/linux/linux-6.6/Documentation/fb/
Dviafb.modes13 # Resolution 640 480
22 # 80 chars 480 lines
29 # D: 25.175 MHz, H: 31.469 kHz, V: 59.94 Hz
30 geometry 640 480 640 480 32
31 timings 39722 48 16 33 10 96 2 endmode mode "480x640-60"
32 # D: 24.823 MHz, H: 39.780 kHz, V: 60.00 Hz
33 geometry 480 640 480 640 32 timings 39722 72 24 19 1 48 3 endmode
38 # Resolution 640 480
47 # 80 chars 480 lines
53 # D: 31.50 MHz, H: 37.500 kHz, V: 75.00 Hz
[all …]
/kernel/linux/linux-5.10/arch/arm/mach-omap2/
Dpdata-quirks.c68 * Configures GPIOs 126, 127 and 129 to 1.8V mode instead of 3.0V
165 u32 v; in am35xx_enable_emac_int() local
167 v = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); in am35xx_enable_emac_int()
168 v |= (AM35XX_CPGMAC_C0_RX_PULSE_CLR | AM35XX_CPGMAC_C0_TX_PULSE_CLR | in am35xx_enable_emac_int()
170 omap_ctrl_writel(v, AM35XX_CONTROL_LVL_INTR_CLEAR); in am35xx_enable_emac_int()
176 u32 v; in am35xx_disable_emac_int() local
178 v = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); in am35xx_disable_emac_int()
179 v |= (AM35XX_CPGMAC_C0_RX_PULSE_CLR | AM35XX_CPGMAC_C0_TX_PULSE_CLR); in am35xx_disable_emac_int()
180 omap_ctrl_writel(v, AM35XX_CONTROL_LVL_INTR_CLEAR); in am35xx_disable_emac_int()
191 u32 v; in am35xx_emac_reset() local
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/panel/
Dpanel-novatek-nt35510.c9 * 480x864, 480x854, 480x800, 480x720 and 480x640 pixel displays.
10 * It has 480x840x24bit SRAM embedded for storing a frame.
11 * When powered on the display is by default in 480x800 mode.
175 * @avdd: setting for AVDD ranging from 0x00 = 6.5V to 0x14 = 4.5V
176 * in 0.1V steps the default is 0x05 which means 6.0V
204 * @avee: setting for AVEE ranging from 0x00 = -6.5V to 0x14 = -4.5V
205 * in 0.1V steps the default is 0x05 which means -6.0V
224 * @vgh: setting for VGH ranging from 0x00 = 7.0V to 0x0B = 18.0V
225 * in 1V steps, the default is 0x08 which means 15V
243 * @vgl: setting for VGL ranging from 0x00 = -2V to 0x0f = -15V in
[all …]
Dpanel-widechips-ws2401.c3 * Panel driver for the WideChips WS2401 480x800 DPI RGB panel, used in
86 .hdisplay = 480,
87 .hsync_start = 480 + 8,
88 .hsync_end = 480 + 8 + 10,
89 .htotal = 480 + 8 + 10 + 8,
161 /* Configure resolution to 480RGBx800 */ in ws2401_power_on()
163 /* Set addressing mode Flip V(d0), Flip H(d1) RGB/BGR(d3) */ in ws2401_power_on()
168 mipi_dbi_command(dbi, WS2401_PSMPS, 0x06, 0x03, /* DDVDH: 4.6v */ in ws2401_power_on()
170 mipi_dbi_command(dbi, WS2401_NSMPS, 0x06, 0x03, /* DDVDH: -4.6v */ in ws2401_power_on()
174 0xb4, /* VGH:16.1v, VGL:-13.8v */ in ws2401_power_on()
[all …]
Dpanel-sitronix-st7701.c253 /* Vop = 3.5375V + (VRHA[7:0] * 0.0125V) */ in st7701_init_sequence()
258 /* Vcom = 0.1V + (VCOM[7:0] * 0.0125V) */ in st7701_init_sequence()
263 /* Vgh = 11.5V + (VGHSS[7:0] * 0.5V) */ in st7701_init_sequence()
286 /* Avdd = 6.2V + (AVDD[1:0] * 0.2V) , Avcl = -4.4V - (AVCL[1:0] * 0.2V) */ in st7701_init_sequence()
546 .hdisplay = 480,
547 .hsync_start = 480 + 38,
548 .hsync_end = 480 + 38 + 12,
549 .htotal = 480 + 38 + 12 + 12,
645 .hdisplay = 480,
646 .hsync_start = 480 + 40,
[all …]
Dpanel-ilitek-ili9322.c56 * VREG1 voltage regulator from 3.6V (0x00) to 6.0V (0x18) in 0.1V
57 * increments. 5.4V (0x12) is the default. This is the reference
209 * used (4.5V).
399 "can't write gamma V%d to 0x%02x (%d)\n", in ili9322_init()
616 .vdisplay = 480,
617 .vsync_start = 480 + 4,
618 .vsync_end = 480 + 4 + 1,
630 .vdisplay = 480,
631 .vsync_start = 480 + 4,
632 .vsync_end = 480 + 4 + 1,
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/panel/
Dpanel-novatek-nt35510.c9 * 480x864, 480x854, 480x800, 480x720 and 480x640 pixel displays.
10 * It has 480x840x24bit SRAM embedded for storing a frame.
11 * When powered on the display is by default in 480x800 mode.
175 * @avdd: setting for AVDD ranging from 0x00 = 6.5V to 0x14 = 4.5V
176 * in 0.1V steps the default is 0x05 which means 6.0V
204 * @avee: setting for AVEE ranging from 0x00 = -6.5V to 0x14 = -4.5V
205 * in 0.1V steps the default is 0x05 which means -6.0V
224 * @vgh: setting for VGH ranging from 0x00 = 7.0V to 0x0B = 18.0V
225 * in 1V steps, the default is 0x08 which means 15V
243 * @vgl: setting for VGL ranging from 0x00 = -2V to 0x0f = -15V in
[all …]
Dpanel-ilitek-ili9322.c55 * VREG1 voltage regulator from 3.6V (0x00) to 6.0V (0x18) in 0.1V
56 * increments. 5.4V (0x12) is the default. This is the reference
208 * used (4.5V).
398 "can't write gamma V%d to 0x%02x (%d)\n", in ili9322_init()
615 .vdisplay = 480,
616 .vsync_start = 480 + 4,
617 .vsync_end = 480 + 4 + 1,
629 .vdisplay = 480,
630 .vsync_start = 480 + 4,
631 .vsync_end = 480 + 4 + 1,
[all …]
/kernel/linux/linux-5.10/drivers/ide/
Dide-timings.c37 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
40 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
41 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
93 #define ENOUGH(v, unit) (((v) - 1) / (unit) + 1) argument
94 #define EZ(v, unit) ((v) ? ENOUGH((v) * 1000, unit) : 0) argument
/kernel/linux/linux-5.10/drivers/ata/
Dlibata-pata-timings.c35 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 50, 960, 0 },
36 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 30, 480, 0 },
39 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 20, 480, 0 },
57 #define ENOUGH(v, unit) (((v)-1)/(unit)+1) argument
58 #define EZ(v, unit) ((v)?ENOUGH(((v) * 1000), unit):0) argument
/kernel/linux/linux-6.6/drivers/ata/
Dlibata-pata-timings.c35 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 50, 960, 0 },
36 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 30, 480, 0 },
39 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 20, 480, 0 },
57 #define ENOUGH(v, unit) (((v)-1)/(unit)+1) argument
58 #define EZ(v, unit) ((v)?ENOUGH(((v) * 1000), unit):0) argument
/kernel/linux/linux-6.6/drivers/video/fbdev/
Dvalkyriefb.h102 { 11, 28, 3 }, /* pixel clock = 79.55MHz for V=74.50Hz */
108 /* This used to be 12, 30, 3 for pixel clock = 78.12MHz for V=72.12Hz, but
118 { 12, 29, 3 }, /* pixel clock = 75.52MHz for V=69.71Hz? */
119 /* I interpolated the V=69.71 from the vmode 14 and old 15
129 { 15, 31, 3 }, /* pixel clock = 64.58MHz for V=59.62Hz */
138 { 23, 42, 3 }, /* pixel clock = 57.07MHz for V=74.27Hz */
146 { 17, 27, 3 }, /* pixel clock = 49.63MHz for V=71.66Hz */
155 used to be 20,53,2, pixel clock 41.41MHz for V=59.78Hz */
163 { 14, 27, 2 }, /* pixel clock = 30.13MHz for V=66.43Hz */
165 640, 480
[all …]
/kernel/linux/linux-5.10/drivers/video/fbdev/
Dvalkyriefb.h102 { 11, 28, 3 }, /* pixel clock = 79.55MHz for V=74.50Hz */
108 /* This used to be 12, 30, 3 for pixel clock = 78.12MHz for V=72.12Hz, but
118 { 12, 29, 3 }, /* pixel clock = 75.52MHz for V=69.71Hz? */
119 /* I interpolated the V=69.71 from the vmode 14 and old 15
129 { 15, 31, 3 }, /* pixel clock = 64.58MHz for V=59.62Hz */
138 { 23, 42, 3 }, /* pixel clock = 57.07MHz for V=74.27Hz */
146 { 17, 27, 3 }, /* pixel clock = 49.63MHz for V=71.66Hz */
155 used to be 20,53,2, pixel clock 41.41MHz for V=59.78Hz */
163 { 14, 27, 2 }, /* pixel clock = 30.13MHz for V=66.43Hz */
165 640, 480
[all …]
/kernel/linux/linux-6.6/arch/arm/mach-omap2/
Dpdata-quirks.c56 * Configures GPIOs 126, 127 and 129 to 1.8V mode instead of 3.0V
146 u32 v; in am35xx_enable_emac_int() local
148 v = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); in am35xx_enable_emac_int()
149 v |= (AM35XX_CPGMAC_C0_RX_PULSE_CLR | AM35XX_CPGMAC_C0_TX_PULSE_CLR | in am35xx_enable_emac_int()
151 omap_ctrl_writel(v, AM35XX_CONTROL_LVL_INTR_CLEAR); in am35xx_enable_emac_int()
157 u32 v; in am35xx_disable_emac_int() local
159 v = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); in am35xx_disable_emac_int()
160 v |= (AM35XX_CPGMAC_C0_RX_PULSE_CLR | AM35XX_CPGMAC_C0_TX_PULSE_CLR); in am35xx_disable_emac_int()
161 omap_ctrl_writel(v, AM35XX_CONTROL_LVL_INTR_CLEAR); in am35xx_disable_emac_int()
172 u32 v; in am35xx_emac_reset() local
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Ds5pv210-goni.dts47 regulator-name = "V_TF_2.8V";
101 regulator-name = "VALIVE_1.1V";
108 regulator-name = "VUSB+MIPI_1.1V";
115 regulator-name = "VADC_3.3V";
121 regulator-name = "VTF_2.8V";
127 regulator-name = "VCC_3.3V";
133 regulator-name = "VLCD_1.8V";
140 regulator-name = "VUSB+VDAC_3.3V";
146 regulator-name = "VCC+VCAM_2.8V";
152 regulator-name = "VPLL_1.1V";
[all …]
/kernel/linux/linux-5.10/arch/arm/mach-s3c/
Dmach-bast.c413 .height = 480,
417 .yres = 480,
431 .height = 480,
435 .yres = 480,
449 .height = 480,
453 .yres = 480,
488 /* LCD contrast (0-6.6V) */
500 /* LCD feedback (0-6.6V) */
506 /* Vcore (1.8-2.0V), Vref 3.3V */
/kernel/linux/linux-6.6/drivers/video/fbdev/geode/
Dlxfb_core.c39 { NULL, 60, 640, 480, 39682, 48, 8, 25, 2, 88, 2,
47 { NULL, 70, 640, 480, 35014, 88, 24, 15, 2, 64, 3,
50 { NULL, 72, 640, 480, 32102, 120, 16, 20, 1, 40, 3,
54 { NULL, 75, 640, 480, 31746, 120, 16, 16, 1, 64, 3,
58 { NULL, 85, 640, 480, 27780, 80, 56, 25, 1, 56, 3,
62 { NULL, 90, 640, 480, 26392, 96, 32, 22, 1, 64, 3,
65 { NULL, 100, 640, 480, 23167, 104, 40, 25, 1, 64, 3,
68 { NULL, 60, 640, 480, 39682, 48, 16, 25, 10, 88, 2,
302 u32 v; in lxfb_setcolreg() local
307 v = chan_to_field(red, &info->var.red); in lxfb_setcolreg()
[all …]
/kernel/linux/linux-5.10/drivers/video/fbdev/geode/
Dlxfb_core.c38 { NULL, 60, 640, 480, 39682, 48, 8, 25, 2, 88, 2,
46 { NULL, 70, 640, 480, 35014, 88, 24, 15, 2, 64, 3,
49 { NULL, 72, 640, 480, 32102, 120, 16, 20, 1, 40, 3,
53 { NULL, 75, 640, 480, 31746, 120, 16, 16, 1, 64, 3,
57 { NULL, 85, 640, 480, 27780, 80, 56, 25, 1, 56, 3,
61 { NULL, 90, 640, 480, 26392, 96, 32, 22, 1, 64, 3,
64 { NULL, 100, 640, 480, 23167, 104, 40, 25, 1, 64, 3,
67 { NULL, 60, 640, 480, 39682, 48, 16, 25, 10, 88, 2,
301 u32 v; in lxfb_setcolreg() local
306 v = chan_to_field(red, &info->var.red); in lxfb_setcolreg()
[all …]
/kernel/linux/linux-5.10/drivers/video/fbdev/core/
Dmodedb.c21 #define name_matches(v, s, l) \ argument
22 ((v).name && !strncmp((s), (v).name, (l)) && strlen((v).name) == (l))
23 #define res_matches(v, x, y) \ argument
24 ((v).xres == (x) && (v).yres == (y))
43 { NULL, 60, 640, 480, 39721, 40, 24, 32, 11, 96, 2, 0,
59 { NULL, 72, 640, 480, 31746, 144, 40, 30, 8, 40, 3, 0,
63 { NULL, 75, 640, 480, 31746, 120, 16, 16, 1, 64, 3, 0,
72 { NULL, 85, 640, 480, 27777, 80, 56, 25, 1, 56, 3, 0,
88 { NULL, 100, 640, 480, 21834, 96, 32, 36, 8, 96, 6, 0,
244 /* 480x300 @ 56 Hz, 35.2 kHz hsync, 8:5 aspect ratio */
[all …]
/kernel/linux/linux-6.6/drivers/video/fbdev/core/
Dmodedb.c21 #define name_matches(v, s, l) \ argument
22 ((v).name && !strncmp((s), (v).name, (l)) && strlen((v).name) == (l))
23 #define res_matches(v, x, y) \ argument
24 ((v).xres == (x) && (v).yres == (y))
43 { NULL, 60, 640, 480, 39721, 40, 24, 32, 11, 96, 2, 0,
59 { NULL, 72, 640, 480, 31746, 144, 40, 30, 8, 40, 3, 0,
63 { NULL, 75, 640, 480, 31746, 120, 16, 16, 1, 64, 3, 0,
72 { NULL, 85, 640, 480, 27777, 80, 56, 25, 1, 56, 3, 0,
88 { NULL, 100, 640, 480, 21834, 96, 32, 36, 8, 96, 6, 0,
244 /* 480x300 @ 56 Hz, 35.2 kHz hsync, 8:5 aspect ratio */
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/samsung/
Ds5pv210-goni.dts47 regulator-name = "V_TF_2.8V";
101 regulator-name = "VALIVE_1.1V";
108 regulator-name = "VUSB+MIPI_1.1V";
115 regulator-name = "VADC_3.3V";
121 regulator-name = "VTF_2.8V";
127 regulator-name = "VCC_3.3V";
133 regulator-name = "VLCD_1.8V";
140 regulator-name = "VUSB+VDAC_3.3V";
146 regulator-name = "VCC+VCAM_2.8V";
152 regulator-name = "VPLL_1.1V";
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/riscv/
Dsunxi.yaml7 title: Allwinner RISC-V SoC-based boards
15 Allwinner RISC-V SoC-based boards
51 - sipeed,lichee-rv-86-panel-480p
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/panel/
Dsamsung,lms380kf01.yaml9 description: The LMS380KF01 is a 480x800 DPI display panel from Samsung Mobile
37 usually around 3.0 V
41 around 1.8 V
Dsamsung,s6d27a1.yaml9 description: The S6D27A1 is a 480x800 DPI display panel from Samsung Mobile
36 usually around 3.0 V
40 around 1.8 V

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