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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/phy/
Dmicrochip,sparx5-serdes.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/microchip,sparx5-serdes.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Steen Hegelund <steen.hegelund@microchip.com>
21 * Rx built-in fault detector (loss-of-lock/loss-of-signal)
22 * Adjustable tx de-emphasis (FFE)
31 The SERDES6G is a high-speed SERDES interface, which can operate at
34 * 100 Mbps (100BASE-FX)
35 * 1.25 Gbps (SGMII/1000BASE-X/1000BASE-KX)
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/kernel/linux/linux-5.10/include/uapi/linux/
Dmdio.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
4 * Copyright 2006-2009 Solarflare Communications Inc.
23 #define MDIO_MMD_DTEXS 5 /* DTE Extender Sublayer */
25 #define MDIO_MMD_AN 7 /* Auto-Negotiation */
36 #define MDIO_DEVS1 5 /* Devices in package */
38 #define MDIO_CTRL2 7 /* 10G control 2 */
39 #define MDIO_STAT2 8 /* 10G status 2 */
40 #define MDIO_PMA_TXDIS 9 /* 10G PMA/PMD transmit disable */
41 #define MDIO_PMA_RXDET 10 /* 10G PMA/PMD receive signal detect */
42 #define MDIO_PMA_EXTABLE 11 /* 10G PMA/PMD extended ability */
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/kernel/linux/linux-6.6/include/uapi/linux/
Dmdio.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
4 * Copyright 2006-2009 Solarflare Communications Inc.
23 #define MDIO_MMD_DTEXS 5 /* DTE Extender Sublayer */
25 #define MDIO_MMD_AN 7 /* Auto-Negotiation */
36 #define MDIO_DEVS1 5 /* Devices in package */
38 #define MDIO_CTRL2 7 /* 10G control 2 */
39 #define MDIO_STAT2 8 /* 10G status 2 */
40 #define MDIO_PMA_TXDIS 9 /* 10G PMA/PMD transmit disable */
41 #define MDIO_PMA_RXDET 10 /* 10G PMA/PMD receive signal detect */
42 #define MDIO_PMA_EXTABLE 11 /* 10G PMA/PMD extended ability */
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/kernel/linux/linux-5.10/drivers/net/phy/
Daquantia_main.c1 // SPDX-License-Identifier: GPL-2.0
50 #define MDIO_AN_TX_VEND_STATUS1_5000BASET 5
129 /* Sleep and timeout for checking if the Processor-Intensive
177 int len_l = min(stat->size, 16); in aqr107_get_stat()
178 int len_h = stat->size - len_l; in aqr107_get_stat()
182 val = phy_read_mmd(phydev, MDIO_MMD_C22EXT, stat->reg); in aqr107_get_stat()
186 ret = val & GENMASK(len_l - 1, 0); in aqr107_get_stat()
188 val = phy_read_mmd(phydev, MDIO_MMD_C22EXT, stat->reg + 1); in aqr107_get_stat()
192 ret += (val & GENMASK(len_h - 1, 0)) << 16; in aqr107_get_stat()
201 struct aqr107_priv *priv = phydev->priv; in aqr107_get_stats()
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Dphylink.c1 // SPDX-License-Identifier: GPL-2.0
4 * technologies such as SFP cages where the PHY is hot-pluggable.
38 * struct phylink - internal data type for phylink
55 u8 link_port; /* The current non-phy ethtool port */
84 if ((pl)->config->type == PHYLINK_NETDEV) \
85 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \
86 else if ((pl)->config->type == PHYLINK_DEV) \
87 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \
99 if ((pl)->config->type == PHYLINK_NETDEV) \
100 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \
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/kernel/linux/linux-6.6/drivers/net/phy/
Daquantia_main.c1 // SPDX-License-Identifier: GPL-2.0
56 #define MDIO_AN_TX_VEND_STATUS1_5000BASET 5
149 /* Sleep and timeout for checking if the Processor-Intensive
197 int len_l = min(stat->size, 16); in aqr107_get_stat()
198 int len_h = stat->size - len_l; in aqr107_get_stat()
202 val = phy_read_mmd(phydev, MDIO_MMD_C22EXT, stat->reg); in aqr107_get_stat()
206 ret = val & GENMASK(len_l - 1, 0); in aqr107_get_stat()
208 val = phy_read_mmd(phydev, MDIO_MMD_C22EXT, stat->reg + 1); in aqr107_get_stat()
212 ret += (val & GENMASK(len_h - 1, 0)) << 16; in aqr107_get_stat()
221 struct aqr107_priv *priv = phydev->priv; in aqr107_get_stats()
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Dphylink.c1 // SPDX-License-Identifier: GPL-2.0
4 * technologies such as SFP cages where the PHY is hot-pluggable.
44 * struct phylink - internal data type for phylink
60 u8 link_port; /* The current non-phy ethtool port */
93 if ((pl)->config->type == PHYLINK_NETDEV) \
94 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \
95 else if ((pl)->config->type == PHYLINK_DEV) \
96 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \
108 if ((pl)->config->type == PHYLINK_NETDEV) \
109 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \
[all …]
Dmarvell10g.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Marvell 10G 88x3310 PHY driver
10 * via observation and experimentation for a setup using single-lane Serdes:
12 * SGMII PHYXS -- BASE-T PCS -- 10G PMA -- AN -- Copper (for <= 1G)
13 * 10GBASE-KR PHYXS -- BASE-T PCS -- 10G PMA -- AN -- Copper (for 10G)
14 * 10GBASE-KR PHYXS -- BASE-R PCS -- Fiber
18 * XAUI PHYXS -- <appropriate PCS as above>
104 /* These registers appear at 0x800X and 0xa00X - the 0xa00X control
108 MV_AN_CTRL1000 = 0x8000, /* 1000base-T control register */
109 MV_AN_STAT1000 = 0x8001, /* 1000base-T status register */
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Dmxl-gpy.c1 // SPDX-License-Identifier: GPL-2.0+
52 #define PHY_IMASK_WOL BIT(15) /* Wake-on-LAN */
53 #define PHY_IMASK_ANC BIT(10) /* Auto-Neg complete */
54 #define PHY_IMASK_ADSC BIT(5) /* Link auto-downspeed detect */
112 * it can safely re-enter loopback mode. Record the time when
132 * T = -2.5761e-11*(N^4) + 9.7332e-8*(N^3) + -1.9165e-4*(N^2) +
133 * 3.0762e-1*(N^1) + -5.2156e1
135 * where [-52.156, 137.961]C and N = [0, 1023].
144 * T = -25761e-12*(N^4) + 97332e-9*(N^3) + -191650e-6*(N^2) +
145 * 307620e-3*(N^1) + -52156
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/kernel/linux/linux-5.10/drivers/net/pcs/
Dpcs-xpcs.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/pcs/pcs-xpcs.h>
27 #define DW_RXFIFO_ERR GENMASK(6, 5)
31 #define DW_USXGMII_SS_MASK (BIT(13) | BIT(6) | BIT(5))
33 #define DW_USXGMII_5000 (BIT(13) | BIT(5))
34 #define DW_USXGMII_2500 (BIT(5))
53 #define DW_C73_1000KX BIT(5)
151 return mdiobus_read(xpcs->bus, xpcs->addr, reg_addr); in xpcs_read()
158 return mdiobus_write(xpcs->bus, xpcs->addr, reg_addr, val); in xpcs_write()
193 } while (ret & MDIO_CTRL1_RESET && --retries); in xpcs_poll_reset()
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/kernel/linux/linux-6.6/drivers/net/dsa/mv88e6xxx/
Dpcs-639x.c1 // SPDX-License-Identifier: GPL-2.0-or-later
35 err = mdiodev_c45_read(&mpcs->mdio, MDIO_MMD_PHYXS, regnum); in mv88e639x_read()
46 return mdiodev_c45_write(&mpcs->mdio, MDIO_MMD_PHYXS, regnum, val); in mv88e639x_write()
52 return mdiodev_c45_modify(&mpcs->mdio, MDIO_MMD_PHYXS, regnum, mask, in mv88e639x_modify()
59 return mdiodev_c45_modify_changed(&mpcs->mdio, MDIO_MMD_PHYXS, regnum, in mv88e639x_modify_changed()
73 mpcs->mdio.dev.parent = dev; in mv88e639x_pcs_alloc()
74 mpcs->mdio.bus = bus; in mv88e639x_pcs_alloc()
75 mpcs->mdio.addr = addr; in mv88e639x_pcs_alloc()
77 snprintf(mpcs->name, sizeof(mpcs->name), in mv88e639x_pcs_alloc()
78 "mv88e6xxx-%s-serdes-%d", dev_name(dev), port); in mv88e639x_pcs_alloc()
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/kernel/linux/linux-6.6/drivers/phy/cadence/
Dphy-cadence-torrent.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <dt-bindings/phy/phy.h>
10 #include <dt-bindings/phy/phy-cadence.h>
12 #include <linux/clk-provider.h>
239 [CDNS_TORRENT_REFCLK_DRIVER] = "refclk-driver",
240 [CDNS_TORRENT_DERIVED_REFCLK] = "refclk-der",
241 [CDNS_TORRENT_RECEIVED_REFCLK] = "refclk-rec",
279 [CMN_CDIAG_REFCLK_DRV0_CTRL_5] = REG_FIELD(CMN_CDIAG_REFCLK_DRV0_CTRL, 5, 5),
325 #define LINK1_MASK GENMASK(5, 3)
464 for (i = 0; i < tbl->num_entries; i++) { in cdns_torrent_get_tbl_vals()
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/kernel/linux/linux-6.6/drivers/net/pcs/
Dpcs-xpcs.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/pcs/pcs-xpcs.h>
14 #include "pcs-xpcs.h"
167 const struct xpcs_compat *compat = &id->compat[i]; in xpcs_find_compat()
169 for (j = 0; j < compat->num_interfaces; j++) in xpcs_find_compat()
170 if (compat->interface[j] == interface) in xpcs_find_compat()
181 compat = xpcs_find_compat(xpcs->id, interface); in xpcs_get_an_mode()
183 return -ENODEV; in xpcs_get_an_mode()
185 return compat->an_mode; in xpcs_get_an_mode()
194 for (i = 0; compat->supported[i] != __ETHTOOL_LINK_MODE_MASK_NBITS; i++) in __xpcs_linkmode_supported()
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/kernel/linux/linux-6.6/include/linux/
Dphy.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c
79 * Set phydev->irq to PHY_POLL if interrupts are not supported,
83 #define PHY_POLL -1
84 #define PHY_MAC_INTERRUPT -2
93 * enum phy_interface_t - Interface Mode definitions
95 * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch
97 * @PHY_INTERFACE_MODE_MII: Media-independent interface
98 * @PHY_INTERFACE_MODE_GMII: Gigabit media-independent interface
99 * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface
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/kernel/linux/patches/linux-5.10/imx8mm_patch/patches/
D0005_linux_include.patch7 Change-Id: Icf23f02df7b566848af808b9eeaed889d1773e71
9 diff --git a/include/drm/bridge/cdns-mhdp.h b/include/drm/bridge/cdns-mhdp.h
12 --- /dev/null
13 +++ b/include/drm/bridge/cdns-mhdp.h
14 @@ -0,0 +1,921 @@
15 +/* SPDX-License-Identifier: GPL-2.0 */
18 + * Author: Chris Zhong <zyw@rock-chips.com>
39 +#include <sound/hdmi-codec.h>
311 +#define SOURCE_AUX_SYS_CLK_RSTN_EN BIT(5)
326 +#define SPDIF_CDR_CLK_RSTN_EN BIT(5)
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