| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | at91-natte.dtsi | 33 io-channels = <&adc 6>; 69 reg = <0x9>; 85 reg = <0x9>; 101 reg = <0x9>; 117 reg = <0x9>; 133 reg = <0x9>; 149 reg = <0x9>; 158 i2c@6 { 159 reg = <6>; 165 reg = <0x9>; [all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/microchip/ |
| D | at91-natte.dtsi | 33 io-channels = <&adc 6>; 69 reg = <0x9>; 85 reg = <0x9>; 101 reg = <0x9>; 117 reg = <0x9>; 133 reg = <0x9>; 149 reg = <0x9>; 158 i2c@6 { 159 reg = <6>; 165 reg = <0x9>; [all …]
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| /kernel/linux/linux-5.10/arch/arm64/crypto/ |
| D | sha512-core.S_shipped | 71 .align 6 87 ldp x26,x27,[x0,#6*8] 175 eor x9,x21,x21,ror#23 181 eor x16,x16,x9,ror#18 // Sigma1(e) 182 ror x9,x25,#28 189 eor x17,x9,x17,ror#34 // Sigma0(a) 220 ldp x9,x10,[x1],#2*8 243 rev x9,x9 // 6 251 add x21,x21,x9 // h+=X[i] 446 str x9,[sp,#16] [all …]
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| D | aes-neonbs-core.S | 369 .align 6 495 lsl x9, rounds, #7 496 add bskey, bskey, x9 590 tbnz x5, #6, 0f 610 tbnz x5, #6, 1f 638 frame_push 6 670 tbnz x6, #6, 0f 708 tbnz x6, #6, 1f 774 tbnz x6, #6, 0f 793 frame_push 6, 64 [all …]
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| D | poly1305-core.S_shipped | 29 mov x9,#0xfffffffc0fffffff 30 movk x9,#0x0fff,lsl#48 35 and x7,x7,x9 // &=0ffffffc0fffffff 36 and x9,x9,#-4 37 and x8,x8,x9 // &=0ffffffc0ffffffc 97 add x9,x8,x8,lsr#2 // s1 = r1 + (r1 >> 2) 116 mul x10,x5,x9 // h1*5*r1 117 umulh x11,x5,x9 130 mul x10,x6,x9 // h2*5*r1 218 mul x10,x5,x9 // h1*5*r1 [all …]
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| D | poly1305-armv8.pl | 330 str w14,[$ctx,#16*6] // s3 474 ldp x9,x13,[$inp,#48] 484 rev x9,x9 488 and x5,x9,#0x03ffffff 490 ubfx x7,x9,#26,#26 493 extr x9,x13,x9,#52 497 and x9,x9,#0x03ffffff 502 add x8,x8,x9,lsl#32 // bfi x8,x9,#32,#32 511 ldp x9,x13,[$inp],#48 520 rev x9,x9 [all …]
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| /kernel/linux/linux-5.10/Documentation/input/devices/ |
| D | alps.rst | 8 ALPS touchpads, called versions 1, 2, 3, 4, 5, 6, 7 and 8. 109 byte 0: 1 0 0 0 1 x9 x8 x7 123 byte 2: 0 x10 x9 x8 x7 ? fin ges 141 byte 2: 0 x10 x9 x8 x7 0 fin ges 145 byte 6: 0 y9 y8 y7 1 m r l 164 byte 1: 0 x10 x9 x8 x7 x6 x5 x4 183 byte 4: 0 x14 x13 x12 x11 x10 x9 y0 208 byte 1: 0 x10 x9 x8 x7 x6 x5 x4 213 byte 6: bitmap data (described below) 217 required to construct a complete bitmap packet. Once assembled, the 6-byte [all …]
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| D | elantech.rst | 24 5.2 Native absolute mode 6 byte packet format 28 6. Hardware version 3 30 6.2 Native absolute mode 6 byte packet format 35 7.2 Native absolute mode 6 byte packet format 41 8.2 Native relative mode 6 byte packet format 52 packet. Version 2 seems to be introduced with the EeePC and uses 6 bytes 54 and width of the touch. Hardware version 3 uses 6 bytes per packet (and 55 for 2 fingers the concatenation of two 6 bytes packets) and allows tracking 56 of up to 3 fingers. Hardware version 4 uses 6 bytes per packet, and can 61 separate packet format. It is also 6 bytes per packet. [all …]
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| /kernel/linux/linux-6.6/Documentation/input/devices/ |
| D | alps.rst | 8 ALPS touchpads, called versions 1, 2, 3, 4, 5, 6, 7 and 8. 109 byte 0: 1 0 0 0 1 x9 x8 x7 123 byte 2: 0 x10 x9 x8 x7 ? fin ges 141 byte 2: 0 x10 x9 x8 x7 0 fin ges 145 byte 6: 0 y9 y8 y7 1 m r l 164 byte 1: 0 x10 x9 x8 x7 x6 x5 x4 183 byte 4: 0 x14 x13 x12 x11 x10 x9 y0 208 byte 1: 0 x10 x9 x8 x7 x6 x5 x4 213 byte 6: bitmap data (described below) 217 required to construct a complete bitmap packet. Once assembled, the 6-byte [all …]
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| D | elantech.rst | 24 5.2 Native absolute mode 6 byte packet format 28 6. Hardware version 3 30 6.2 Native absolute mode 6 byte packet format 35 7.2 Native absolute mode 6 byte packet format 41 8.2 Native relative mode 6 byte packet format 52 packet. Version 2 seems to be introduced with the EeePC and uses 6 bytes 54 and width of the touch. Hardware version 3 uses 6 bytes per packet (and 55 for 2 fingers the concatenation of two 6 bytes packets) and allows tracking 56 of up to 3 fingers. Hardware version 4 uses 6 bytes per packet, and can 61 separate packet format. It is also 6 bytes per packet. [all …]
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| /kernel/linux/linux-5.10/arch/arm/crypto/ |
| D | chacha-scalar-core.S | 14 * (x8, x9) to the stack and swap them out with (x10, x11). This adds one 38 X9_X11 .req r9 // shared by x9 and x11 45 .if __LINUX_ARM_ARCH__ >= 6 71 #if __LINUX_ARM_ARCH__ >= 6 80 #if __LINUX_ARM_ARCH__ >= 6 123 // quarterrounds: (x0, x4, x8, x12) and (x1, x5, x9, x13) 126 // save (x8, x9); restore (x10, x11) 141 // save (x10, x11); restore (x8, x9) 145 // quarterrounds: (x2, x7, x8, x13) and (x3, x4, x9, x14) 161 // Registers contain x0-x9,x12-x15. [all …]
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| /kernel/linux/linux-6.6/arch/arm/crypto/ |
| D | chacha-scalar-core.S | 14 * (x8, x9) to the stack and swap them out with (x10, x11). This adds one 38 X9_X11 .req r9 // shared by x9 and x11 54 #if __LINUX_ARM_ARCH__ >= 6 63 #if __LINUX_ARM_ARCH__ >= 6 106 // quarterrounds: (x0, x4, x8, x12) and (x1, x5, x9, x13) 109 // save (x8, x9); restore (x10, x11) 124 // save (x10, x11); restore (x8, x9) 128 // quarterrounds: (x2, x7, x8, x13) and (x3, x4, x9, x14) 144 // Registers contain x0-x9,x12-x15. 151 // Registers contain x0-x9,x12-x15. [all …]
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| /kernel/linux/linux-5.10/lib/crypto/ |
| D | curve25519-fiat32.c | 42 h[1] = (a0>>26) | ((a1&((1<<19)-1))<< 6); /* (32-26) + 19 = 6+19 = 25 */ in fe_frombytes_impl() 44 h[3] = (a2>>13) | ((a3&((1<< 6)-1))<<19); /* (32-13) + 6 = 19+ 6 = 25 */ in fe_frombytes_impl() 45 h[4] = (a3>> 6); /* (32- 6) = 26 */ in fe_frombytes_impl() 47 h[6] = (a4>>25) | ((a5&((1<<19)-1))<< 7); /* (32-25) + 19 = 7+19 = 26 */ in fe_frombytes_impl() 49 h[8] = (a6>>12) | ((a7&((1<< 6)-1))<<20); /* (32-12) + 6 = 20+ 6 = 26 */ in fe_frombytes_impl() 50 h[9] = (a7>> 6)&((1<<25)-1); /* 25 */ in fe_frombytes_impl() 113 { const u32 x14 = in1[6]; in fe_freeze() 157 out[6] = x76; in fe_freeze() 172 s[4] = h[1] >> 6; in fe_tobytes() 174 s[6] = (h[1] >> 22) | (h[2] << 3); in fe_tobytes() [all …]
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| /kernel/linux/linux-6.6/lib/crypto/ |
| D | curve25519-fiat32.c | 42 h[1] = (a0>>26) | ((a1&((1<<19)-1))<< 6); /* (32-26) + 19 = 6+19 = 25 */ in fe_frombytes_impl() 44 h[3] = (a2>>13) | ((a3&((1<< 6)-1))<<19); /* (32-13) + 6 = 19+ 6 = 25 */ in fe_frombytes_impl() 45 h[4] = (a3>> 6); /* (32- 6) = 26 */ in fe_frombytes_impl() 47 h[6] = (a4>>25) | ((a5&((1<<19)-1))<< 7); /* (32-25) + 19 = 7+19 = 26 */ in fe_frombytes_impl() 49 h[8] = (a6>>12) | ((a7&((1<< 6)-1))<<20); /* (32-12) + 6 = 20+ 6 = 26 */ in fe_frombytes_impl() 50 h[9] = (a7>> 6)&((1<<25)-1); /* 25 */ in fe_frombytes_impl() 113 { const u32 x14 = in1[6]; in fe_freeze() 157 out[6] = x76; in fe_freeze() 172 s[4] = h[1] >> 6; in fe_tobytes() 174 s[6] = (h[1] >> 22) | (h[2] << 3); in fe_tobytes() [all …]
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| /kernel/linux/linux-6.6/drivers/hwmon/ |
| D | hwmon-vid.c | 41 * These CPU models (K8 revision >= F) have 6 VID pins. See also: 183 * In theory, all NPT family 0Fh processors have 6 VID pins and should 185 * 6th VID pin because it is never needed. So we use the 5 VID pin 202 {X86_VENDOR_INTEL, 0x6, 0x9, 0x9, ANY, 13}, /* Pentium M (130 nm) */ 217 {X86_VENDOR_CENTAUR, 0x6, 0x9, 0x9, 0x7, 85}, /* Nehemiah */ 218 {X86_VENDOR_CENTAUR, 0x6, 0x9, 0x9, ANY, 17}, /* C3-M, Eden-N */ 230 * 7-bit VID), 13 (Pentium M 6-bit VID) or 131 (Pentium M 6-bit VID 253 6, brands[brand]); in get_via_model_d_vrm() 280 if (c->x86 < 6) /* Any CPU with family lower than 6 */ in vid_which_vrm()
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| /kernel/linux/linux-5.10/drivers/hwmon/ |
| D | hwmon-vid.c | 41 * These CPU models (K8 revision >= F) have 6 VID pins. See also: 183 * In theory, all NPT family 0Fh processors have 6 VID pins and should 185 * 6th VID pin because it is never needed. So we use the 5 VID pin 202 {X86_VENDOR_INTEL, 0x6, 0x9, 0x9, ANY, 13}, /* Pentium M (130 nm) */ 217 {X86_VENDOR_CENTAUR, 0x6, 0x9, 0x9, 0x7, 85}, /* Nehemiah */ 218 {X86_VENDOR_CENTAUR, 0x6, 0x9, 0x9, ANY, 17}, /* C3-M, Eden-N */ 230 * 7-bit VID), 13 (Pentium M 6-bit VID) or 131 (Pentium M 6-bit VID 253 6, brands[brand]); in get_via_model_d_vrm() 280 if (c->x86 < 6) /* Any CPU with family lower than 6 */ in vid_which_vrm()
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| /kernel/linux/linux-6.6/drivers/extcon/ |
| D | extcon-sm5502.h | 93 #define SM5504_REG_CONTROL_USBCHDEN_SHIFT 6 105 #define SM5502_REG_INTM1_OCP_EVENT_SHIFT 6 135 #define SM5504_REG_INTM1_ADC_CHG_SHIFT 6 149 #define SM5504_REG_INTM2_OCP_EVENT_SHIFT 6 173 #define TIMING_KEY_PRESS_1000MS 0x9 185 #define TIMING_ADC_DET_800MS 0x9 200 #define TIMING_SW_WAIT_190MS 0x9 213 #define TIMING_LONG_KEY_1200MS 0x9 224 #define SM5502_REG_DEV_TYPE1_DEDICATED_CHG_SHIFT 6 244 #define SM5502_REG_DEV_TYPE2_AV_CABLE_SHIFT 6 [all …]
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| /kernel/linux/linux-5.10/drivers/extcon/ |
| D | extcon-sm5502.h | 102 #define SM5502_REG_INTM1_OCP_EVENT_SHIFT 6 140 #define TIMING_KEY_PRESS_1000MS 0x9 152 #define TIMING_ADC_DET_800MS 0x9 167 #define TIMING_SW_WAIT_190MS 0x9 180 #define TIMING_LONG_KEY_1200MS 0x9 191 #define SM5502_REG_DEV_TYPE1_DEDICATED_CHG_SHIFT 6 208 #define SM5502_REG_DEV_TYPE2_AV_CABLE_SHIFT 6 271 #define SM5502_IRQ_INT1_OCP_EVENT_MASK BIT(6)
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| /kernel/linux/linux-6.6/arch/powerpc/boot/dts/fsl/ |
| D | p2020ds.dtsi | 128 nand@6,0 { 220 0x8800 0x0 0x0 0x1 &i8259 0x9 0x2 224 0x8900 0x0 0x0 0x1 &i8259 0x9 0x2 228 0x8a00 0x0 0x0 0x1 &i8259 0x9 0x2 232 0x8b00 0x0 0x0 0x1 &i8259 0x9 0x2 236 0x8c00 0x0 0x0 0x1 &i8259 0x9 0x2 240 0x8d00 0x0 0x0 0x1 &i8259 0x9 0x2 243 // IDSEL 0x11 func 6 - PCI slot 1 244 0x8e00 0x0 0x0 0x1 &i8259 0x9 0x2 248 0x8f00 0x0 0x0 0x1 &i8259 0x9 0x2
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| /kernel/linux/linux-5.10/arch/powerpc/boot/dts/fsl/ |
| D | p2020ds.dtsi | 128 nand@6,0 { 220 0x8800 0x0 0x0 0x1 &i8259 0x9 0x2 224 0x8900 0x0 0x0 0x1 &i8259 0x9 0x2 228 0x8a00 0x0 0x0 0x1 &i8259 0x9 0x2 232 0x8b00 0x0 0x0 0x1 &i8259 0x9 0x2 236 0x8c00 0x0 0x0 0x1 &i8259 0x9 0x2 240 0x8d00 0x0 0x0 0x1 &i8259 0x9 0x2 243 // IDSEL 0x11 func 6 - PCI slot 1 244 0x8e00 0x0 0x0 0x1 &i8259 0x9 0x2 248 0x8f00 0x0 0x0 0x1 &i8259 0x9 0x2
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| /kernel/linux/linux-5.10/include/linux/mfd/ |
| D | da8xx-cfgchip.h | 37 #define CFGCHIP1_CAP2SRC_EMAC_C0_TX CFGCHIP1_CAP2SRC(0x9) 54 #define CFGCHIP1_CAP1SRC_EMAC_C0_TX CFGCHIP1_CAP1SRC(0x9) 71 #define CFGCHIP1_CAP0SRC_EMAC_C0_TX CFGCHIP1_CAP0SRC(0x9) 117 #define CFGCHIP2_PHY_PLLON BIT(6) 130 #define CFGCHIP2_REFFREQ_40MHZ CFGCHIP2_REFFREQ(0x9) 134 #define CFGCHIP3_UPP_TX_CLKSRC BIT(6)
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| /kernel/linux/linux-6.6/include/linux/mfd/ |
| D | da8xx-cfgchip.h | 37 #define CFGCHIP1_CAP2SRC_EMAC_C0_TX CFGCHIP1_CAP2SRC(0x9) 54 #define CFGCHIP1_CAP1SRC_EMAC_C0_TX CFGCHIP1_CAP1SRC(0x9) 71 #define CFGCHIP1_CAP0SRC_EMAC_C0_TX CFGCHIP1_CAP0SRC(0x9) 117 #define CFGCHIP2_PHY_PLLON BIT(6) 130 #define CFGCHIP2_REFFREQ_40MHZ CFGCHIP2_REFFREQ(0x9) 134 #define CFGCHIP3_UPP_TX_CLKSRC BIT(6)
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| /kernel/linux/linux-6.6/arch/arm64/crypto/ |
| D | poly1305-armv8.pl | 330 str w14,[$ctx,#16*6] // s3 474 ldp x9,x13,[$inp,#48] 484 rev x9,x9 488 and x5,x9,#0x03ffffff 490 ubfx x7,x9,#26,#26 493 extr x9,x13,x9,#52 497 and x9,x9,#0x03ffffff 502 add x8,x8,x9,lsl#32 // bfi x8,x9,#32,#32 511 ldp x9,x13,[$inp],#48 520 rev x9,x9 [all …]
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| /kernel/linux/linux-6.6/drivers/clk/mmp/ |
| D | clk-of-pxa168.c | 233 …{0, "dfc_mux", dfc_parent_names, ARRAY_SIZE(dfc_parent_names), CLK_SET_RATE_PARENT, APMU_DFC, 6, 1… 234 …{0, "sdh0_mux", sdh_parent_names, ARRAY_SIZE(sdh_parent_names), CLK_SET_RATE_PARENT, APMU_SDH0, 6,… 235 …{0, "sdh1_mux", sdh_parent_names, ARRAY_SIZE(sdh_parent_names), CLK_SET_RATE_PARENT, APMU_SDH1, 6,… 236 …{0, "sdh2_mux", sdh_parent_names, ARRAY_SIZE(sdh_parent_names), CLK_SET_RATE_PARENT, APMU_SDH2, 6,… 237 …{0, "sdh3_mux", sdh_parent_names, ARRAY_SIZE(sdh_parent_names), CLK_SET_RATE_PARENT, APMU_SDH3, 6,… 238 …arent_names, ARRAY_SIZE(disp_parent_names), CLK_SET_RATE_PARENT, APMU_DISP0, 6, 1, 0, &disp0_lock}, 239 …arent_names, ARRAY_SIZE(ccic_parent_names), CLK_SET_RATE_PARENT, APMU_CCIC0, 6, 1, 0, &ccic0_lock}, 249 {PXA168_CLK_USB, "usb_clk", "usb_pll", 0, APMU_USB, 0x9, 0x9, 0x0, 0, &usb_lock}, 256 …{PXA168_CLK_SDH01_AXI, "sdh01_axi_clk", NULL, CLK_SET_RATE_PARENT, APMU_SDH0, 0x9, 0x9, 0x0, 0, &s… 257 …{PXA168_CLK_SDH23_AXI, "sdh23_axi_clk", NULL, CLK_SET_RATE_PARENT, APMU_SDH2, 0x9, 0x9, 0x0, 0, &s…
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| /kernel/linux/linux-6.6/arch/arm64/kvm/hyp/nvhe/ |
| D | host.S | 29 stp x6, x7, [x0, #CPU_XREG_OFFSET(6)] 30 stp x8, x9, [x0, #CPU_XREG_OFFSET(8)] 81 ldp x6, x7, [x29, #CPU_XREG_OFFSET(6)] 85 ldp x8, x9, [x29, #CPU_XREG_OFFSET(8)] 279 ldp x6, x7, [x18, #CPU_XREG_OFFSET(6)] 280 ldp x8, x9, [x18, #CPU_XREG_OFFSET(8)] 291 stp x6, x7, [x18, #CPU_XREG_OFFSET(6)] 292 stp x8, x9, [x18, #CPU_XREG_OFFSET(8)]
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